MAX3243ECDBG4 [TI]

3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV IEC ESD PROTECTION; 3V至5.5V多通道RS - 232线路驱动器/接收器【 15千伏IEC ESD保护
MAX3243ECDBG4
型号: MAX3243ECDBG4
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV IEC ESD PROTECTION
3V至5.5V多通道RS - 232线路驱动器/接收器【 15千伏IEC ESD保护

线路驱动器或接收器 驱动程序和接口 接口集成电路 光电二极管
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MAX3243E  
www.ti.com ................................................................................................................................................... SLLS657CAPRIL 2005REVISED FEBRUARY 2009  
3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER  
WITH ±15-kV IEC ESD PROTECTION  
1
FEATURES  
DB, DW, OR PW PACKAGE  
2
Single-Chip and Single-Supply Interface for  
IBM™ PC/AT™ Serial Port  
(TOP VIEW)  
C2+  
C2−  
V−  
C1+  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
ESD Protection for RS-232 Bus Pins  
V+  
VCC  
2
±15-kV Human-Body Model (HBM)  
3
±8-kV IEC61000-4-2, Contact Discharge  
±15-kV IEC61000-4-2, Air-Gap Discharge  
RIN1  
RIN2  
GND  
C1−  
4
5
Meets or Exceeds Requirements of  
TIA/EIA-232-F and ITU v.28 Standards  
RIN3  
FORCEON  
FORCEOFF  
INVALID  
ROUT2B  
ROUT1  
ROUT2  
ROUT3  
6
RIN4  
RIN5  
7
Operates With 3-V to 5.5-V VCC Supply  
8
DOUT1  
DOUT2  
DOUT3  
DIN3  
9
Always-Active Noninverting Receiver Output  
(ROUT2B)  
10  
11  
12  
Designed to Transmit at a Data Rate up to  
500 kbit/s  
DIN2 13  
14  
16 ROUT4  
15  
Low Standby Current . . . 1 µA Typ  
External Capacitors . . . 4 × 0.1 µF  
Accepts 5-V Logic Input With 3.3-V Supply  
DIN1  
ROUT5  
QFN PACKAGE  
(TOP VIEW)  
Designed to Be Interchangeable With Maxim  
MAX3243E  
Serial-Mouse Driveability  
Auto-Powerdown Feature to Disable Driver  
Outputs When No Valid RS-232 Signal Is  
Sensed  
32 31 30 29 28 27 26 25  
RIN1  
RIN2  
GND  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
Package Options Include Plastic Small-Outline  
(DW), Shrink Small-Outline (DB), and Thin  
Shrink Small-Outline (PW) Packages  
C1–  
RIN3  
FORCEON  
FORCEOFF  
INVALID  
ROUTB2  
ROUT1  
ROUT2  
RIN4  
RIN5  
APPLICATIONS  
DOUT1  
DOUT2  
DOUT3  
Battery-Powered Systems  
PDAs  
Notebooks  
Laptops  
Palmtop PCs  
Hand-Held Equipment  
9
10 11 12 13 14 15 16  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
IBM, PC/AT are trademarks of International Business Machines Corporation.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2005–2009, Texas Instruments Incorporated  
MAX3243E  
SLLS657CAPRIL 2005REVISED FEBRUARY 2009................................................................................................................................................... www.ti.com  
DESCRIPTION  
The MAX3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with  
±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)  
protection on serial-port connection pins. The device meets the requirements of TIA/EIA-232-F and provides the  
electrical interface between an asynchronous communication controller and the serial-port connector. This  
combination of drivers and receivers matches that needed for the typical serial port used in an IBM PC/AT, or  
compatible. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V  
supply. In addition, the device includes an always-active noninverting output (ROUT2B), which allows  
applications using the ring indicator to transmit data while the device is powered down. The device operates at  
data signaling rates up to 250 kbit/s and a maximum of 30-V/µs driver output slew rate.  
Flexible control options for power management are available when the serial port is inactive. The  
auto-powerdown feature functions when FORCEON is low and FORCEOFF is high. During this mode of  
operation, if the device does not sense a valid RS-232 signal, the driver outputs are disabled. If FORCEOFF is  
set low, both drivers and receivers (except ROUT2B) are shut off, and the supply current is reduced to 1 µA.  
Disconnecting the serial port or turning off the peripheral drivers causes the auto-powerdown condition to occur.  
Auto-powerdown can be disabled when FORCEON and FORCEOFF are high, and should be done when driving  
a serial mouse. With auto-powerdown enabled, the device is activated automatically when a valid signal is  
applied to any receiver input. The INVALID output is used to notify the user if an RS-232 signal is present at any  
receiver input. INVALID is high (valid data) if any receiver input voltage is greater than 2.7 V or less than –2.7 V  
or has been between –0.3 V and 0.3 V for less than 30 µs. INVALID is low (invalid data) if all receiver input  
voltages are between –0.3 V and 0.3 V for more than 30 µs. Refer to Figure 5 for receiver input levels.  
The MAX3243EC is characterized for operation from 0°C to 70°C. The MAX3243EI is characterized for operation  
from –40°C to 85°C.  
ORDERING INFORMATION  
TA  
PACKAGE(1)(2)  
ORDERABLE PART NUMBER  
MAX3243ECDW  
MAX3243ECDWR  
MAX3243ECDB  
TOP-SIDE MARKING  
SOIC – DW  
SSOP – DB  
Tape and reel  
MAX3243EC  
Tape and reel  
MAX3243EC  
0°C to 70°C  
MAX3243ECDBR  
MAX3243ECPW  
MAX3243ECPWR  
MAX3243ECRHBR  
MAX3243EIDB  
TSSOP – PW  
QFN – RHB  
SSOP – DB  
Tape and reel  
Tape and reel  
Tape and reel  
MP243EC  
MP243E  
MAX3243EI  
MAX3243EIDBR  
MAX3243EIDW  
SOIC – DW  
Tape and reel  
MAX3243EI  
–40°C to 85°C  
MAX3243EIDWR  
MAX3243EIPW  
TSSOP – PW  
QFN – RHB  
Tape and reel  
Tape and reel  
MP243EI  
MR243E  
MAX3243EIPWR  
MAX3243EIRHBR  
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
2
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Copyright © 2005–2009, Texas Instruments Incorporated  
Product Folder Link(s): MAX3243E  
MAX3243E  
www.ti.com ................................................................................................................................................... SLLS657CAPRIL 2005REVISED FEBRUARY 2009  
FUNCTION TABLES  
ABC  
EACH DRIVER(1)  
INPUTS  
OUTPUT  
DOUT  
DRIVER STATUS  
VALID RIN  
RS-232 LEVEL  
DIN  
FORCEON  
FORCEOFF  
X
L
X
H
H
L
L
X
X
Z
H
L
Powered off  
H
H
H
H
H
H
Normal operation with  
auto-powerdown disabled  
H
L
X
Yes  
Yes  
No  
No  
H
L
Normal operation with  
auto-powerdown enabled  
H
L
L
L
Z
Z
Powered off by  
auto-powerdown feature  
H
L
(1) H = high level, L = low level, X = irrelevant, Z = high impedance  
EACH RECEIVER(1)  
INPUTS  
OUTPUTS  
VALID RIN  
RS-232  
LEVEL  
RECEIVER STATUS  
RIN1,  
RIN3–RIN5  
ROUT1,  
ROUT3–5  
RIN2  
FORCEOFF  
ROUT2B ROUT2  
L
H
X
X
L
L
X
L
H
L
Z
Z
H
L
Z
Z
H
L
Powered off while  
ROUT2B is active  
X
L
L
H
H
H
H
H
YES  
YES  
YES  
YES  
YES  
L
H
L
Normal operation with  
auto-powerdown  
disabled/enabled  
H
L
H
H
L
H
L
H
L
H
H
Open  
Open  
H
H
(1) H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off  
Copyright © 2005–2009, Texas Instruments Incorporated  
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Product Folder Link(s): MAX3243E  
MAX3243E  
SLLS657CAPRIL 2005REVISED FEBRUARY 2009................................................................................................................................................... www.ti.com  
LOGIC DIAGRAM (POSITIVE LOGIC)  
14  
13  
12  
9
10  
11  
DIN1  
DIN2  
DIN3  
DOUT1  
DOUT2  
DOUT3  
22  
23  
FORCEOFF  
FORCEON  
21  
Auto-powerdown  
INVALID  
19  
20  
4
5
ROUT1  
RIN1  
RIN2  
ROUT2B  
18  
17  
16  
15  
ROUT2  
6
7
8
ROUT3  
ROUT4  
ROUT5  
RIN3  
RIN4  
RIN5  
4
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Copyright © 2005–2009, Texas Instruments Incorporated  
Product Folder Link(s): MAX3243E  
MAX3243E  
www.ti.com ................................................................................................................................................... SLLS657CAPRIL 2005REVISED FEBRUARY 2009  
ABSOLUTE MAXIMUM RATINGS(1)  
over operating free-air temperature range (unless otherwise noted)  
MIN  
–0.3  
–0.3  
0.3  
MAX UNIT  
VCC  
V+  
Supply voltage range(2)  
Positive output supply voltage range(2)  
Negative output supply voltage range(2)  
6
V
V
V
V
7
V–  
–7  
V+ – V– Output supply voltage difference(2)  
13  
Driver (FORCEOFF, FORCEON)  
Receiver  
–0.3  
–25  
6
25  
VI  
Input voltage range  
Output voltage range  
V
V
Driver  
–13.2  
–0.3  
13.2  
VCC + 0.3  
62  
VO  
Receiver (INVALID)  
DB package  
θJA  
Package thermal impedance(3)(4)  
DW package  
46  
C/W  
PW package  
62  
Lead temperature 1,6 mm (1/16 in) from case for 10 s  
Storage temperature range  
260  
C
C
Tstg  
–65  
150  
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating  
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) All voltages are with respect to network GND.  
(3) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient  
temperature is PD = (TJ(max) - TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.  
(4) The package thermal impedance is calculated in accordance with JESD 51-7.  
RECOMMENDED OPERATING CONDITIONS(1)  
See Figure 6  
MIN  
3
NOM  
3.3  
5
MAX UNIT  
VCC = 3.3 V  
VCC = 5 V  
VCC = 3.3 V  
VCC = 5 V  
3.6  
V
Supply voltage  
4.5  
2
5.5  
VIH Driver and control high-level input voltage  
VIL Driver and control low-level input voltage  
DIN, FORCEOFF, FORCEON  
V
2.4  
DIN, FORCEOFF, FORCEON  
DIN, FORCEOFF, FORCEON  
0.8  
5.5  
25  
70  
85  
V
V
V
VI  
VI  
Driver and control input voltage  
Receiver input voltage  
0
–25  
0
MAX3243EC  
MAX3243EI  
TA Operating free-air temperature  
C
–40  
(1) Test conditions are C1–C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2–C4 = 0.33 µF at VCC = 5 V ± 0.5 V.  
ELECTRICAL CHARACTERISTICS(1)  
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 6)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP(2) MAX  
UNIT  
II  
Input leakage current FORCEOFF, FORCEON  
0.01  
0.3  
1
1
µA  
No load,  
Auto-powerdown disabled  
1
mA  
FORCEOFF and FORCEON at VCC  
Powered off  
No load, FORCEOFF at GND  
10  
Supply current  
ICC  
No load, FORCEOFF at VCC  
FORCEON at GND,  
All RIN are open or grounded,  
All DIN are grounded  
,
(TA = 25°C)  
µA  
Auto-powerdown enabled  
1
10  
(1) Test conditions are C1–C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2–C4 = 0.33 µF at VCC = 5 V ± 0.5 V.  
(2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.  
Copyright © 2005–2009, Texas Instruments Incorporated  
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Product Folder Link(s): MAX3243E  
MAX3243E  
SLLS657CAPRIL 2005REVISED FEBRUARY 2009................................................................................................................................................... www.ti.com  
DRIVER SECTION  
Electrical Characteristics(1)  
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 6)  
PARAMETER  
TEST CONDITIONS  
All DOUT at RL = 3 kto GND  
MIN TYP(2) MAX  
UNIT  
V
VOH High-level output voltage  
5
5.4  
VOL  
Low-level output voltage  
All DOUT at RL = 3 kto GND  
–5  
–5.4  
V
Output voltage  
(mouse driveability)  
DIN1 = DIN2 = GND, DIN3 = VCC, 3-kto GND at DOUT3,  
DOUT1 = DOUT2 = 2.5 mA  
VO  
±5  
V
IIH  
IIL  
High-level input current  
Low-level input current  
VI = VCC  
±0.01  
±0.01  
±1  
±1  
±1  
µA  
µA  
V
VI at GND  
Vhys Input hysteresis  
VCC = 3.6 V,  
VO = 0 V  
IOS  
Short-circuit output current(3)  
±60  
mA  
VCC = 5.5 V,  
VO = 0 V  
ro  
Output resistance  
VCC, V+, and V– = 0 V,  
FORCEOFF = GND,  
VO = ±2 V  
VO = ±12 V,  
300  
10M  
Ioff  
Output leakage current  
VCC = 0 to 5.5 V  
±25  
µA  
(1) Test conditions are C1–C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2–C4 = 0.33 µF at VCC = 5 V ± 0.5 V.  
(2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.  
(3) Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one  
output should be shorted at a time.  
Switching Characteristics(1)  
switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise  
noted) (see Figure 6)  
PARAMETER  
Maximum data rate  
Pulse skew(3)  
TEST CONDITIONS  
MIN TYP(2)  
MAX  
UNIT  
kbit/s  
ns  
CL = 1000 pF,  
RL = 3 kΩ  
250  
500  
100  
One DOUT switching,  
See Figure 1  
tsk(p)  
CL = 150 pF to 2500 pF,  
RL = 3 kto 7 k, See Figure 2  
CL = 150 pF to 1000 pF  
VCC = 3.3 V,  
RL = 3 kto 7 k,  
PRR = 250 kbit/s  
6
4
30  
30  
Slew rate, transition region  
(see Figure 1)  
SR(tr)  
V/µs  
CL = 150 pF to 2500 pF  
(1) Test conditions are C1–C4 = 0.1 µF at VCC = 3.3 V + 0.3 V; C1 = 0.047 µF, C2–C4 = 0.33 µF at VCC = 5 V ± 0.5 V.  
(2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.  
(3) Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.  
ESD Protection  
PARAMETER  
TEST CONDITIONS  
TYP UNIT  
HBM  
±15  
±15  
±8  
kV  
kV  
kV  
Driver outputs (pins 9–11)  
IEC61000-4-2, Air-Gap Discharge  
IEC61000-4-2, Contact Discharge  
6
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Copyright © 2005–2009, Texas Instruments Incorporated  
Product Folder Link(s): MAX3243E  
MAX3243E  
www.ti.com ................................................................................................................................................... SLLS657CAPRIL 2005REVISED FEBRUARY 2009  
RECEIVER SECTION  
Electrical Characteristics(1)  
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 6)  
PARAMETER  
High-level output voltage  
Low-level output voltage  
TEST CONDITIONS  
IOH = –1 mA  
MIN  
TYP(2)  
MAX UNIT  
VOH  
VOL  
VCC – 0.6  
VCC – 0.1  
V
IOH = 1.6 mA  
VCC = 3.3 V  
VCC = 5 V  
0.4  
2.4  
2.4  
V
1.6  
1.9  
VIT+  
Positive-going input threshold voltage  
Negative-going input threshold voltage  
V
VCC = 3.3 V  
VCC = 5 V  
0.6  
0.8  
1.1  
VIT–  
V
1.4  
Vhys  
Ioff  
ri  
Input hysteresis (VIT+ – VIT–  
Output leakage current (except ROUT2B) FORCEOFF = 0 V  
Input resistance VI = ±3 V or ±25 V  
)
0.5  
V
±0.05  
5
±10  
7
µA  
kΩ  
3
(1) Test conditions are C1–C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2–C4 = 0.33 µF at VCC = 5 V ± 0.5 V.  
(2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.  
Switching Characteristics(1)  
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)  
PARAMETER  
Propagation delay time, low- to high-level output  
Propagation delay time, high- to low-level output  
Output enable time  
TEST CONDITIONS  
CL = 150 pF, See Figure 3  
TYP(2) UNIT  
tPLH  
tPHL  
ten  
150  
150  
200  
200  
50  
ns  
ns  
ns  
ns  
ns  
CL = 150 pF, RL = 3 kΩ, See Figure 4  
tdis  
Output disable time  
Puse skew(3)  
tsk(p)  
See Figure 3  
(1) Test conditions are C1–C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2–C4 = 0.33 µF at VCC = 5 V ± 0.5 V.  
(2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.  
(3) Pulse skew is defined as |tPLH - tPHL| of each channel of the same device.  
ESD Protection  
PARAMETER  
TEST CONDITIONS  
TYP UNIT  
HBM  
±15  
±15  
±8  
kV  
kV  
kV  
Driver outputs (pins 4–8)  
IEC61000-4-2, Air-Gap discharge  
IEC61000-4-2, Contact Discharge  
Copyright © 2005–2009, Texas Instruments Incorporated  
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Product Folder Link(s): MAX3243E  
MAX3243E  
SLLS657CAPRIL 2005REVISED FEBRUARY 2009................................................................................................................................................... www.ti.com  
AUTO-POWERDOWN SECTION  
Electrical Characteristics  
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5)  
PARAMETER  
TEST CONDITIONS  
FORCEON = GND,  
MIN  
MAX UNIT  
Receiver input threshold  
VIT+(valid)  
VIT–(valid)  
VT(invalid)  
VOH  
2.7  
0.3  
0.4  
V
V
V
V
V
for INVALID high-level output voltage  
FORCEOFF = VCC  
Receiver input threshold  
for INVALID high-level output voltage  
FORCEON = GND,  
FORCEOFF = VCC  
–2.7  
–0.3  
Receiver input threshold  
for INVALID low-level output voltage  
FORCEON = GND,  
FORCEOFF = VCC  
IOH = -1 mA, FORCEON = GND,  
FORCEOFF = VCC  
INVALID high-level output voltage  
INVALID low-level output voltage  
VCC – 0.6  
IOL = 1.6 mA, FORCEON = GND,  
FORCEOFF = VCC  
VOL  
Switching Characteristics  
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5)  
PARAMETER  
TEST CONDITIONS  
TYP(1)  
1
UNIT  
µs  
tvalid  
tinvalid  
ten  
Propagation delay time, low- to high-level output  
Propagation delay time, high- to low-level output  
Supply enable time  
VCC = 5 V  
VCC = 5 V  
VCC = 5 V  
30  
µs  
100  
µs  
(1) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.  
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Product Folder Link(s): MAX3243E  
MAX3243E  
www.ti.com ................................................................................................................................................... SLLS657CAPRIL 2005REVISED FEBRUARY 2009  
PARAMETER MEASUREMENT INFORMATION  
3 V  
Input  
RS-232  
Output  
0 V  
Generator  
(see Note B)  
50 Ω  
C
L
t
t
TLH  
THL  
R
L
(see Note A)  
V
V
OH  
3 V  
−3 V  
3 V  
FORCEOFF  
3 V  
−3 V  
Output  
OL  
6 V  
tTHL or tTLH  
SR(tr) +  
TEST CIRCUIT  
NOTES: A. C includes probe and jig capacitance.  
VOLTAGE WAVEFORMS  
L
B. The pulse generator has the following characteristics: Z = 50 , 50% duty cycle, t 10 ns, t 10 ns.  
O
r
f
Figure 1. Driver Slew Rate  
3 V  
0 V  
Input  
1.5 V  
1.5 V  
RS-232  
Output  
Generator  
(see Note B)  
50 Ω  
C
L
t
t
PHL  
PLH  
R
L
(see Note A)  
V
V
OH  
3 V  
FORCEOFF  
50%  
50%  
Output  
OL  
TEST CIRCUIT  
NOTES: A. C includes probe and jig capacitance.  
VOLTAGE WAVEFORMS  
L
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, Z = 50 , 50% duty cycle, t 10 ns, t 10 ns.  
O
r
f
Figure 2. Driver Pulse Skew  
3 V or 0 V  
FORCEON  
3 V  
Input  
1.5 V  
1.5 V  
−3 V  
Output  
Generator  
(see Note B)  
t
t
PLH  
PHL  
50  
C
L
(see Note A)  
3 V  
FORCEOFF  
V
V
OH  
50%  
50%  
Output  
OL  
TEST CIRCUIT  
NOTES: A. C includes probe and jig capacitance.  
VOLTAGE WAVEFORMS  
L
B. The pulse generator has the following characteristics: Z = 50 , 50% duty cycle, t 10 ns, t 10 ns.  
O
r
f
Figure 3. Receiver Propagation Delay Times  
Copyright © 2005–2009, Texas Instruments Incorporated  
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Product Folder Link(s): MAX3243E  
MAX3243E  
SLLS657CAPRIL 2005REVISED FEBRUARY 2009................................................................................................................................................... www.ti.com  
PARAMETER MEASUREMENT INFORMATION  
3 V  
Input  
1.5 V  
1.5 V  
V
CC  
GND  
−3 V  
(S1 at GND)  
3 V or 0 V  
FORCEON  
S1  
t
t
PZH  
PHZ  
(S1 at GND)  
R
L
V
OH  
3 V or 0 V  
Output  
50%  
Output  
0.3 V  
C
L
(see Note A)  
FORCEOFF  
50  
t
t
PZL  
(S1 at V  
PLZ  
(S1 at V  
)
CC  
)
CC  
Generator  
(see Note B)  
0.3 V  
Output  
50%  
V
OL  
TEST CIRCUIT  
NOTES: A. C includes probe and jig capacitance.  
VOLTAGE WAVEFORMS  
L
B. The pulse generator has the following characteristics: Z = 50 , 50% duty cycle, t 10 ns, t 10 ns.  
O
r
f
C.  
D.  
t
t
and t  
and t  
are the same as t  
.
dis  
.
PLZ  
PZL  
PHZ  
PZH  
are the same as t  
en  
Figure 4. Receiver Enable and Disable Times  
10  
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Product Folder Link(s): MAX3243E  
MAX3243E  
www.ti.com ................................................................................................................................................... SLLS657CAPRIL 2005REVISED FEBRUARY 2009  
PARAMETER MEASUREMENT INFORMATION  
3 V  
2.7 V  
2.7 V  
0 V  
0 V  
Receiver  
Input  
−2.7 V  
−2.7 V  
t
ROUT  
−3 V  
Generator  
(see Note B)  
50  
t
valid  
invalid  
V
CC  
50% V  
50% V  
CC  
CC  
0 V  
INVALID  
Output  
t
en  
Auto-  
powerdown  
INVALID  
C = 30 pF  
V+  
V+  
L
(see Note A)  
0.3 V  
Supply  
V
CC  
0 V  
0.3 V  
FORCEOFF  
FORCEON  
Voltages  
DIN  
DOUT  
V−  
V−  
TEST CIRCUIT  
VOLTAGE WAVEFORMS  
Valid RS-232 Level, INVALID High  
Indeterminate  
2.7 V  
0.3 V  
If Signal Remains Within This Region  
For More Than 30 µs, INVALID Is Low  
0 V  
−0.3 V  
Indeterminate  
−2.7 V  
Valid RS-232 Level, INVALID High  
Auto-powerdowndisables drivers and reduces supply  
current to 1 µA.  
NOTES: A. C includes probe and jig capacitance.  
L
B. The pulse generator has the following characteristics: PRR = 5 kbit/s, Z = 50 , 50% duty cycle, t 10 ns, t 10 ns.  
O
r
f
Figure 5. INVALID Propagation Delay Timnes and Supply Enabling Time  
Copyright © 2005–2009, Texas Instruments Incorporated  
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Product Folder Link(s): MAX3243E  
MAX3243E  
SLLS657CAPRIL 2005REVISED FEBRUARY 2009................................................................................................................................................... www.ti.com  
APPLICATION INFORMATION  
28  
C1+  
27  
1
V+  
C2+  
C2−  
+
+
C3  
C2  
+
2
3
C1  
26  
V
CC  
+
C
BYPASS  
= 0.1 µF  
25  
24  
23  
V−  
GND  
C1−  
+
C4  
4
5
6
7
8
RIN1  
FORCEON  
FORCEOFF  
RIN2  
RIN3  
22  
RS-232 Inputs  
RIN4  
RIN5  
21  
20  
INVALID  
ROUT2B  
9
DOUT1  
DOUT2  
19  
18  
17  
10  
ROUT1  
ROUT2  
RS-232 Outputs  
5 kΩ  
11  
DOUT3  
5 kΩ  
Logic Outputs  
12  
13  
14  
DIN3  
DIN2  
DIN1  
ROUT3  
5 kΩ  
16  
15  
Logic Inputs  
ROUT4  
ROUT5  
5 kΩ  
5 kΩ  
C3 can be connected to V or GND.  
CC  
NOTES: A. Resistor values shown are nominal.  
B. Nonpolarizedceramic capacitors are acceptable. If polarized tantalum or  
electrolytic capacitors are used, they should be connected as shown.  
V
CC  
vs CAPACITOR VALUES  
V
CC  
C1  
C2, C3, and C4  
3.3 V ± 0.3 V  
5 V ± 0.5 V  
3 V to 5.5 V  
0.1 µF  
0.047 µF  
0.1 µF  
0.1 µF  
0.33 µF  
0.47 µF  
Figure 6. Typical Operating Circuit and Capacitor Values  
12  
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Product Folder Link(s): MAX3243E  
MAX3243E  
www.ti.com ................................................................................................................................................... SLLS657CAPRIL 2005REVISED FEBRUARY 2009  
APPLICATION INFORMATION  
ESD Protection  
TI MAX3243E devices have standard ESD protection structures incorporated on the pins to protect against  
electrostatic discharges encountered during assembly and handling. In addition, the RS232 bus pins (driver  
outputs and receiver inputs) of these devices have an extra level of ESD protection. Advanced ESD structures  
were designed to successfully protect these bus pins against ESD discharge of ±15-kV in all states: normal  
operation, shutdown, and powered down. The MAX3243E devices are designed to continue functioning properly  
after an ESD occurrence without any latchup.  
The MAX3243E devices have three specified ESD limits on the driver outputs and receiver inputs, with respect to  
GND:  
±15-kV Human Body Model (HBM)  
±15-kV IEC61000-4-2, Air-Gap Discharge (formerly IEC1000-4-2)  
±8-kV IEC61000-4-2, Contact Discharge  
ESD Test Conditions  
ESD testing is stringently performed by TI, based on various conditions and procedures. Please contact TI for a  
reliability report that documents test setup, methodology, and results.  
Human Body Model (HBM)  
The Human Body Model of ESD testing is shown in Figure 7, while Figure 8 shows the current waveform that is  
generated during a discharge into a low impedance. The model consists of a 100-pF capacitor, charged to the  
ESD voltage of concern, and subsequently discharged into the DUT through a 1.5k-Ω resistor.  
R
D
1.5 k  
+
100 pF  
C
S
DUT  
V
HBM  
Figure 7. HBM ESD Test Circuit  
Copyright © 2005–2009, Texas Instruments Incorporated  
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MAX3243E  
SLLS657CAPRIL 2005REVISED FEBRUARY 2009................................................................................................................................................... www.ti.com  
APPLICATION INFORMATION  
1.5  
V
HBM  
= 2 kV  
1.0  
0.5  
DUT = 10-V 1-Zener Diode  
0.0  
0
50  
100  
150  
200  
Time (ns)  
Figure 8. Typical HBM Current Waveform  
IEC61000-4-2 (Formerly Known as IEC1000-4-2)  
Unlike the HBM, MM, and CDM ESD tests that apply to component level integrated circuits, the IEC61000-4-2 is  
a system-level ESD testing and performance standard that pertains to the end equipment. The MAX3243E is  
designed to enable the manufacturer in meeting the highest level (Level 4) of IEC61000-4-2 ESD protection with  
no further need of external ESD protection circuitry. The more stringent IEC test standard has a higher peak  
current than the HBM, due to the lower series resistance in the IEC model.  
Figure 9 shows the IEC61000-4-2 model, and Figure 10 shows the current waveform for the corresponding  
±8-kV Contact-Discharge (Level 4) test. This waveform is applied to a probe that has been connected to the  
DUT. On the other hand, the corresponding ±15-kV (Level 4) Air-Gap Discharge test involves approaching the  
DUT with an already energized probe.  
50−100 M  
330 Ω  
R
C
R
D
High-Voltage  
DC Source  
+
C
S
150 pF  
DUT  
Figure 9. Simplified IEC61000-4-2 ESD Test Circuit  
14  
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Copyright © 2005–2009, Texas Instruments Incorporated  
Product Folder Link(s): MAX3243E  
MAX3243E  
www.ti.com ................................................................................................................................................... SLLS657CAPRIL 2005REVISED FEBRUARY 2009  
APPLICATION INFORMATION  
I
(30A) 100%  
(V  
contact  
= 8 kV)  
90%  
(16A)  
(8A)  
10%  
t
30 ns  
60 ns  
t = 0.7 ns to 1 ns  
r
Figure 10. Typical Current Waveform of IEC61000-4-2 ESD Generator  
Machine Model  
The Machine Model (MM) ESD test applies to all pins using a 200-pF capacitor with no discharge resistance.  
The purpose of the MM test is to simulate possible ESD conditions that can occur during the handling and  
assembly processes of manufacturing. In this case, ESD protection is required for all pins, not just RS-232 pins.  
However, after PC board assembly, the MM test is no longer as pertinent to the RS-232 pins.  
Copyright © 2005–2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
15  
Product Folder Link(s): MAX3243E  
PACKAGE OPTION ADDENDUM  
www.ti.com  
16-Apr-2009  
PACKAGING INFORMATION  
Orderable Device  
MAX3243ECDB  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
SSOP  
DB  
28  
28  
28  
28  
28  
28  
28  
28  
28  
28  
28  
28  
28  
28  
28  
28  
32  
32  
28  
28  
28  
28  
28  
28  
28  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
MAX3243ECDBE4  
MAX3243ECDBG4  
MAX3243ECDBR  
MAX3243ECDBRE4  
MAX3243ECDBRG4  
MAX3243ECDW  
SSOP  
SSOP  
SSOP  
SSOP  
SSOP  
SOIC  
DB  
DB  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
DB  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
DB  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
DB  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
DW  
DW  
DW  
DW  
PW  
PW  
PW  
PW  
PW  
PW  
RHB  
RHB  
DB  
20 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
MAX3243ECDWG4  
MAX3243ECDWR  
MAX3243ECDWRG4  
MAX3243ECPW  
SOIC  
20 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SOIC  
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SOIC  
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
QFN  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
MAX3243ECPWE4  
MAX3243ECPWG4  
MAX3243ECPWR  
MAX3243ECPWRE4  
MAX3243ECPWRG4  
MAX3243ECRHBR  
MAX3243ECRHBRG4  
MAX3243EIDB  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
QFN  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
SSOP  
SSOP  
SSOP  
SSOP  
SOIC  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
MAX3243EIDBG4  
MAX3243EIDBR  
DB  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
DB  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
MAX3243EIDBRG4  
MAX3243EIDW  
DB  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
DW  
DW  
DW  
20 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
MAX3243EIDWG4  
MAX3243EIDWR  
SOIC  
20 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SOIC  
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
16-Apr-2009  
Orderable Device  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
MAX3243EIDWRG4  
MAX3243EIPW  
SOIC  
DW  
28  
28  
28  
28  
28  
28  
28  
32  
32  
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
QFN  
PW  
PW  
PW  
PW  
PW  
PW  
RHB  
RHB  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
MAX3243EIPWE4  
MAX3243EIPWG4  
MAX3243EIPWR  
MAX3243EIPWRE4  
MAX3243EIPWRG4  
MAX3243EIRHBR  
MAX3243EIRHBRG4  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
QFN  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
16-Feb-2009  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) W1 (mm)  
(mm) (mm) Quadrant  
MAX3243ECDBR  
MAX3243ECDWR  
MAX3243ECPWR  
MAX3243ECPWR  
MAX3243ECRHBR  
MAX3243EIDBR  
MAX3243EIDWR  
MAX3243EIPWR  
MAX3243EIPWR  
MAX3243EIRHBR  
SSOP  
SOIC  
DB  
DW  
PW  
PW  
RHB  
DB  
28  
28  
28  
28  
32  
28  
28  
28  
28  
32  
2000  
1000  
2000  
2000  
3000  
2000  
1000  
2000  
2000  
3000  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
16.4  
32.4  
16.4  
16.4  
12.4  
16.4  
32.4  
16.4  
16.4  
12.4  
8.2  
11.35  
7.1  
10.5  
18.67  
10.4  
10.2  
5.3  
2.5  
3.1  
1.6  
1.8  
1.5  
2.5  
3.1  
1.6  
1.8  
1.5  
12.0  
16.0  
12.0  
12.0  
8.0  
16.0  
32.0  
16.0  
16.0  
12.0  
16.0  
32.0  
16.0  
16.0  
12.0  
Q1  
Q1  
Q1  
Q1  
Q2  
Q1  
Q1  
Q1  
Q1  
Q2  
TSSOP  
TSSOP  
QFN  
6.9  
5.3  
SSOP  
SOIC  
8.2  
10.5  
18.67  
10.4  
10.2  
5.3  
12.0  
16.0  
12.0  
12.0  
8.0  
DW  
PW  
PW  
RHB  
11.35  
7.1  
TSSOP  
TSSOP  
QFN  
6.9  
5.3  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
16-Feb-2009  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
MAX3243ECDBR  
MAX3243ECDWR  
MAX3243ECPWR  
MAX3243ECPWR  
MAX3243ECRHBR  
MAX3243EIDBR  
MAX3243EIDWR  
MAX3243EIPWR  
MAX3243EIPWR  
MAX3243EIRHBR  
SSOP  
SOIC  
DB  
DW  
PW  
PW  
RHB  
DB  
28  
28  
28  
28  
32  
28  
28  
28  
28  
32  
2000  
1000  
2000  
2000  
3000  
2000  
1000  
2000  
2000  
3000  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
33.0  
49.0  
33.0  
33.0  
29.0  
33.0  
49.0  
33.0  
33.0  
29.0  
TSSOP  
TSSOP  
QFN  
SSOP  
SOIC  
DW  
PW  
PW  
RHB  
TSSOP  
TSSOP  
QFN  
Pack Materials-Page 2  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
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