LP3988IMFX-2.5 [TI]
2.5V FIXED POSITIVE LDO REGULATOR, 0.15V DROPOUT, PDSO5, SOT-23, 5 PIN;
| 型号： | LP3988IMFX-2.5 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 2.5V FIXED POSITIVE LDO REGULATOR, 0.15V DROPOUT, PDSO5, SOT-23, 5 PIN 光电二极管 输出元件 调节器 |
| 文件： | 总19页 (文件大小：1063K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LP3988
www.ti.com
SNVS161D –OCTOBER 2001–REVISED MAY 2013
LP3988 Micropower, 150 mA Ultra Low-Dropout CMOS Voltage Regulator
With Power Good
Check for Samples: LP3988
1
FEATURES
DESCRIPTION
The LP3988 is a 150 mA low dropout regulator
designed specially to meet requirements of Portable
battery-applications. The LP3988 is designed to work
with a space-saving, small 1µF ceramic capacitor.
The LP3988 features an Error Flag output that
indicates a faulty output condition.
2
•
•
•
•
•
5-Bump Thin DSBGA Package
SOT-23-5 Package
Power-Good Flag Output
Logic Controlled Enable
Stable with Ceramic and High-Quality
Tantalum Capacitors
The LP3988's performance is optimized for battery
powered systems to deliver low noise, extremely low
dropout voltage and low quiescent current. Regulator
ground current increases only slightly in dropout,
further prolonging the battery life.
•
•
Fast Turn-On
Thermal Shutdown and Short-Circuit Current
Limit
Power supply rejection is better than 60 dB at low
frequencies and starts to roll off at 10 kHz. High
power supply rejection is maintained down to lower
input voltage levels common to battery operated
circuits.
KEY SPECIFICATIONS
•
•
•
•
•
•
•
Input range: 2.5V to 6V
Ooutput current: 150 mA
PSRR at 10 kHz: 40 dB
The device is ideal for mobile phone and similar
battery powered wireless applications. It provides up
to 150 mA, from a 2.5V to 6V input, consuming less
than 1 µA in disable mode and has fast turn-on time
less than 200 µs.
Quiescent current when shut down: ≤ 1µA
(Typical) Fast Turn-On time: 100 µs
Typical dropout with 150 mA load: 80 mV
Junction temperature range for operation:
−40°C to +80°C
The LP3988 is available 5 pin SOT-23 package and
5-bump thin DSBGA package. Performance is
specified for −40°C to +125°C temperature range and
is available in 1.85, 2.5, 2.6, 2.85, 3.0 and 3.3V
output voltages.
•
Output voltages: 1.85V, 2.5V, 2.6V, 2.85V, 3V,
and 3.3V
APPLICATIONS
•
•
•
•
•
CDMA Cellular Handsets
(C3)
(C1)
1
5
Wideband CDMA Cellular Handsets
GSM Cellular Handsets
V
V
IN
OUT
1 µF
1 µF
Portable Information Appliances
Tiny 3.3V ± 5% to 2.85V, 150 mA Converter
LP3988
(A1) 3
(A3)
4
POWER
GOOD
V
EN
2 (B2)
Note: Pin numbers in
parentheses indicate
DSBGA package pin out
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2001–2013, Texas Instruments Incorporated
LP3988
SNVS161D –OCTOBER 2001–REVISED MAY 2013
www.ti.com
Block Diagram
Pin Descriptions
Name
VEN
DSBGA
A1
SOT-23
Function
3
2
5
1
4
Enable Input Logic, Enable High
Common Ground
GND
B2
VOUT
C1
Output Voltage of the LDO
Input Voltage of the LDO
VIN
C3
Power Good
A3
Power Good Flag (output): open-drain output, connected to an external pull-up
resistor. Active low indicates an output voltage out of tolerance condition.
Connection Diagrams
V
IN
C3
POWER GOOD
A3
A1
B2
C1
GND
V
OUT
V
EN
Figure 1. Top View
Figure 2. Top View
5 Bump DSBGA Package (YZR)
See Package Number YZR0005
SOT-23-5 Package (DBV)
See Package Number DBV (R-PDSO-G5)
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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SNVS161D –OCTOBER 2001–REVISED MAY 2013
(1)(2)(3)
ABSOLUTE MAXIMUM RATINGS
VIN
−0.3 to 6.5V
VOUT, VEN, PowerGood (applies only to DSBGA)
−0.3V to (VIN+0.3V),
with 6V max
Junction Temperature
Storage Temperature
Lead Temp, Pad Temp.
150°C
−65°C to +150°C
235°C
(4)
Power Dissipation
SOT-23-5
DSBGA
364 mW
314 mW
(5)
ESD Rating
Human Body Model
2 kV
Machine Model
SOT-23-5
DSBGA
150V
200V
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is specified. Recommended Operating Conditions do not imply performance limits. For performance limits and
associated test conditions, see the Electrical Characteristics tables.
(2) All voltages are with respect to the potential at the GND pin.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(4) The Absolute Maximum power dissipation depends on the ambient temperature and can be calculated using the formula: PD = (TJ -
TA)/θJAwhere TJ is the junction temperature, TA is the ambient temperature, and θ JA is the junction-to-ambient thermal resistance. The
364mW rating appearing under Absolute Maximum Ratings for the SOT-23-5 package results from substituting the Absolute Maximum
junction temperature, 150°C, for TJ, 70°C for TA, and 220°C/W for θJA. More power can be dissipated safely at ambient temperatures
below 70°C . Less power can be dissipated safely at ambient temperatures above 70°C. The Absolute Maximum power dissipation can
be increased by 4.5mW for each degree below 70°C, and it must be derated by 4.5mW for each degree above 70°C. Same principle
applies to the DSBGA package.
(5) The human body model is 100 pF discharged through 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor
discharged directly into each pin.
(1) (2)
RECOMMENDED OPERATING CONDITIONS
VIN
(3)
2.5V to 6V
0 to VIN
VOUT, VEN
Junction Temperature
−40°C to +125°C
Junction-to-Ambient Thermal Resistance (θJA
)
SOT-23-5
DSBGA
220ºC/W
255ºC/W
(4)
Maximum Power Dissipation
SOT-23-5
DSBGA
250 mW
216 mW
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is specified. Recommended Operating Conditions do not imply performance limits. For performance limits and
associated test conditions, see the Electrical Characteristics tables.
(2) All voltages are with respect to the potential at the GND pin.
(3) The minimum VIN is dependant on the device output option.For Vout(NOM) < 2.5V, VIN(MIN) will equal 2.5V. For Vout(NOM) >= 2.5V,
VIN(MIN) will equal Vout(NOM) + 200 mV.
(4) Like the Absolute Maximum power dissipation, the maximum power dissipation for operation depends on the ambient temperature. The
250 mW rating appearing under Recommended Operating Conditions for the SOT-23-5 package results from substituting the maximum
junction temperature for operation, 125°C, for TJ, 70°C for TA, and 220°C/W for θJA into () above. More power can be dissipated at
ambient temperatures below 70°C . Less power can be dissipated at ambient temperatures above 70°C. The maximum power
dissipation for operation can be increased by 4.5mW for each degree below 70°C, and it must be derated by 4.5mW for each degree
above 70°C. Same principle applies to the DSBGA package.
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SNVS161D –OCTOBER 2001–REVISED MAY 2013
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ELECTRICAL CHARACTERISTICS
Unless otherwise specified: VEN = 1.8V, VIN = VOUT + 0.5V, CIN = 1 µF, IOUT = 1mA, COUT = 1 µF. Typical values and limits
appearing in standard typeface are for TJ = 25°C. Limits appearing in boldface type apply over the entire junction
(1) (2)
temperature range for operation, −40°C to +125°C.
Limit
Symbol
Parameter
Conditions
Typ
Units
Min
Max
Output Voltage
Tolerance
−2
−3
−3.5
2
3
3.5
−20°C ≦ TJ ≦ 125°C, SOT-23-5
−40°C ≦ TJ ≦ 125°C, SOT-23-5
% of
VOUT(nom)
−40°C ≦ TJ ≦ 125°C, DSBGA
VIN = VOUT (NOM) + 0.5V to 6.0V
IOUT = 1 mA to 150 mA
-3
3
ΔVOUT
Line Regulation Error
−0.15
−0.2
0.15
0.2
%/V
Load Regulation Error
0.005
0.007
%/mA
(3)
VIN = VOUT(nom) + 1V,
f = 1 kHz,
IOUT = 50 mA (Figure 5)
65
45
PSRR
IQ
Power Supply Rejection Ratio
Quiescent Current
dB
VIN = VOUT(nom) + 1V,
f = 10 kHz,
IOUT = 50 mA (Figure 5)
VEN = 1.4V, IOUT = 0 mA
VEN = 1.4V, IOUT = 0 to 150 mA
VEN = 0.4V
85
140
0.003
1
120
200
1.0
5
µA
(4)
Dropout Voltage
IOUT = 1 mA
mV
IOUT = 150 mA
80
115
150
(5)
ISC
en
Short Circuit Current Limit
Output Noise Voltage
600
220
mA
BW = 10 Hz to 100 kHz,
COUT = 1µF
µVrms
(6)
Output Capacitor
Capacitance
1
5
20
µF
mΩ
°C
COUT
TSD
(6)
ESR
500
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
160
20
°C
Enable Control Characteristics
IEN
VIL
VIH
Maximum Input Current at EN
VEN = 0 and VIN = 6.0V
VIN = 2.5V to 6.0V
VIN = 2.5V to 6.0V
0.1
0.5
µA
V
Logic Low Input threshold
Logic High Input threshold
1.2
V
(1) All electrical characteristics having room-temperature limits are tested during production with TJ = 25°C or correlated using Statistical
Quality Control (SQC) methods. All hot and cold limits are specified by correlating the electrical characteristics to process and
temperature variations and applying statistical process control.
(2) The target output voltage, which is labeled VOUT(nom), is the desired voltage option.
(3) An increase in the load current results in a slight decrease in the output voltage and vice versa.
(4) Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value.
(5) Short circuit current is measured on input supply line after pulling down VOUT to 95% VOUT(nom)
.
(6) Specified by design. Not production tested. The capacitor tolerance should be ±30% or better over the full temperature range. The full
range of operating conditions such as temperature, DC bias and even capacitor case size for the capacitor in the application should be
considered during device selection to ensure this minimum capacitance specification is met. X7R capacitor types are recommended to
meet the full device temperature range.
4
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SNVS161D –OCTOBER 2001–REVISED MAY 2013
ELECTRICAL CHARACTERISTICS (continued)
Unless otherwise specified: VEN = 1.8V, VIN = VOUT + 0.5V, CIN = 1 µF, IOUT = 1mA, COUT = 1 µF. Typical values and limits
appearing in standard typeface are for TJ = 25°C. Limits appearing in boldface type apply over the entire junction
(1) (2)
temperature range for operation, −40°C to +125°C.
Limit
Symbol
Parameter
Conditions
Typ
Units
Min
Max
Power Good
Power Good
VTHL
VTHH
Low threshold
High Threshold
% of VOUT (PG ON) Figure 4
% of VOUT (PG OFF) Figure 4
93
95
90
92
95
98
%
(7)
VOL
IPGL
TON
TOFF
PG Output Logic Low Voltage
IPULL-UP = 100µA, fault condition
PG Off, VPG = 6V
VIN = 4.2V
0.02
0.02
10
0.1
V
PG Output Leakage Current
µA
µs
µs
(8)
Power Good Turn On time,
(8)
Power Good Turn Off time,
VIN = 4.2V
10
(7) The low and high thresholds are generated together. Typically a 2.6% difference is seen between these thresholds.
(8) Turn-on time is measured between the enable input just exceeding VIH and the output voltage just reaching 95% of its nominal value.
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SNVS161D –OCTOBER 2001–REVISED MAY 2013
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Figure 3. Power Good Flag Timing
Figure 4. Line Transient response Input Perturbation
Figure 5. PSRR Input Perturbation
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SNVS161D –OCTOBER 2001–REVISED MAY 2013
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise specified, CIN = COUT = 1 µF Ceramic, VIN = VOUT + 0.2V, TA = 25°C, Enable pin is tied to VIN.
Ripple Rejection Ratio (LP3988-2.6)
Ripple Rejection Ratio (LM3988-2.6)
Figure 6.
Figure 7.
Power-Good Response Time (LP3988-2.85)
(flag pin pulled to VOUT through a 100KΩ resistor)
Power-Good Response Time (LP3988-2.85)
(flag pin pulled to VIN through a 100KΩ resistor)
Figure 8.
Figure 9.
Power-Good Response Time (LP3988-2.85)
(flag pin pulled to VOUT through a 100KΩ resistor)
Line Transient Response (LP3988-2.85)
Figure 10.
Figure 11.
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SNVS161D –OCTOBER 2001–REVISED MAY 2013
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Unless otherwise specified, CIN = COUT = 1 µF Ceramic, VIN = VOUT + 0.2V, TA = 25°C, Enable pin is tied to VIN.
Line Transient Response (LP3988-2.85)
Power-Up Response
Figure 12.
Figure 13.
Enable Response
Enable Response
Figure 14.
Figure 15.
Load Transient Response
Load Transient Response
Figure 16.
Figure 17.
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SNVS161D –OCTOBER 2001–REVISED MAY 2013
APPLICATION INFORMATION
External Capacitors
Like any low-dropout regulator, the LP3988 requires external capacitors for regulator stability. The LP3988 is
specifically designed for portable applications requiring minimum board space and smallest components. These
capacitors must be correctly selected for good performance.
Input Capacitor
An input capacitance of ≊ 1 µF is required between the LP3988 input pin and ground (the amount of the
capacitance may be increased without limit).
This capacitor must be located a distance of not more than 1cm from the input pin and returned to a clean
analog ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input.
Important: Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a low-
impedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input,
it must be ensured by the manufacturer to have a surge current rating sufficient for the application.
There are no requirements for the ESR on the input capacitor, but tolerance and temperature coefficient must be
considered when selecting the capacitor to ensure the capacitance will be ≊ 1 µF over the entire operating
temperature range.
Output Capacitors
The LP3988 is designed specifically to work with very small ceramic output capacitors. A ceramic capacitor
(dielectric types Z5U, Y5V or X7R) in 1 to 22 µF range with 5mΩ to 500mΩ ESR range is suitable in the LP3988
application circuit.
It may also be possible to use tantalum or film capacitors at the output, but these are not as attractive for
reasons of size and cost (see Capacitor Characteristics).
The output capacitor must meet the requirement for minimum amount of capacitance and also have an ESR
(Equivalent Series Resistance) value which is within a stable range (5 mΩ to 500 mΩ).
No-Load Stability
The LP3988 will remain stable and in regulation with no external load. This is specially important in CMOS RAM
keep-alive applications.
Capacitor Characteristics
The LP3988 is designed to work with ceramic capacitors on the output to take advantage of the benefits they
offer: for capacitance values in the range of 1 µF to 4.7 µF range, ceramic capacitors are the smallest, least
expensive and have the lowest ESR values (which makes them best for eliminating high frequency noise). The
ESR of a typical 1 µF ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which easily meets the ESR
requirement for stability by the LP3988.
The ceramic capacitor's capacitance can vary with temperature. Most large value ceramic capacitors (≊ 2.2 µF)
are manufactured with Z5U or Y5V temperature characteristics, which results in the capacitance dropping by
more than 50% as the temperature goes from 25°C to 85°C.
A better choice for temperature coefficient in a ceramic capacitor is X7R, which holds the capacitance within
±15%.
Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more
expensive when comparing equivalent capacitance and voltage ratings in the 1 µF to 4.7 µF range.
Another important consideration is that tantalum capacitors have higher ESR values than equivalent size
ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the
stable range, it would have to be larger in capacitance (which means bigger and more costly ) than a ceramic
capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about
2:1 as the temperature goes from 25°C down to −40°C, so some guard band must be allowed.
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On/Off Input Operation
The LP3988 is turned off by pulling the VEN pin low, and turned on by pulling it high. If this feature is not used,
the VEN pin should be tied to VIN to keep the regulator output on at all time. To assure proper operation, the
signal source used to drive the VEN input must be able to swing above and below the specified turn-on/off voltage
thresholds listed in the Electrical Characteristics section under VIL and VIH.
Fast On-Time
The LP3988 utilizes a speed up circuitry to ramp up the internal VREF voltage to its final value to achieve a fast
output turn on time.
10
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SNVS161D –OCTOBER 2001–REVISED MAY 2013
REVISION HISTORY
Changes from Revision C (May 2013) to Revision D
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 10
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PACKAGE OPTION ADDENDUM
www.ti.com
7-Oct-2013
PACKAGING INFORMATION
Orderable Device
LP3988IMF-2.5/NOPB
LP3988IMF-3.0/NOPB
LP3988IMF-3.3/NOPB
LP3988IMFX-2.5/NOPB
LP3988IMFX-2.85/NOPB
LP3988IMFX-3.0/NOPB
LP3988IMFX-3.3/NOPB
LP3988ITL-1.85/NOPB
LP3988ITL-2.6/NOPB
LP3988ITL-2.85/NOPB
LP3988ITLX-1.85/NOPB
LP3988ITLX-2.6/NOPB
LP3988ITLX-2.85/NOPB
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
ACTIVE
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DBV
5
5
5
5
5
5
5
5
5
5
5
5
5
1000
Green (RoHS
& no Sb/Br)
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
LFSB
LFAB
LH5B
LFSB
LDLB
LFAB
LH5B
8
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DBV
DBV
DBV
DBV
DBV
DBV
YZR
YZR
YZR
YZR
YZR
YZR
1000
1000
3000
3000
3000
3000
250
Green (RoHS
& no Sb/Br)
-40 to 125
Green (RoHS
& no Sb/Br)
CU SN
Green (RoHS
& no Sb/Br)
CU SN
-40 to 125
-40 to 125
-40 to 125
Green (RoHS
& no Sb/Br)
CU SN
Green (RoHS
& no Sb/Br)
CU SN
Green (RoHS
& no Sb/Br)
CU SN
Green (RoHS
& no Sb/Br)
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
250
Green (RoHS
& no Sb/Br)
-40 to 125
-40 to 125
8
250
Green (RoHS
& no Sb/Br)
8
3000
3000
3000
Green (RoHS
& no Sb/Br)
8
Green (RoHS
& no Sb/Br)
-40 to 125
-40 to 125
8
Green (RoHS
& no Sb/Br)
8
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
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7-Oct-2013
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LP3988 :
Automotive: LP3988-Q1
•
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LP3988IMF-2.5/NOPB
LP3988IMF-3.0/NOPB
LP3988IMF-3.3/NOPB
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
DBV
DBV
DBV
YZR
YZR
YZR
YZR
YZR
YZR
5
5
5
5
5
5
5
5
5
5
5
5
5
1000
1000
1000
3000
3000
3000
3000
250
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
3.2
3.2
3.2
3.2
1.4
1.4
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q1
Q1
Q1
Q1
Q1
Q1
3.2
3.2
1.4
LP3988IMFX-2.5/NOPB SOT-23
LP3988IMFX-2.85/NOPB SOT-23
LP3988IMFX-3.0/NOPB SOT-23
LP3988IMFX-3.3/NOPB SOT-23
LP3988ITL-1.85/NOPB DSBGA
3.2
3.2
1.4
3.2
3.2
1.4
3.2
3.2
1.4
3.2
3.2
1.4
1.09
1.09
1.09
1.09
1.09
1.09
1.55
1.55
1.55
1.55
1.55
1.55
0.76
0.76
0.76
0.76
0.76
0.76
LP3988ITL-2.6/NOPB
DSBGA
250
LP3988ITL-2.85/NOPB DSBGA
LP3988ITLX-1.85/NOPB DSBGA
LP3988ITLX-2.6/NOPB DSBGA
LP3988ITLX-2.85/NOPB DSBGA
250
3000
3000
3000
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LP3988IMF-2.5/NOPB
LP3988IMF-3.0/NOPB
LP3988IMF-3.3/NOPB
LP3988IMFX-2.5/NOPB
LP3988IMFX-2.85/NOPB
LP3988IMFX-3.0/NOPB
LP3988IMFX-3.3/NOPB
LP3988ITL-1.85/NOPB
LP3988ITL-2.6/NOPB
LP3988ITL-2.85/NOPB
LP3988ITLX-1.85/NOPB
LP3988ITLX-2.6/NOPB
LP3988ITLX-2.85/NOPB
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DBV
DBV
DBV
DBV
DBV
DBV
DBV
YZR
YZR
YZR
YZR
YZR
YZR
5
5
5
5
5
5
5
5
5
5
5
5
5
1000
1000
1000
3000
3000
3000
3000
250
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
250
250
3000
3000
3000
Pack Materials-Page 2
MECHANICAL DATA
YZR0005xxx
D
0.600±0.075
E
TLA05XXX (Rev C)
D: Max = 1.502 mm, Min =1.441 mm
E: Max = 1.045 mm, Min =0.984 mm
4215043/A
12/12
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
NOTES:
www.ti.com
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