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LP38693QSDX-3.3/NOPB [TI]

具有使能功能的汽车类 500mA、10V、低压降稳压器 | NGG | 6 | -40 to 125;
LP38693QSDX-3.3/NOPB
型号： LP38693QSDX-3.3/NOPB
厂家： TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
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具有使能功能的汽车类 500mA、10V、低压降稳压器 | NGG | 6 | -40 to 125

光电二极管 输出元件 电源电路 线性稳压器IC 调节器
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LP38691, LP38693  
www.ti.com  
SNVS321K –JANUARY 2005–REVISED APRIL 2013  
LP38691  
LP38693 500mA Low Dropout CMOS Linear Regulators  
Stable with Ceramic Output Capacitors  
Check for Samples: LP38691, LP38693  
1
FEATURES  
DESCRIPTION  
The LP38691/3 low dropout CMOS linear regulators  
provide tight output tolerance (2.0% typical),  
extremely low dropout voltage (250 mV @ 500mA  
2
•
All WSON Options are Available as AEC-Q100  
Grade 1  
•
•
2.0% Output Accuracy (25°C)  
load current, VOUT  
=
5V), and excellent AC  
Low Dropout Voltage: 250 mV @ 500mA (typ,  
5V out)  
performance utilizing ultra low ESR ceramic output  
capacitors.  
•
•
•
•
•
•
•
•
Wide Input Voltage Range (2.7V to 10V)  
Precision (Trimmed) Bandgap Reference  
Ensured Specs for -40°C to +125°C  
1µA Off-State Quiescent Current  
Thermal Overload Protection  
The low thermal resistance of the WSON, SOT-223  
and PFM packages allow the full operating current to  
be used even in high ambient temperature  
environments.  
The use of a PMOS power transistor means that no  
DC base drive current is required to bias it allowing  
ground pin current to remain below 100 µA  
regardless of load current, input voltage, or operating  
temperature.  
Foldback Current Limiting  
PFM, SOT-223 and 6-Lead WSON Packages  
Enable Pin (LP38693)  
Dropout Voltage: 250 mV (typ) @ 500mA (typ. 5V  
out).  
APPLICATIONS  
•
•
•
•
Hard Disk Drives  
Ground Pin Current: 55 µA (typ) at full load.  
Notebook Computers  
Battery Powered Devices  
Portable Instrumentation  
Precision Output Voltage: 2.0% (25°C) accuracy.  
Typical Application Circuits  
V
IN  
V
OUT  
V
V
IN  
OUT  
LP38691  
**  
SNS  
GND  
1 mF *  
1 mF *  
V
V
OUT  
IN  
V
V
IN  
OUT  
**  
LP38693  
V
EN  
V
EN  
SNS  
GND  
1 mF *  
1 mF *  
* Minimum value required for stability.  
**WSON package devices only.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2005–2013, Texas Instruments Incorporated  
LP38691, LP38693  
SNVS321K –JANUARY 2005–REVISED APRIL 2013  
www.ti.com  
Connection Diagrams  
V
1
2
3
4
EN  
N/C  
5 GND  
V
OUT  
V
IN  
Figure 1. PFM (LP38691DT-X.X) – Top View  
See Package Number NDP0003B  
Figure 2. SOT-223 (LP38693MP-X.X) – Top View  
See Package Number NDC0005A  
6
5
4
6
5
4
V
1
2
3
V
1
2
3
V
V
IN  
IN  
IN  
IN  
Exposed Pad  
on Bottom  
(DAP)  
Exposed Pad  
on Bottom  
(DAP)  
SNS  
SNS  
GND  
GND  
N/C  
V
OUT  
V
OUT  
V
EN  
Figure 3. 6-Lead WSON (LP38691SD-X.X) – Top  
View  
Figure 4. 6-Lead WSON (LP38693SD-X.X) – Top  
View  
See Package Number NGG0006A  
See Package Number NGG  
PIN DESCRIPTIONS  
Pin  
Description  
This is the input supply voltage to the regulator. For WSON devices, both VIN pins must be tied together for  
full current operation (250mA maximum per pin).  
VIN  
Circuit ground for the regulator. For the PFM and SOT-223 packages this is thermally connected to the die  
and functions as a heat sink when the soldered down to a large copper plane.  
GND  
SNS  
Output sense pin allows remote sensing at the load which will eliminate the error in output voltage due to  
voltage drops caused by the resistance in the traces between the regulator and the load. This pin must be  
tied to VOUT  
.
VEN  
The enable pin allows the part to be turned ON and OFF by pulling this pin high or low.  
Regulated output voltage  
VOUT  
WSON Only - The DAP (Exposed Pad) functions as a thermal connection when soldered to a copper plane.  
See WSON MOUNTING section in APPLICATION HINTS for more information.  
DAP  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
2
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SNVS321K –JANUARY 2005–REVISED APRIL 2013  
ABSOLUTE MAXIMUM RATINGS(1)(2)  
Storage Temperature Range  
Lead Temp. (Soldering, 5 seconds)  
ESD Rating(3)  
−65°C to +150°C  
260°C  
2 kV  
Power Dissipation(4)  
Internally Limited  
-0.3V to 12V  
Internally Limited  
−40°C to +150°C  
V(max) All pins (with respect to GND)  
(5)  
IOUT  
Junction Temperature  
(1) Absolute maximum ratings indicate limits beyond which damage to the component may occur. Operating ratings indicate conditions for  
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications, see Electrical  
Characteristics. Specifications do not apply when operating the device outside of its rated operating conditions.  
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and  
specifications.  
(3) ESD is tested using the human body model which is a 100pF capacitor discharged through a 1.5k resistor into each pin.  
(4) At elevated temperatures, device power dissipation must be derated based on package thermal resistance and heatsink values (if a  
heatsink is used). The junction-to-ambient thermal resistance ( θJ-A) for the PFM is approximately 90°C/W for a PC board mounting with  
the device soldered down to minimum copper area (less than 0.1 square inch). If one square inch of copper is used as a heat dissipator  
for the PFM, the θJ-A drops to approximately 50°C/W. The SOT-223 package has a θJ-A of approximately 125°C/W when soldered down  
to a minimum sized pattern (less than 0.1 square inch) and approximately 70°C/W when soldered to a copper area of one square inch.  
The θJ-A values for the WSON package are also dependent on trace area, copper thickness, and the number of thermal vias used (refer  
to the TI (AN-1187 Application Report) and the WSON MOUNTING section in this datasheet). If power dissipation causes the junction  
temperature to exceed specified limits, the device will go into thermal shutdown.  
(5) If used in a dual-supply system where the regulator load is returned to a negative supply, the output pin must be diode clamped to  
ground.  
OPERATING RATINGS  
VIN Supply Voltage  
2.7V to 10V  
Operating Junction Temperature Range  
−40°C to +125°C  
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ELECTRICAL CHARACTERISTICS  
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range.  
Unless otherwise specified: VIN = VOUT + 1V, CIN = COUT = 10 µF, ILOAD = 10mA. Min/Max limits are specified through testing,  
statistical correlation, or design.  
Symbol  
Parameter  
Conditions  
Min  
Typ(1)  
Max  
Units  
-2.0  
2.0  
VO  
Output Voltage Tolerance  
Output Voltage Line Regulation(2)  
%VOUT  
100 µA < IL < 0.5A  
VO + 1V ≤ VIN ≤ 10V  
-4.0  
4.0  
0.1  
5
ΔVO/ΔVIN  
ΔVO/ΔIL  
VO + 0.5V ≤ VIN ≤ 10V  
IL = 25mA  
0.03  
1.8  
%/V  
%/A  
Output Voltage Load Regulation(3) 1 mA < IL < 0.5A  
VIN = VO + 1V  
(VO = 2.5V)  
IL = 0.1A  
IL = 0.5A  
80  
430  
145  
725  
(VO = 3.3V)  
IL = 0.1A  
IL = 0.5A  
65  
330  
110  
550  
VIN - VOUT  
Dropout Voltage(4)  
mV  
(VO = 5V)  
IL = 0.1A  
IL = 0.5A  
45  
250  
100  
450  
IQ  
Quiescent Current  
V
IN ≤ 10V, IL =100 µA - 0.5A  
EN ≤ 0.4V, (LP38693 Only)  
55  
100  
1
V
0.001  
µA  
IL(MIN)  
IFB  
Minimum Load Current  
Foldback Current Limit  
VIN - VO ≤ 4V  
VIN - VO > 5V  
VIN - VO < 4V  
100  
350  
850  
mA  
dB  
PSRR  
TSD  
Ripple Rejection  
VIN = VO + 2V(DC), with 1V(p-p) /  
120Hz Ripple  
55  
160  
10  
Thermal Shutdown Activation  
(Junction Temp)  
°C  
TSD (HYST)  
en  
Thermal Shutdown Hysteresis  
(Junction Temp)  
Output Noise  
BW = 10Hz to 10kHz  
VO = 3.3V  
0.7  
0.5  
µV/√Hz  
VO (LEAK)  
VEN  
Output Leakage Current  
VO = VO(NOM) + 1V @ 10VIN  
Output = OFF  
12  
µA  
Enable Voltage (LP38693 Only)  
0.4  
Output = ON, VIN = 4V  
Output = ON, VIN = 6V  
Output = ON, VIN = 10V  
VEN = 0V or 10V, VIN = 10V  
1.8  
3.0  
4.0  
-1  
V
IEN  
Enable Pin Leakage (LP38693  
Only)  
0.001  
1
µA  
(1) Typical numbers represent the most likely parametric norm for 25°C operation.  
(2) Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage.  
(3) Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from 1mA to  
full load.  
(4) Dropout voltage is defined as the minimum input to output differential required to maintain the output within 100mV of nominal value.  
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SNVS321K –JANUARY 2005–REVISED APRIL 2013  
BLOCK DIAGRAMS  
V
IN  
P-FET  
P-FET  
-
MOSFET  
DRIVER  
+
ENABLE  
LOGIC  
N/C  
FOLDBACK  
CURRENT  
LIMITING  
V
OUT  
SNS  
THERMAL  
SHUTDOWN  
1.25V  
REFERENCE  
R1  
R2  
GND  
Figure 5. LP38691 Functional Diagram (WSON)  
V
IN  
P-FET  
P-FET  
-
MOSFET  
DRIVER  
+
ENABLE  
LOGIC  
FOLDBACK  
CURRENT  
LIMITING  
V
OUT  
THERMAL  
SHUTDOWN  
1.25V  
REFERENCE  
R1  
R2  
GND  
Figure 6. LP38691 Functional Diagram (PFM)  
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V
IN  
P-FET  
P-FET  
-
MOSFET  
DRIVER  
+
ENABLE  
LOGIC  
V
EN  
FOLDBACK  
CURRENT  
LIMITING  
V
OUT  
SNS  
THERMAL  
SHUTDOWN  
1.25V  
REFERENCE  
R1  
R2  
GND  
Figure 7. LP38693 Functional Diagram (WSON)  
V
IN  
P-FET  
P-FET  
-
MOSFET  
DRIVER  
+
ENABLE  
V
EN  
LOGIC  
FOLDBACK  
CURRENT  
LIMITING  
V
OUT  
THERMAL  
SHUTDOWN  
1.25V  
REFERENCE  
R1  
R2  
GND  
Figure 8. LP38693 Functional Diagram (SOT-223)  
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SNVS321K –JANUARY 2005–REVISED APRIL 2013  
TYPICAL PERFORMANCE CHARACTERISTICS  
Unless otherwise specified: TJ = 25°C, CIN = COUT = 10 µF, Enable pin is tied to VIN (LP38693 only), VOUT = 1.8V, VIN = VOUT  
+1V, IL = 10mA.  
Noise vs Frequency  
Noise vs Frequency  
Figure 9.  
Figure 10.  
Noise vs Frequency  
Ripple Rejection  
60  
50  
40  
30  
20  
10  
0
C
= 10 mF  
OUT  
V
V
V
(DC) = 5.3V  
IN  
(AC) = 1V(p-p)  
IN  
= 3.3V  
OUT  
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
Figure 11.  
Figure 12.  
Ripple Rejection  
Ripple Rejection  
60  
50  
40  
30  
20  
10  
0
60  
50  
40  
30  
20  
10  
0
C
= 1 mF  
OUT  
C
= 100 mF  
OUT  
V
V
V
(DC) = 5.3V  
IN  
V
V
V
(DC) = 5.3V  
IN  
(AC) = 1V(p-p)  
IN  
(AC) = 1V(p-p)  
IN  
= 3.3V  
OUT  
= 3.3V  
OUT  
10  
100  
1k  
10k  
100k  
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 13.  
Figure 14.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Unless otherwise specified: TJ = 25°C, CIN = COUT = 10 µF, Enable pin is tied to VIN (LP38693 only), VOUT = 1.8V, VIN = VOUT  
+1V, IL = 10mA.  
Line Transient Response  
Line Transient Response  
V
OUT  
= 3.3V  
20  
10  
0
C
OUT  
= 100 mF  
V
OUT  
-10  
-20  
5
4
3
V
IN  
200 ms/DIV  
Figure 15.  
Figure 16.  
Line Transient Response  
Load Transient Response  
Figure 17.  
Figure 18.  
Load Transient Response  
VOUT vs Temperature (5.0V)  
Figure 19.  
Figure 20.  
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SNVS321K –JANUARY 2005–REVISED APRIL 2013  
TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Unless otherwise specified: TJ = 25°C, CIN = COUT = 10 µF, Enable pin is tied to VIN (LP38693 only), VOUT = 1.8V, VIN = VOUT  
+1V, IL = 10mA.  
VOUT vs Temperature (3.3V)  
VOUT vs Temperature (2.5V)  
Figure 21.  
Figure 22.  
VOUT vs Temperature (1.8V)  
VOUT vs VIN (1.8V)  
Figure 23.  
Figure 24.  
VOUT vs VIN, Power-Up  
VOUT vs VEN, ON (LP38693 Only)  
Figure 25.  
Figure 26.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Unless otherwise specified: TJ = 25°C, CIN = COUT = 10 µF, Enable pin is tied to VIN (LP38693 only), VOUT = 1.8V, VIN = VOUT  
+1V, IL = 10mA.  
VOUT vs VEN, OFF (LP38693 Only)  
Enable Voltage vs Temperature  
Figure 27.  
Figure 28.  
Load Regulation vs Temperature  
Line Regulation vs Temperature  
Figure 29.  
Figure 30.  
MIN VIN vs IOUT  
Dropout Voltage vs IOUT  
2.7  
2.6  
2.5  
900  
800  
700  
600  
500  
400  
300  
200  
100  
-40°C  
2.4  
2.3  
2.2  
-40°C  
125°C  
25°C  
125°C  
25°C  
2.1  
2
0
0
100  
200  
300  
400  
500  
0
100  
200  
300  
400  
500  
I
(mA)  
OUT  
I
(mA)  
OUT  
Figure 31.  
Figure 32.  
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SNVS321K –JANUARY 2005–REVISED APRIL 2013  
APPLICATION HINTS  
EXTERNAL CAPACITORS  
Like any low-dropout regulator, external capacitors are required to assure stability. These capacitors must be  
correctly selected for proper performance.  
INPUT CAPACITOR:  
An input capacitor of at least 1µF is required (ceramic recommended). The capacitor must be located not more  
than one centimeter from the input pin and returned to a clean analog ground.  
OUTPUT CAPACITOR:  
An output capacitor is required for loop stability. It must be located less than 1 centimeter from the device and  
connected directly to the output and ground pins using traces which have no other currents flowing through them.  
The minimum amount of output capacitance that can be used for stable operation is 1µF. Ceramic capacitors are  
recommended (the LP38691/3 was designed for use with ultra low ESR capacitors). The LP38691/3 is stable  
with any output capacitor ESR between zero and 100 Ohms.  
ENABLE PIN (LP38693 only):  
The LP38693 has an Enable pin (EN) which allows an external control signal to turn the regulator output On and  
Off. The Enable On/Off threshold has no hysteresis. The voltage signal must rise and fall cleanly, and promptly,  
through the ON and OFF voltage thresholds. The Enable pin has no internal pull-up or pull-down to establish a  
default condition and, as a result, this pin must be terminated either actively or passively. If the Enable pin is  
driven from a source that actively pulls high and low, the drive voltage should not be allowed to go below ground  
potential or higher than VIN. If the application does not require the Enable function, the pin should be connected  
directly to the VIN pin.  
Foldback Current Limiting:  
Foldback current limiting is built into the LP38691/3 which reduces the amount of output current the part can  
deliver as the output voltage is reduced. The amount of load current is dependent on the differential voltage  
between VIN and VOUT. Typically, when this differential voltage exceeds 5V, the load current will limit at about 350  
mA. When the VIN - VOUT differential is reduced below 4V, load current is limited to about 850 mA.  
SELECTING A CAPACITOR  
It is important to note that capacitance tolerance and variation with temperature must be taken into consideration  
when selecting a capacitor so that the minimum required amount of capacitance is provided over the full  
operating temperature range.  
Capacitor Characteristics  
CERAMIC  
For values of capacitance in the 10 to 100 µF range, ceramics are usually larger and more costly than tantalums  
but give superior AC performance for bypassing high frequency noise because of very low ESR (typically less  
than 10 mΩ). However, some dielectric types do not have good capacitance characteristics as a function of  
voltage and temperature.  
Z5U and Y5V dielectric ceramics have capacitance that drops severely with applied voltage. A typical Z5U or  
Y5V capacitor can lose 60% of its rated capacitance with half of the rated voltage applied to it. The Z5U and Y5V  
also exhibit a severe temperature effect, losing more than 50% of nominal capacitance at high and low limits of  
the temperature range.  
X7R and X5R dielectric ceramic capacitors are strongly recommended if ceramics are used, as they typically  
maintain a capacitance range within ±20% of nominal over full operating ratings of temperature and voltage. Of  
course, they are typically larger and more costly than Z5U/Y5U types for a given voltage and capacitance.  
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TANTALUM  
Solid Tantalum capacitors have good temperature stability: a high quality Tantalum will typically show a  
capacitance value that varies less than 10-15% across the full temperature range of -40°C to +125°C. ESR will  
vary only about 2X going from the high to low temperature limits.  
REVERSE VOLTAGE  
A reverse voltage condition will exist when the voltage at the output pin is higher than the voltage at the input pin.  
Typically this will happen when VIN is abruptly taken low and COUT continues to hold a sufficient charge such that  
the input to output voltage becomes reversed. A less common condition is when an alternate voltage source is  
connected to the output.  
There are two possible paths for current to flow from the output pin back to the input during a reverse voltage  
condition.  
1. While VIN is high enough to keep the control circuity alive, and the Enable pin (LP38693 only) is above the  
VEN(ON) threshold, the control circuitry will attempt to regulate the output voltage. If the input voltage is less  
than the programmed output voltage, the control circuit will drive the gate of the pass element to the full ON  
condition. In this condition, reverse current will flow from the output pin to the input pin, limited only by the  
RDS(ON) of the pass element and the output to input voltage differential. Discharging an output capacitor up to  
1000 μF in this manner will not damage the device as the current will rapidly decay. However, continuous  
reverse current should be avoided. When the Enable pin is low this condition will be prevented.  
2. The internal PFET pass element has an inherent parasitic diode. During normal operation, the input voltage  
is higher than the output voltage and the parasitic diode is reverse biased. However, when VIN is below the  
value where the control circuity is alive, or the Enable pin is low (LP38693 only), and the output voltage is  
more than 500 mV (typical) above the input voltage the parasitic diode becomes forward biased and current  
flows from the output pin to the input pin through the diode. The current in the parasitic diode should be  
limited to less than 1A continuous and 5A peak.  
If used in a dual-supply system where the regulator output load is returned to a negative supply, the output  
pin must be diode clamped to ground to limit the negative voltage transition. A Schottky diode is  
recommended for this protective clamp.  
PCB LAYOUT  
Good PC layout practices must be used or instability can be induced because of ground loops and voltage drops.  
The input and output capacitors must be directly connected to the input, output, and ground pins of the regulator  
using traces which do not have other currents flowing in them (Kelvin connect).  
The best way to do this is to lay out CIN and COUT near the device with short traces to the VIN, VOUT, and ground  
pins. The regulator ground pin should be connected to the external circuit ground so that the regulator and its  
capacitors have a "single point ground".  
It should be noted that stability problems have been seen in applications where "vias" to an internal ground plane  
were used at the ground points of the IC and the input and output capacitors. This was caused by varying ground  
potentials at these nodes resulting from current flowing through the ground plane. Using a single point ground  
technique for the regulator and it’s capacitors fixed the problem. Since high current flows through the traces  
going into VIN and coming from VOUT, Kelvin connect the capacitor leads to these pins so there is no voltage drop  
in series with the input and output capacitors.  
WSON MOUNTING  
The NGG0006A (No Pullback) 6-Lead WSON package requires specific mounting techniques which are detailed  
in the TI AN-1187 Application Report. Referring to the section PCB Design Recommendations (Page 5), it should  
be noted that the pad style which should be used with the WSON package is the NSMD (non-solder mask  
defined) type. Additionally, it is recommended the PCB terminal pads to be 0.2 mm longer than the package  
pads to create a solder fillet to improve reliability and inspection.  
The input current is split between two VIN pins, 1 and 6. The two VIN pins must be connected together to ensure  
that the device can meet all specifications at the rated current.  
The thermal dissipation of the WSON package is directly related to the printed circuit board construction and the  
amount of additional copper area connected to the DAP.  
12  
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Copyright © 2005–2013, Texas Instruments Incorporated  
Product Folder Links: LP38691 LP38693  
LP38691, LP38693  
www.ti.com  
SNVS321K –JANUARY 2005–REVISED APRIL 2013  
The DAP (exposed pad) on the bottom of the WSON package is connected to the die substrate with a conductive  
die attach adhesive. The DAP has no direct electrical (wire) connection to any of the pins. There is a parasitic PN  
junction between the die substrate and the device ground. As such, it is strongly recommend that the DAP be  
connected directly to the ground at device lead 2 (i.e. GND). Alternately, but not recommended, the DAP may be  
left floating (i.e. no electrical connection). The DAP must not be connected to any potential other than ground.  
For the LP38691SD and LP38693SD in the NGG0006A 6-Lead WSON package, the junction-to-case thermal  
rating, θJC, is 10.4°C/W, where the case is the bottom of the package at the center of the DAP. The junction-to-  
ambient thermal performance for the LP38691SD and LP38693SD in the NGG0006A 6-Lead WSON package,  
using the JEDEC JESD51 standards is summarized in the following table:  
Board  
Type  
Thermal  
Vias  
θJC  
θJA  
JEDEC  
2-Layer  
None  
10.4°C/W  
237° C/W  
JESD 51-3  
1
2
4
6
10.4°C/W  
10.4°C/W  
10.4°C/W  
10.4°C/W  
74° C/W  
60° C/W  
49° C/W  
45° C/W  
JEDEC  
4-Layer  
JESD 51-7  
RFI/EMI SUSCEPTIBILITY  
RFI (radio frequency interference) and EMI (electromagnetic interference) can degrade any integrated circuit’s  
performance because of the small dimensions of the geometries inside the device. In applications where circuit  
sources are present which generate signals with significant high frequency energy content (> 1 MHz), care must  
be taken to ensure that this does not affect the IC regulator.  
If RFI/EMI noise is present on the input side of the regulator (such as applications where the input source comes  
from the output of a switching regulator), good ceramic bypass capacitors must be used at the input pin of the IC.  
If a load is connected to the IC output which switches at high speed (such as a clock), the high-frequency current  
pulses required by the load must be supplied by the capacitors on the IC output. Since the bandwidth of the  
regulator loop is less than 100 kHz, the control circuitry cannot respond to load changes above that frequency.  
This means the effective output impedance of the IC at frequencies above 100 kHz is determined only by the  
output capacitor(s).  
In applications where the load is switching at high speed, the output of the IC may need RF isolation from the  
load. It is recommended that some inductance be placed between the output capacitor and the load, and good  
RF bypass capacitors be placed directly across the load.  
PCB layout is also critical in high noise environments, since RFI/EMI is easily radiated directly into PC traces.  
Noisy circuitry should be isolated from "clean" circuits where possible, and grounded through a separate path. At  
MHz frequencies, ground planes begin to look inductive and RFI/ EMI can cause ground bounce across the  
ground plane. In multi-layer PCB applications, care should be taken in layout so that noisy power and ground  
planes do not radiate directly into adjacent layers which carry analog power and ground.  
OUTPUT NOISE  
Noise is specified in two ways: Spot Noise or Output Noise Density is the RMS sum of all noise sources,  
measured at the regulator output, at a specific frequency (measured with a 1Hz bandwidth). This type of noise is  
usually plotted on a curve as a function of frequency. Total Output Noise or Broad-Band Noise is the RMS  
sum of spot noise over a specified bandwidth, usually several decades of frequencies.  
Attention should be paid to the units of measurement. Spot noise is measured in units µV/root-Hz or nV/root-Hz  
and total output noise is measured in µV(rms)  
The primary source of noise in low-dropout regulators is the internal reference. Noise can be reduced in two  
ways: by increasing the transistor area or by increasing the current drawn by the internal reference. Increasing  
the area will decrease the chance of fitting the die into a smaller package. Increasing the current drawn by the  
internal reference increases the total supply current (ground pin current).  
Copyright © 2005–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
13  
Product Folder Links: LP38691 LP38693  
 
LP38691, LP38693  
SNVS321K –JANUARY 2005–REVISED APRIL 2013  
www.ti.com  
REVISION HISTORY  
Changes from Revision J (April 2013) to Revision K  
Page  
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 13  
14  
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Copyright © 2005–2013, Texas Instruments Incorporated  
Product Folder Links: LP38691 LP38693  
PACKAGE OPTION ADDENDUM  
www.ti.com  
1-Nov-2013  
PACKAGING INFORMATION  
Orderable Device  
LP38691DT-1.8  
Status Package Type Package Pins Package  
Eco Plan  
Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(6)  
(3)  
(4/5)  
NRND  
TO-252  
TO-252  
TO-252  
TO-252  
TO-252  
TO-252  
NDP  
3
3
3
3
3
3
75  
TBD  
Call TI  
CU SN  
Call TI  
CU SN  
Call TI  
CU SN  
Call TI  
Level-2-260C-1 YEAR  
Call TI  
LP38691  
DT-1.8  
LP38691DT-1.8/NOPB  
LP38691DT-2.5  
ACTIVE  
NRND  
NDP  
NDP  
NDP  
NDP  
NDP  
75  
75  
75  
75  
75  
Green (RoHS  
& no Sb/Br)  
LP38691  
DT-1.8  
TBD  
LP38691  
DT-2.5  
LP38691DT-2.5/NOPB  
LP38691DT-3.3  
ACTIVE  
NRND  
Green (RoHS  
& no Sb/Br)  
Level-2-260C-1 YEAR  
Call TI  
LP38691  
DT-2.5  
TBD  
LP38691  
DT-3.3  
LP38691DT-3.3/NOPB  
ACTIVE  
Green (RoHS  
& no Sb/Br)  
Level-2-260C-1 YEAR  
LP38691  
DT-3.3  
LP38691DT-5.0  
ACTIVE  
ACTIVE  
TO-252  
TO-252  
NDP  
NDP  
3
3
75  
75  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 125  
-40 to 125  
LP38691DT-5.0/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-2-260C-1 YEAR  
LP38691  
DT-5.0  
LP38691DTX-1.8  
ACTIVE  
ACTIVE  
TO-252  
TO-252  
NDP  
NDP  
3
3
2500  
2500  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 125  
-40 to 125  
LP38691DTX-1.8/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-2-260C-1 YEAR  
LP38691  
DT-1.8  
LP38691DTX-2.5  
ACTIVE  
ACTIVE  
TO-252  
TO-252  
NDP  
NDP  
3
3
2500  
2500  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 125  
-40 to 125  
LP38691DTX-2.5/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-2-260C-1 YEAR  
LP38691  
DT-2.5  
LP38691DTX-3.3  
NRND  
TO-252  
TO-252  
NDP  
NDP  
3
3
2500  
2500  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 125  
-40 to 125  
LP38691  
DT-3.3  
LP38691DTX-3.3/NOPB  
ACTIVE  
Green (RoHS  
& no Sb/Br)  
Level-2-260C-1 YEAR  
LP38691  
DT-3.3  
LP38691DTX-5.0  
ACTIVE  
ACTIVE  
TO-252  
TO-252  
NDP  
NDP  
3
3
2500  
2500  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 125  
-40 to 125  
LP38691DTX-5.0/NOPB  
Green (RoHS  
& no Sb/Br)  
Level-2-260C-1 YEAR  
LP38691  
DT-5.0  
LP38691QSD-1.8/NOPB  
LP38691QSD-2.5/NOPB  
ACTIVE  
ACTIVE  
WSON  
WSON  
NGG  
NGG  
6
6
1000  
1000  
Green (RoHS  
& no Sb/Br)  
CU SN  
CU SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 125  
-40 to 125  
L256B  
Green (RoHS  
& no Sb/Br)  
L257B  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
1-Nov-2013  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(6)  
(3)  
(4/5)  
LP38691QSD-3.3/NOPB  
LP38691QSD-5.0/NOPB  
LP38691QSDX-1.8/NOPB  
LP38691QSDX-2.5/NOPB  
LP38691QSDX-3.3/NOPB  
LP38691QSDX-5.0/NOPB  
ACTIVE  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
NGG  
6
6
6
6
6
6
1000  
Green (RoHS  
& no Sb/Br)  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
L258B  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
NGG  
NGG  
NGG  
NGG  
NGG  
1000  
4500  
4500  
4500  
4500  
Green (RoHS  
& no Sb/Br)  
L259B  
L256B  
L257B  
L258B  
L259B  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
LP38691SD-1.8  
NRND  
WSON  
WSON  
NGG  
NGG  
6
6
1000  
1000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 125  
-40 to 125  
L118B  
L118B  
LP38691SD-1.8/NOPB  
ACTIVE  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LP38691SD-2.5/NOPB  
LP38691SD-3.3/NOPB  
LP38691SD-5.0/NOPB  
LP38691SDX-1.8/NOPB  
LP38691SDX-2.5/NOPB  
LP38691SDX-3.3/NOPB  
LP38691SDX-5.0/NOPB  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
6
6
6
6
6
6
6
1000  
1000  
1000  
4500  
4500  
4500  
4500  
Green (RoHS  
& no Sb/Br)  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
L119B  
L120B  
L121B  
L118B  
L119B  
L120B  
L121B  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
LP38693MP-1.8  
NRND  
SOT-223  
SOT-223  
NDC  
NDC  
5
5
1000  
1000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 125  
-40 to 125  
LJVB  
LJVB  
LP38693MP-1.8/NOPB  
ACTIVE  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LP38693MP-2.5/NOPB  
LP38693MP-3.3  
ACTIVE  
NRND  
SOT-223  
SOT-223  
NDC  
NDC  
5
5
1000  
1000  
Green (RoHS  
& no Sb/Br)  
CU SN  
Call TI  
Level-1-260C-UNLIM  
Call TI  
-40 to 125  
-40 to 125  
LJXB  
LJYB  
TBD  
Addendum-Page 2  
PACKAGE OPTION ADDENDUM  
www.ti.com  
1-Nov-2013  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(6)  
(3)  
(4/5)  
LP38693MP-3.3/NOPB  
LP38693MP-5.0/NOPB  
LP38693MPX-1.8/NOPB  
LP38693MPX-2.5/NOPB  
ACTIVE  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
NDC  
5
5
5
5
1000  
Green (RoHS  
& no Sb/Br)  
CU SN  
CU SN  
CU SN  
CU SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
LJYB  
LJZB  
LJVB  
LJXB  
ACTIVE  
ACTIVE  
ACTIVE  
NDC  
NDC  
NDC  
1000  
2000  
2000  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
LP38693MPX-3.3  
NRND  
SOT-223  
SOT-223  
NDC  
NDC  
5
5
2000  
2000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 125  
-40 to 125  
LJYB  
LJYB  
LP38693MPX-3.3/NOPB  
ACTIVE  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LP38693MPX-5.0/NOPB  
LP38693QSD-1.8/NOPB  
LP38693QSD-2.5/NOPB  
LP38693QSD-3.3/NOPB  
LP38693QSD-5.0/NOPB  
LP38693QSDX-1.8/NOPB  
LP38693QSDX-2.5/NOPB  
LP38693QSDX-3.3/NOPB  
LP38693QSDX-5.0/NOPB  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOT-223  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
NDC  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
5
6
6
6
6
6
6
6
6
2000  
1000  
1000  
1000  
1000  
4500  
4500  
4500  
4500  
Green (RoHS  
& no Sb/Br)  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
LJZB  
Green (RoHS  
& no Sb/Br)  
L260B  
L261B  
L262B  
L263B  
L260B  
L261B  
L262B  
L263B  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
LP38693SD-1.8  
NRND  
WSON  
WSON  
NGG  
NGG  
6
6
1000  
1000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 125  
-40 to 125  
L128B  
L128B  
LP38693SD-1.8/NOPB  
ACTIVE  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LP38693SD-2.5/NOPB  
LP38693SD-3.3  
ACTIVE  
NRND  
WSON  
WSON  
NGG  
NGG  
6
6
1000  
1000  
Green (RoHS  
& no Sb/Br)  
CU SN  
Call TI  
Level-1-260C-UNLIM  
Call TI  
-40 to 125  
-40 to 125  
L129B  
L130B  
TBD  
Addendum-Page 3  
PACKAGE OPTION ADDENDUM  
www.ti.com  
1-Nov-2013  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(6)  
(3)  
(4/5)  
LP38693SD-3.3/NOPB  
ACTIVE  
WSON  
NGG  
6
1000  
Green (RoHS  
& no Sb/Br)  
CU SN  
Level-1-260C-UNLIM  
-40 to 125  
L130B  
LP38693SD-5.0  
NRND  
WSON  
WSON  
NGG  
NGG  
6
6
1000  
1000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 125  
-40 to 125  
L131B  
L131B  
LP38693SD-5.0/NOPB  
ACTIVE  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LP38693SDX-1.8/NOPB  
LP38693SDX-2.5/NOPB  
LP38693SDX-3.3/NOPB  
LP38693SDX-5.0/NOPB  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
WSON  
WSON  
WSON  
WSON  
NGG  
NGG  
NGG  
NGG  
6
6
6
6
4500  
4500  
4500  
4500  
Green (RoHS  
& no Sb/Br)  
CU SN  
CU SN  
CU SN  
CU SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
L128B  
L129B  
L130B  
L131B  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
Addendum-Page 4  
PACKAGE OPTION ADDENDUM  
www.ti.com  
1-Nov-2013  
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish  
value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF LP38691, LP38691-Q1, LP38693, LP38693-Q1 :  
Catalog: LP38691, LP38693  
•
Automotive: LP38691-Q1, LP38693-Q1  
•
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
•
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects  
•
Addendum-Page 5  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Oct-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LP38691DTX-1.8/NOPB TO-252  
LP38691DTX-2.5/NOPB TO-252  
NDP  
NDP  
NDP  
NDP  
NDP  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
3
3
3
3
3
6
6
6
6
6
6
6
6
6
6
6
6
6
2500  
2500  
2500  
2500  
2500  
1000  
1000  
1000  
1000  
4500  
4500  
4500  
4500  
1000  
1000  
1000  
1000  
1000  
330.0  
330.0  
330.0  
330.0  
330.0  
178.0  
178.0  
178.0  
178.0  
330.0  
330.0  
330.0  
330.0  
178.0  
178.0  
178.0  
178.0  
178.0  
16.4  
16.4  
16.4  
16.4  
16.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
6.9  
6.9  
6.9  
6.9  
6.9  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
10.5  
10.5  
10.5  
10.5  
10.5  
3.3  
2.7  
2.7  
2.7  
2.7  
2.7  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
16.0  
16.0  
16.0  
16.0  
16.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
Q2  
Q2  
Q2  
Q2  
Q2  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
LP38691DTX-3.3  
TO-252  
LP38691DTX-3.3/NOPB TO-252  
LP38691DTX-5.0/NOPB TO-252  
LP38691QSD-1.8/NOPB WSON  
LP38691QSD-2.5/NOPB WSON  
LP38691QSD-3.3/NOPB WSON  
LP38691QSD-5.0/NOPB WSON  
LP38691QSDX-1.8/NOPB WSON  
LP38691QSDX-2.5/NOPB WSON  
LP38691QSDX-3.3/NOPB WSON  
LP38691QSDX-5.0/NOPB WSON  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
LP38691SD-1.8  
WSON  
WSON  
WSON  
WSON  
WSON  
3.3  
LP38691SD-1.8/NOPB  
LP38691SD-2.5/NOPB  
LP38691SD-3.3/NOPB  
LP38691SD-5.0/NOPB  
3.3  
3.3  
3.3  
3.3  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Oct-2013  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LP38691SDX-1.8/NOPB WSON  
LP38691SDX-2.5/NOPB WSON  
LP38691SDX-3.3/NOPB WSON  
LP38691SDX-5.0/NOPB WSON  
NGG  
NGG  
NGG  
NGG  
6
6
6
6
5
5
5
5
5
5
5
5
5
5
5
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
4500  
4500  
4500  
4500  
1000  
1000  
1000  
1000  
1000  
1000  
2000  
2000  
2000  
2000  
2000  
1000  
1000  
1000  
1000  
4500  
4500  
4500  
4500  
1000  
1000  
1000  
1000  
1000  
1000  
1000  
4500  
4500  
4500  
4500  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
178.0  
178.0  
178.0  
178.0  
330.0  
330.0  
330.0  
330.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
330.0  
330.0  
330.0  
330.0  
12.4  
12.4  
12.4  
12.4  
16.4  
16.4  
16.4  
16.4  
16.4  
16.4  
16.4  
16.4  
16.4  
16.4  
16.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
3.3  
3.3  
3.3  
3.3  
7.0  
7.0  
7.0  
7.0  
7.0  
7.0  
7.0  
7.0  
7.0  
7.0  
7.0  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
7.5  
7.5  
7.5  
7.5  
7.5  
7.5  
7.5  
7.5  
7.5  
7.5  
7.5  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
1.0  
1.0  
1.0  
1.0  
2.2  
2.2  
2.2  
2.2  
2.2  
2.2  
2.2  
2.2  
2.2  
2.2  
2.2  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
8.0  
8.0  
12.0  
12.0  
12.0  
12.0  
16.0  
16.0  
16.0  
16.0  
16.0  
16.0  
16.0  
16.0  
16.0  
16.0  
16.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
Q1  
Q1  
Q1  
Q1  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
8.0  
8.0  
LP38693MP-1.8  
SOT-223 NDC  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
8.0  
LP38693MP-1.8/NOPB SOT-223 NDC  
LP38693MP-2.5/NOPB SOT-223 NDC  
LP38693MP-3.3  
SOT-223 NDC  
LP38693MP-3.3/NOPB SOT-223 NDC  
LP38693MP-5.0/NOPB SOT-223 NDC  
LP38693MPX-1.8/NOPB SOT-223 NDC  
LP38693MPX-2.5/NOPB SOT-223 NDC  
LP38693MPX-3.3  
SOT-223 NDC  
LP38693MPX-3.3/NOPB SOT-223 NDC  
LP38693MPX-5.0/NOPB SOT-223 NDC  
LP38693QSD-1.8/NOPB WSON  
LP38693QSD-2.5/NOPB WSON  
LP38693QSD-3.3/NOPB WSON  
LP38693QSD-5.0/NOPB WSON  
LP38693QSDX-1.8/NOPB WSON  
LP38693QSDX-2.5/NOPB WSON  
LP38693QSDX-3.3/NOPB WSON  
LP38693QSDX-5.0/NOPB WSON  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
LP38693SD-1.8  
LP38693SD-1.8/NOPB  
LP38693SD-2.5/NOPB  
LP38693SD-3.3  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
8.0  
8.0  
8.0  
8.0  
LP38693SD-3.3/NOPB  
LP38693SD-5.0  
8.0  
8.0  
LP38693SD-5.0/NOPB  
8.0  
LP38693SDX-1.8/NOPB WSON  
LP38693SDX-2.5/NOPB WSON  
LP38693SDX-3.3/NOPB WSON  
LP38693SDX-5.0/NOPB WSON  
8.0  
8.0  
8.0  
8.0  
Pack Materials-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Oct-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LP38691DTX-1.8/NOPB  
LP38691DTX-2.5/NOPB  
LP38691DTX-3.3  
TO-252  
TO-252  
TO-252  
TO-252  
TO-252  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
NDP  
NDP  
NDP  
NDP  
NDP  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
3
3
3
3
3
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
2500  
2500  
2500  
2500  
2500  
1000  
1000  
1000  
1000  
4500  
4500  
4500  
4500  
1000  
1000  
1000  
1000  
1000  
4500  
4500  
367.0  
367.0  
367.0  
367.0  
367.0  
210.0  
210.0  
210.0  
210.0  
367.0  
367.0  
367.0  
367.0  
210.0  
210.0  
210.0  
210.0  
210.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
185.0  
185.0  
185.0  
185.0  
367.0  
367.0  
367.0  
367.0  
185.0  
185.0  
185.0  
185.0  
185.0  
367.0  
367.0  
38.0  
38.0  
35.0  
38.0  
38.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
LP38691DTX-3.3/NOPB  
LP38691DTX-5.0/NOPB  
LP38691QSD-1.8/NOPB  
LP38691QSD-2.5/NOPB  
LP38691QSD-3.3/NOPB  
LP38691QSD-5.0/NOPB  
LP38691QSDX-1.8/NOPB  
LP38691QSDX-2.5/NOPB  
LP38691QSDX-3.3/NOPB  
LP38691QSDX-5.0/NOPB  
LP38691SD-1.8  
LP38691SD-1.8/NOPB  
LP38691SD-2.5/NOPB  
LP38691SD-3.3/NOPB  
LP38691SD-5.0/NOPB  
LP38691SDX-1.8/NOPB  
LP38691SDX-2.5/NOPB  
Pack Materials-Page 3  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Oct-2013  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LP38691SDX-3.3/NOPB  
LP38691SDX-5.0/NOPB  
LP38693MP-1.8  
WSON  
WSON  
NGG  
NGG  
NDC  
NDC  
NDC  
NDC  
NDC  
NDC  
NDC  
NDC  
NDC  
NDC  
NDC  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
NGG  
6
6
5
5
5
5
5
5
5
5
5
5
5
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
4500  
4500  
1000  
1000  
1000  
1000  
1000  
1000  
2000  
2000  
2000  
2000  
2000  
1000  
1000  
1000  
1000  
4500  
4500  
4500  
4500  
1000  
1000  
1000  
1000  
1000  
1000  
1000  
4500  
4500  
4500  
4500  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
210.0  
210.0  
210.0  
210.0  
367.0  
367.0  
367.0  
367.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
210.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
185.0  
185.0  
185.0  
185.0  
367.0  
367.0  
367.0  
367.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
185.0  
367.0  
367.0  
367.0  
367.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
SOT-223  
WSON  
LP38693MP-1.8/NOPB  
LP38693MP-2.5/NOPB  
LP38693MP-3.3  
LP38693MP-3.3/NOPB  
LP38693MP-5.0/NOPB  
LP38693MPX-1.8/NOPB  
LP38693MPX-2.5/NOPB  
LP38693MPX-3.3  
LP38693MPX-3.3/NOPB  
LP38693MPX-5.0/NOPB  
LP38693QSD-1.8/NOPB  
LP38693QSD-2.5/NOPB  
LP38693QSD-3.3/NOPB  
LP38693QSD-5.0/NOPB  
LP38693QSDX-1.8/NOPB  
LP38693QSDX-2.5/NOPB  
LP38693QSDX-3.3/NOPB  
LP38693QSDX-5.0/NOPB  
LP38693SD-1.8  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
WSON  
LP38693SD-1.8/NOPB  
LP38693SD-2.5/NOPB  
LP38693SD-3.3  
WSON  
WSON  
WSON  
LP38693SD-3.3/NOPB  
LP38693SD-5.0  
WSON  
WSON  
LP38693SD-5.0/NOPB  
LP38693SDX-1.8/NOPB  
LP38693SDX-2.5/NOPB  
LP38693SDX-3.3/NOPB  
LP38693SDX-5.0/NOPB  
WSON  
WSON  
WSON  
WSON  
WSON  
Pack Materials-Page 4  
MECHANICAL DATA  
NDP0003B  
TD03B (Rev F)  
www.ti.com  
MECHANICAL DATA  
NDC0005A  
www.ti.com  
MECHANICAL DATA  
NGG0006A  
SDE06A (Rev A)  
www.ti.com  
IMPORTANT NOTICE  
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
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Products  
Applications  
Audio  
www.ti.com/audio  
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dataconverter.ti.com  
www.dlp.com  
Automotive and Transportation www.ti.com/automotive  
Communications and Telecom www.ti.com/communications  
Amplifiers  
Data Converters  
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