LMV232 [TI]

用于 CDMA 和 WCDMA 的双通道集成均方根功率检测器;
LMV232
型号: LMV232
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
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用于 CDMA 和 WCDMA 的双通道集成均方根功率检测器

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LMV232  
www.ti.com  
SNWS017C DECEMBER 2004REVISED MARCH 2013  
LMV232 Dual-Channel Integrated Mean Square Power Detector for CDMA & WCDMA  
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1
FEATURES  
DESCRIPTION  
The LMV232 dual RF detector is designed for RF  
transmit power measurement in mobile phones. This  
dual mean square IC is especially suited for accurate  
power measurement of RF signals exhibiting high  
peak-to-average ratios used in 3G and UMTS/CDMA  
applications. The LMV232 saves calibration steps  
and system certification and is highly accurate. The  
circuit operates with a single supply from 2.5 to 3.3V.  
>20 dB Square-Law Detection Range  
2 Sequentially Selectable RF Inputs  
Low Power Consumption Shutdown Mode  
Externally Configurable Gain and LF Filter  
Bandwidth.  
Internal 50RF Termination Impedance  
Optimized for Use with 20 dB Directional  
Coupler  
The LMV232 contains a mean square detector with  
two sequentially selectable RF inputs. The RF input  
power range of the device has been optimized for use  
with a 20 dB directional coupler, without the need for  
additional external components. A single external RC  
combination between FB and OUT provides an  
externally configurable gain and LF filter bandwidth of  
the device.  
Lead Free 8-Bump DSBGA Package 1.5 x 1.5 x  
0.6 mm  
APPLICATIONS  
3G Mobile Communications  
UMTS  
The device has two digital interfaces. A shutdown  
function is available to set the device in a low-power  
shutdown mode. In case SD = HIGH, the device is in  
shutdown, if SD = LOW the device is active. The  
Band-Select function controls the selection of the  
active RF input channel. In case BS = HIGH, RFIN1 is  
active. In case BS = LOW, RFIN2 is active.  
WCDMA  
CDMA2000  
TD-SCDMA  
RF Control  
Wireless LAN  
PC Card and GPS Modules  
The dual mean square detector is offered in an 8-  
bump DSBGA 1.5 x 1.5 x 0.6 mm package. This  
DSBGA package has the smallest footprint and  
height.  
TYPICAL APPLICATION  
RF  
INPUT  
COUPLER  
ANTENNA  
PA1  
R2  
50W  
RF  
INPUT  
COUPLER  
PA2  
R3  
50W  
V
DD  
B3  
GND  
A1  
B1  
TO BASEBAND  
OUT  
FB  
RF  
RF  
1
2
IN  
IN  
A3  
C1  
1.5 nF  
R1  
6.2 kW  
LMV232  
C1  
A2  
C2  
C3  
SD  
BS  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2004–2013, Texas Instruments Incorporated  
 
LMV232  
SNWS017C DECEMBER 2004REVISED MARCH 2013  
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
(1)(2)  
ABSOLUTE MAXIMUM RATINGS  
Supply Voltage  
VDD - GND  
3.6V Max  
2000V  
(3)  
ESD Tolerance  
Human Body Model  
Machine Model  
200V  
Storage Temperature Range  
-65°C to 150°C  
150°C Max  
235°C  
(4)  
Junction Temperature  
Mounting Temperature  
Infrared or Convection (20 sec)  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test  
conditions, see the Electrical Characteristics.  
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.  
(3) Human body model: 1.5 kin series with 100 pF. Machine model, 0in series with 100 pF.  
(4) The maximum power dissipation is a function of TJ(MAX) , θJA and TA. The maximum allowable power dissipation at any ambient  
temperature is PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly into a PC board.  
(1)  
OPERATING RATINGS  
Supply Voltage  
2.5V to 3.3V  
Operating Temperature Range  
RF Frequency Range  
-40°C to +85°C  
50 MHz to 2 GHz  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test  
conditions, see the Electrical Characteristics.  
2.7 DC AND AC ELECTRICAL CHARACTERISTICS  
Unless otherwise specified, all limits are specified to VDD = 2.7V; TJ = 25°C. Boldface limits apply at temperature extremes.  
(1)  
Symbol  
IDD  
Parameter  
Supply Current  
Condition  
Min  
Typ  
Max  
Units  
Active Mode: SD = LOW, No RF  
Input Power Present  
9.8  
11  
13  
mA  
Shutdown: SD = 1.8V, No RF Input  
Power Present  
0.09  
5
30  
μA  
(2)  
(2)  
VLOW  
VHIGH  
IBS, ISD  
VOUT  
BS and SD Logic Low Level  
BS and SD Logic High Level  
Current into BS and SD pins  
Output Voltage Swing  
0.8  
5
V
V
1.8  
µA  
mV  
From Positive Rail, Sourcing,  
FB = 0V, IOUT = 1 mA  
20  
20  
80  
90  
From Negative Rail, Sinking,  
FB = 2.7V, IOUT = 1 mA  
60  
70  
mV  
mA  
IOUT  
Output Short Circuit  
Sourcing, FB = 0V, VOUT = 2.6V  
3.7  
2.7  
5.1  
5.5  
Sinking, FB = 2.7V, VOUT = 0.1V  
3.7  
2.7  
235  
230  
275  
280  
VOUT  
VPED  
IOS  
Output Voltage (Pedestal)  
Pedestal Variation Over  
No RF Input Power  
254  
5.4  
mV  
mV  
µA  
(3)  
Temperature  
Offset Current Variation Over  
1.17  
(3)  
Temperature  
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very  
limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical  
tables under conditions of internal self-heating where TJ > TA.  
(2) All limits are specified by design or statistical analysis.  
(3) Typical numbers represent the 3-sigma value of 10k units. 3-sigma value of variation between 40°C / 25°C and variation between 25°C  
/ 85°C.  
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2.7 DC AND AC ELECTRICAL CHARACTERISTICS (continued)  
Unless otherwise specified, all limits are specified to VDD = 2.7V; TJ = 25°C. Boldface limits apply at temperature extremes. (1)  
Symbol  
Parameter  
Condition  
Min  
Typ  
Max  
Units  
No RF Input Power Present, Output  
Loaded with 10 pF  
2.0  
6.0  
(4)  
tON  
Turn-on-Time  
μs  
(5)  
tR  
Rise Time  
Step from No Power to 0 dBm  
4.5  
μs  
Applied, Output Loaded with 10 pF  
RF Input = 1800 MHz, -10 dBm,  
Measured at 10 kHz  
en  
Output Referred Voltage Noise  
Gain Bandwidth Product  
Slew Rate  
400  
3.7  
nV/  
GBW  
SR  
MHz  
V/μs  
1.8  
1.0  
3.0  
(5)  
RIN  
DC Resistance  
See  
50.8  
-11  
+13  
dBm  
PIN  
RF Input Power Range(6)(7)  
RF Input Frequency = 900 MHz  
-24  
0
dBV  
900 MHz  
21  
10  
10  
10  
1800 MHz  
1900 MHz  
2000 MHz  
KDET  
Detection Slope  
μA/mW  
Lower 3 dB Point of Detection  
Slope  
fLOW  
fHIGH  
LF Input Corner Frequency  
HF Input Corner Frequency  
60  
MHz  
GHz  
Upper 3 dB Point of Detection  
Slope  
1.0  
900 MHz  
58  
62  
58  
55  
1800 MHz  
1900 MHz  
2000 MHz  
AISO  
Channel Isolation  
dB  
(4) Turn-on time is measured by connecting a 10 kresistor to the RFIN/EN pin. Be aware that in the actual application on the front page,  
the RC-time constant of resistor R2 and capacitor C adds an additional delay.  
(5) Typical values represent the most likely parametric norm.  
(6) Power in dBV = dBm + 13 when the impedance is 50.  
(7) Device is set in active mode with a 10 kresistor from VDD to RFIN/EN. RF signal is applied using a 50RF signal generator AC  
coupled to the RFIN/EN pin using a 100 pF coupling capacitor.  
CONNECTION DIAGRAM  
A2  
FB  
A1  
A3  
OUT  
RF  
1
IN  
B3  
B1  
GND  
V
DD  
C1  
C3  
SD  
RF  
2
IN  
C2  
BS  
Figure 1. 8-Bump DSBGA - Top View  
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Table 1. PIN DESCRIPTION  
Pin  
Name  
VDD  
Description  
Positive Supply Voltage  
Power Ground  
Power Supply  
Digital Inputs  
B3  
B1  
C3  
GND  
SD  
Schmitt-triggered Shutdown. The device is  
active for SD = LOW. For SD = HIGH, it is  
brought into a low-power shutdown mode.  
C2  
BS  
Schmitt-triggered Band Select pin. When BS =  
HIGH, RFIN1 is selected, when BS = LOW,  
RFIN2 is selected.  
Analog Inputs  
Feedback  
A1  
C1  
RFIN  
1
2
RF Input connected to the coupler output with  
optional attenuation to measure the Power  
Amplifier (PA) / Antenna RF power levels. Both  
RF inputs of the device are internally  
RFIN  
terminated with a 50resistance.  
A2  
A3  
FB  
Connected to inverting input of output amplifier.  
Enables user-configurable gain and bandwidth  
through external feedback network.  
Output  
Out  
Amplifier output  
BLOCK DIAGRAMS  
V
DD  
FB  
A2  
B3  
RF  
RF  
1
IN  
IN  
A1  
2
-
X
OUT  
A3  
+
DETECTOR  
2
C1  
+
LMV232  
C3  
SD  
C2  
BS  
B1  
GND  
Figure 2. LMV232  
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TYPICAL PERFORMANCE CHARACTERISTICS  
Unless otherwise specified, VDD = 2.7V, TJ = 25°C, R1 = 6.2 kand C1 = 1.5 nF (See typical application).  
Supply Current  
vs.  
Supply Voltage  
VOUT - VPEDESTAL  
vs.  
RF Input Power  
Figure 3.  
Figure 4.  
VOUT - VPEDESTAL  
vs.  
RF Input Power @ 900 MHz  
Input Referred Error  
vs.  
RF Input Power @ 900 MHz  
Figure 5.  
Figure 6.  
VOUT - VPEDESTAL  
vs.  
RF Input Power @ 1800 MHz  
Input Referred Error  
vs.  
RF Input Power @ 1800 MHz  
Figure 7.  
Figure 8.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Unless otherwise specified, VDD = 2.7V, TJ = 25°C, R1 = 6.2 kand C1 = 1.5 nF (See typical application).  
VOUT - VPEDESTAL  
Input Referred Error  
vs.  
vs.  
RF Input Power @ 1900 MHz  
RF Input Power @ 1900 MHz  
Figure 9.  
Figure 10.  
VOUT - VPEDESTAL  
vs.  
RF Input Power @ 2000 MHz  
Input Referred Error  
vs.  
RF Input Power @ 2000 MHz  
Figure 11.  
Figure 12.  
VOUT -VPEDESTAL  
vs.  
RF Input Power @ 1900 MHz  
Input Referred Error  
vs.  
RF Input Power @ 1900 MHz  
Figure 13.  
Figure 14.  
6
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Unless otherwise specified, VDD = 2.7V, TJ = 25°C, R1 = 6.2 kand C1 = 1.5 nF (See typical application).  
RF Input Impedance  
vs.  
Gain and Phase  
vs.  
Frequency  
Frequency  
@ Resistance and Reactance  
80  
60  
40  
20  
0
120  
90  
60  
30  
0
PHASE  
GAIN  
-20  
-40  
-30  
-60  
10k  
100k  
1M  
10M  
100M  
FREQUENCY (Hz)  
Figure 15.  
Figure 16.  
Sourcing Current  
vs.  
Output Voltage  
Sinking Current  
vs.  
Output Voltage  
Figure 17.  
Figure 18.  
Output Voltage  
vs.  
Sourcing Current  
Output Voltage  
vs.  
Sinking Current  
Figure 19.  
Figure 20.  
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APPLICATION NOTES  
The LMV232 mean square power detector is particularly suited for accurate power measurement of RF  
modulated signals that exhibit large peak to average ratios, i.e. large variations of the signal envelope. Such  
noise-like signals are encountered e.g. in CDMA and Wide-band CDMA cell-phones. Many power detection  
circuits, particularly those devised for constant-envelope modulated signals as in GSM, are based on peak  
detection and provide accurate power measurements for constant envelope or low-crest factor (ratio of peak to  
RMS) signals only. Such detectors are therefore not particularly suited for CDMA and WCDMA applications.  
TYPICAL APPLICATION  
The LMV232 is especially suited for CDMA and WCDMA applications with 2 Power Amplifiers (PA’s). A typical  
setup is given in Figure 21. The output power of one PA is measured at a time, depending on the bandselect pin  
(BS). If the BS = High RFIN1 is used for measurements, if BS = Low RFIN2 is used. The measured output voltage  
of the LMV232 is read by the ADC of the baseband chip and the gain of the PA is adjusted if necessary. With an  
input impedance of 50, the LMV232 can be directly connected to a 20 dB directional coupler without the need  
for an additional external attenuator. The setup can be adjusted to various PA output ranges by selection of a  
directional coupler or insertion of an additional (resistive) attenuator between the coupler outputs and the  
LMV232 RF inputs.  
The LMV232 conversion gain and bandwidth are configured by a resistor and a capacitor. Resistor R1 sets the  
conversion gain from RFIN to the output voltage. A higher resistor value will result in a higher conversion gain.  
The maximum dynamic range is achieved when the resistor value is as high as possible, i.e. the output signal  
just doesn’t clip and the voltage stays within the baseband ADC input range. The filter bandwidth is adjusted by  
capacitor C1. The capacitor value should be chosen such that the response time of the device is fast enough and  
modulation on the RF input signal is not visible at the output (ripple suppression). The 3 dB filter bandwidth of  
the output filter is determined by the time constant R1*C1. Generally a capacitor value of 1.5 nF is a good  
choice.  
PEAK TO AVERAGE RATIO SENSITIVITY  
The LMV232 power detector provides an accurate power measurement for arbitrary input signals, low and high  
peak-to-average ratios and crest factors. This is because its operation is not based on peak detection, but on  
direct determination of the mean square value. This is the most accurate power measurement, since it exactly  
implements the definition of power. A mean-square detector measures VRMS2 for all waveforms. Peak detection is  
less accurate because the relation between peak detection and mean square detection depends on the  
2
waveform. A peak detector measures P = VPEAK for all waveforms, while it should measures P = VPEAK2/2 (for R  
= 1) for a sine wave and P = VPEAK2/3 for a triangle wave for instance. For a CDMA signal, the measurement  
error can be in the order of 5 to 6 dB. For many wave forms, specially those with high peak-to-average ratios,  
peak detection is not accurate enough and therefore a mean square detector is recommended.  
MEAN SQUARE CONFORMANCE ERROR  
The LMV232 is a mean square detector and therefore should have an output voltage (in Volts) that linearly  
relates to the RF input power (in mW). The input referred error, with respect to an ideal linear mean square  
detector, is determined as a measure for the accuracy of the detector.  
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RF  
COUPLER  
ANTENNA  
INPUT  
PA1  
R2  
50W  
RF  
INPUT  
COUPLER  
PA2  
R3  
50W  
V
DD  
B3  
GND  
A1  
B1  
TO BASEBAND  
OUT  
FB  
RF  
RF  
1
2
IN  
IN  
A3  
C1  
1.5 nF  
R1  
6.2 kW  
LMV232  
C1  
A2  
C2  
C3  
SD  
BS  
Figure 21. Typical Application  
The detection curves of Figure 22 show the detector response to RF input power. To show the complete dynamic  
range on a logarithmic scale, the pedestal voltage (VPEDESTAL) is subtracted from the output. The pedestal  
voltage is defined as the output voltage in the absence of an RF input signal (at 25°C). The best-fit ideal mean  
square response is represented by the fitted curve in Figure 22. The input referred error of the detection curves  
with respect to this best-fit mean square response is determined as follows:  
Determine the best-fit mean square response.  
Determine the output referred error between the actual detector response and the ideal mean square  
response.  
Translate the output referred error to an input referred error.  
Figure 22. Detection Curve  
The best-fit linear curve is obtained from the detector response by means of linear regression. The output  
referred error is calculated with the formula:  
ErrordBV = 20*log[ (VOUT-VPEDESTAL)/(KDET*PIN) ]  
Where,  
Conversion gain of the ideal fitted curve KDET is in V/mW and the RF input power PIN in mW.  
To translate this output referred error (in dB) to an input referred error, it has to be divided by a factor of 2. This  
is due to the mean square characteristic of the device. The response of a mean square detector changes by 2  
dB for every dB change of the input power. Figure 23 depicts the resulting curve.  
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Figure 23. Input referred Error vs. RF Input Power  
Analyzing Figure 23 shows that three sections can be distinguished:  
At higher power levels the error increases.  
A middle section where the error is constant and relatively small.  
At lower power levels the error increases again.  
These three sections are leading back to three error mechanisms. At higher power levels the detectors output  
starts to saturate because the output voltage approaches the maximum signal swing that the detector can  
handle. The maximum output voltage of the device thus limits the upper end of the detection range. Also the  
maximum allowed ADC voltage of the baseband chip can limit the detection range at higher power levels. By  
adjusting the feedback resistor RFB of Figure 21 the upper end of the range can be shifted. This is valid until the  
detector cell inside the LMV232 is the limiting factor.  
The middle section of the error curve shows a small error variation. This is the section where the detector is used  
and is called the detection range of the detector. This range is limited on both sides by a maximum allowed error.  
For low input power levels, the variation of output voltage is very small. Therefore the measurement resolution  
ADC is important in order to measure those small variations. Offsets and temperature variation impact the  
accuracy at low power levels as well.  
DETECTION ERROR OVER TEMPERATURE  
Like any power detector device, the output signal of the LMV232 mean square power detector shows some  
residual variation over temperature that limits it's dynamic range. The variation determines the accuracy and  
range of input power levels for which the detector produces an accurate output signal.  
The error over temperature is mainly caused by the variation of the pedestal voltage. Besides this, a minimal  
error contribution leads back to the conversion gain variation of the detector. This conversion gain error is visible  
in the mid-power range, where the temperature error curves of Figure 23 run parallel to each other. Since the  
conversion gain variation is acceptable, the focus will be on the pedestal voltage variation over temperature.  
The pedestal voltage at 25°C is subtracted from the output voltage of each curve. Variations of the pedestal  
voltage over temperature are thus included in the error.  
The pedestal voltage variation itself consists of 2 error sources. One is the variation of the reference voltage  
VREF. The other is an offset current IOS that is generated inside the detector. This is depicted in Figure 24.  
Depending on the measurement strategy one or both error sources can be eliminated.  
The error sources of the pedestal voltage can be shown in a formula for VOUT  
VOUT = VREF + (IOS + IDET) * RFB  
:
Where IDET represents the intended detector output signal. In the absence of RF input power IDET equals zero.  
The formula for the pedestal voltage can therefore be written as:  
VPEDESTAL = VREF + IOS * RFB  
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R
FB  
FB  
I
DET  
-
OUT  
+
+
I
OS  
V
REF  
LMV232  
Figure 24. Pedestal Voltage  
For low input power levels, the pedestal variation VPEDESTAL is the dominant cause of error. Besides temperature  
variation of the pedestal voltage, which limits the lower end of the range, the pedestal voltage can also vary from  
part-to-part. By applying a suitable measurement strategy, the pedestal voltage error contribution can be  
significantly reduced or eliminated completely.  
POWER MEASUREMENT STRATEGIES  
This section describes the measurement strategies to reduce or eliminate the pedestal voltage variation. Which  
strategy is chosen depends on the possibilities for a factory trim and implementation of calibration procedures.  
Since the pedestal voltage is the reference level for the LMV232, it needs to be calibrated/measured at least  
once to eliminate part-to-part spread. This is required to determine the exact detector output signal. Because of  
process tolerances, the absolute part-to-part variation of the output voltage in the absence of RF input power will  
be in the order of 5 - 10%. All measurement strategies discussed eliminate this part-to-part spread.  
Strategy 1: Elimination of Part-to-Part Spread at Room Temperature Only  
In this strategy, the pedestal voltage is determined once during manufacturing and stored into the memory of the  
phone. At each power measurement this stored pedestal level is digitally subtracted from the measured output  
signal of the LMV232 during normal operation. The procedure is thus:  
Measure the detector output in the absence of RF power during manufacturing.  
Store the output voltage value in the cell phone memory (after it is analog-to-digital converted).  
Subtract the stored value from each detector output reading.  
R
FB  
FB  
I
DET  
-
+
-
OUT  
ADC  
+
+
I
OS  
V
REF  
LMV232  
Figure 25. Strategy 1: Room Temperature Calibration  
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The advantage of this strategy is that calibration is required only once during manufacturing and not during  
normal operation. The disadvantage is the fact that this method neither compensates for the residual  
temperature drift of the reference voltage VREF nor for offset current variations. Only part-to-part variations at  
room temperature are eliminated by this strategy. Especially the residual temperature drift negatively affects the  
measurement accuracy.  
Strategy 2: Elimination of Temperature Spread in VREF  
If software changes need to be reduced to a minimum and the baseband chip has a differential ADC, strategy 2  
can be used to eliminate temperature variations of the reference voltage VREF. One pin of the ADC is connected  
to FB and one is connected to OUT (Figure 26).  
FB  
-
ADC  
R
FB  
+
I
DET  
-
OUT  
+
+
I
OS  
V
REF  
LMV232  
Figure 26. Strategy 2: Differential Measurement  
The power measurement is independent of the reference voltage VREF, since the ADC reading is:  
VOUT-VFB = (IOS + IDET) * RFB  
The reading of the ADC obviously doesn’t contain the reference voltage source VREF anymore, but the  
contribution of the offset current remains present. This measurement is performed during normal operation.  
Therefore, it eliminates voltage reference variations over temperatures, as opposed to strategy 1. Also offset  
variations in the op amp are eliminated in this strategy.  
Strategy 3: Complete Elimination of Temperature Spread in Pedestal Voltage  
The most accurate measurement is strategy 3, which eliminates the temperature variation of both the reference  
voltage VREF and the offset current IOS. In this strategy, the pedestal voltage is measured regularly during  
operation of the phone, and stored in the phone memory. For each power measurement, the stored value is  
digitally subtracted from the (analog-to-digital converted) detector output signal. Since it measures the pedestal  
voltage itself for calibration it compensates both for the reference voltage VREF as well as for the offset current  
variation IOS. The frequency of the ‘calibration measurement’ can be significantly lower than those of power  
measurements, depending on how fast the temperature of the device changes.  
12  
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Copyright © 2004–2013, Texas Instruments Incorporated  
Product Folder Links: LMV232  
 
LMV232  
www.ti.com  
SNWS017C DECEMBER 2004REVISED MARCH 2013  
R
FB  
FB  
RF  
1
IN  
LMV232  
RF SIGNAL  
2
X
+
-
OUT  
ADC  
RF  
2
IN  
OFF  
BS  
Figure 27. Strategy 3: Calibration during normal operation  
The calibration measurement procedure can be explained with the aid of Figure 21, which depicts a typical power  
measurement setup using the LMV232. In normal operation, the two PA’s in the setup will never be active at the  
same time. One PA will produce the required transmit power, while the other one is off, (disabled) and produces  
no power. The pedestal voltage should be measured in the absence of RF power. This can be achieved by  
switching the Band Select (BS) pin such that the LMV232 input is selected where the disabled PA is connected  
to. The pedestal voltage at no input power can be read at the output pin.  
Using the Band Select (BS) control pin of the LMV232:  
Select the RF input that is connected to the disabled PA, by the BS pin.  
Measure the detector output.  
Store the result in the phone memory.  
Subtract the stored value from each detector power reading, until a new update is performed.  
Important advantages of this approach are that no factory trim is required and the temperature drift of the  
pedestal can be cancelled almost completely as well as the part-to-part spread. The remaining error is  
determined by the resolution of the ADC. A slight disadvantage is that on average more than one detector  
reading is required per power measurement. This overhead though can be made almost negligible in normal  
circumstances.  
Copyright © 2004–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
13  
Product Folder Links: LMV232  
 
LMV232  
SNWS017C DECEMBER 2004REVISED MARCH 2013  
www.ti.com  
REVISION HISTORY  
Changes from Revision B (March 2013) to Revision C  
Page  
Changed layout of National Data Sheet to TI format .......................................................................................................... 13  
14  
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Copyright © 2004–2013, Texas Instruments Incorporated  
Product Folder Links: LMV232  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
LMV232TL/NOPB  
ACTIVE  
DSBGA  
YZR  
8
250  
RoHS & Green  
SNAGCU  
Level-1-260C-UNLIM  
-40 to 85  
A
02  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
29-Oct-2021  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LMV232TL/NOPB  
DSBGA  
YZR  
8
250  
178.0  
8.4  
1.7  
1.7  
0.76  
4.0  
8.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
29-Oct-2021  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
DSBGA YZR  
SPQ  
Length (mm) Width (mm) Height (mm)  
208.0 191.0 35.0  
LMV232TL/NOPB  
8
250  
Pack Materials-Page 2  
MECHANICAL DATA  
YZR0008xxx  
D
0.600±0.075  
E
TLA08XXX (Rev C)  
D: Max = 1.54 mm, Min =1.479 mm  
E: Max = 1.54 mm, Min =1.479 mm  
4215045/A  
12/12  
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.  
B. This drawing is subject to change without notice.  
NOTES:  
www.ti.com  
IMPORTANT NOTICE AND DISCLAIMER  
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE  
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