LMS33460MG [TI]
节省空间的超低功耗 3V 欠压检测器 | DCK | 5 | -40 to 85;型号: | LMS33460MG |
厂家: | TEXAS INSTRUMENTS |
描述: | 节省空间的超低功耗 3V 欠压检测器 | DCK | 5 | -40 to 85 光电二极管 |
文件: | 总18页 (文件大小:633K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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LMS33460
SNVS158E –MARCH 2001–REVISED DECEMBER 2016
LMS33460 3-V Undervoltage Detector
1 Features
3 Description
The LMS33460 device is an undervoltage detector
1
•
•
•
•
•
•
•
Ultra-Low Power
3-V Detection
with a 3‑V threshold and extremely low power
consumption. The LMS33460 is specifically designed
to accurately monitor power supplies. It is especially
suited to battery-powered systems where low
quiescent current and small size are required. This IC
generates an active output whenever the input
voltage drops below 3 V.
Input Voltage From 0.8 V to 7 V
Open-Drain Output
Ultra-Small 5-Pin SC70 Package
Extended Temperature Range (–40°C to 85°C)
Ultra-Low Quiescent Current (1 µA Typical)
This part uses a precision on-chip voltage reference
and a comparator to measure the input voltage. Built-
in hysteresis helps to prevent erratic operation in the
presence of noise. The UVD is available in the ultra-
miniature 5-pin SC70 package.
2 Applications
•
•
•
•
•
•
•
Low Battery Voltage Detectors
Power Fail Indicators
Device Information(1)
Processor Reset Generators
Battery Backup Controls
Battery-Operated Equipment
Hand-Held Instruments
PART NUMBER
PACKAGE
BODY SIZE (NOM)
LMS33460
SC70 (5)
2.00 mm × 1.25 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Undervoltage Detectors
Typical Application
SC70 Package
V
DD
R
470 kW
V
V
DD
IN
RESET
V
OUT
CPU
LMS33460
GND
GND
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LMS33460
SNVS158E –MARCH 2001–REVISED DECEMBER 2016
www.ti.com
Table of Contents
7.4 Device Functional Modes.......................................... 7
Application and Implementation .......................... 8
8.1 Application Information.............................................. 8
8.2 Typical Application .................................................... 8
Power Supply Recommendations........................ 9
1
2
3
4
5
6
Features.................................................................. 1
Applications ........................................................... 1
Description ............................................................. 1
Revision History..................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 3
6.1 Absolute Maximum Ratings ...................................... 3
6.2 ESD Ratings.............................................................. 3
6.3 Recommended Operating Conditions....................... 3
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 4
6.6 Typical Characteristics.............................................. 5
Detailed Description .............................................. 6
7.1 Overview ................................................................... 6
7.2 Functional Block Diagram ......................................... 7
7.3 Feature Description................................................... 7
8
9
10 Layout..................................................................... 9
10.1 Layout Guidelines ................................................... 9
10.2 Layout Example ...................................................... 9
11 Device and Documentation Support ................. 10
11.1 Receiving Notification of Documentation Updates 10
11.2 Community Resources.......................................... 10
11.3 Trademarks........................................................... 10
11.4 Electrostatic Discharge Caution............................ 10
11.5 Glossary................................................................ 10
7
12 Mechanical, Packaging, and Orderable
Information ........................................................... 10
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (April 2013) to Revision E
Page
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
Deleted Ordering Information table; see POA at the end of the data sheet........................................................................... 1
Added Thermal Information table ........................................................................................................................................... 4
Changed RθJA value From: 478 To: 275.5.............................................................................................................................. 4
•
•
•
Changes from Revision C (April 2013) to Revision D
Page
•
Changed layout of National Semiconductor Data Sheet to TI format .................................................................................... 1
2
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SNVS158E –MARCH 2001–REVISED DECEMBER 2016
5 Pin Configuration and Functions
DCK Package
5-Pin SC70
Top View
NC
GND
GND
1
2
3
5
4
VIN
VOUT
Not to scale
Pin Functions
PIN
I/O
DESCRIPTION
NAME
GND
GND
NC
NO.
2
—
—
—
I
Internally connected to ground. Can be left floating or connected to GND (pin 3).
3
Ground
1
No connection
Input supply
Voltage output
VIN
5
VOUT
4
O
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
8
UNIT
V
Input voltage to GND
Output voltage to GND
8
V
Output continuous output current
Vapor phase IR convection reflow
Junction temperature, TJ
Storage temperature, Tstg
30
mA
°C
°C
°C
240
150
150
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
±2500
±200
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Machine model
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
MIN
MAX
UNIT
TJ
Operating junction temperature
–40
85
°C
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SNVS158E –MARCH 2001–REVISED DECEMBER 2016
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6.4 Thermal Information
LMS33460
DCK (SC70)
5 PINS
275.5
THERMAL METRIC(1)
UNIT
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
102.5
54
Junction-to-top characterization parameter
Junction-to-board characterization parameter
2.7
ψJB
53.3
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Electrical Characteristics
TJ = 25°C (unless otherwise noted)
PARAMETER
Detector threshold
TEST CONDITIONS
VIN falling
MIN
2.85
TYP
3
MAX
3.15
0.215
2.2
UNIT
V
VDET
VHYS
Detector voltage hysteresis
VIN rising
0.095
0.155
1
V
VIN = 2.87 V
VIN = 4.7 V
VIN = 7 V(1)
µA
µA
µA
V
IIN
Input supply current
1.2
25
3.6
200
7
VIN(MAX)
VIN(MIN)
Maximum operating voltage
Minimum operating voltage
0.7
1
1.1
V
TJ = –40°C to 85°C
1.3
VOUT = 0.05 V, VIN = 1.1 V
VOUT = 0.5 V, VIN = 1.5 V
CL = 10 pF, RL = 470 kΩ
TJ = –40°C to 85°C
0.01
2
0.6
11
IOUT(LOW)
Output current low
mA
tPDHL
Output delay time (output transition high to low )
Detect voltage temperature coefficient
130
±120
200
µs
ΔVDET/ΔT
PPM/°C
(1) Quiescent current increases substantially above 5.5 V, but is very low in the normal range below 5.5 V.
4
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LMS33460
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SNVS158E –MARCH 2001–REVISED DECEMBER 2016
6.6 Typical Characteristics
TA = 25°C, RL = 470 kΩ, and CL = 10 pF (unless otherwise noted)
3.30
3.25
100
(V RISING)
IN
3.20
3.15
10
V
3.10
3.05
HYS
1
V
(V FALLING)
DET IN
0.1
3.00
-25
0
25
50
75
100
-50
0
2
4
6
8
10
INPUT VOLTAGE V (V)
IN
TEMPERATURE (°C)
Figure 2. Supply Current vs Input Voltage
Figure 1. Detector Threshold vs Temperature
300
300
V
IN
250
200
150
100
50
250
200
150
100
50
V
IN
t
PDHL
t
PDLH
V
OUT
V
OUT
t
PDLH
t
PDHL
0
0
-40
-15
10
35
60
85
110
-40
-15
10
35
60
85
110
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 4. Propagation Delay Time (tPDLH) vs Temperature
Figure 3. Propagation Delay Time (tPDHL) vs Temperature
Figure 5. VOUT(LOW) vs VIN
Copyright © 2001–2016, Texas Instruments Incorporated
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SNVS158E –MARCH 2001–REVISED DECEMBER 2016
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7 Detailed Description
7.1 Overview
The LMS33460 is a micropower undervoltage-sensing circuit with an open-drain output configuration, which
requires a pull resistor.
The LMS33460 features a voltage reference, a comparator with precise thresholds and built-in hysteresis to
prevent erratic reset operation.
5.0V
VIN Rising
VIN Falling
Threshold
Threshold
VHYS
VDET
VIN(MIN)
0V
TIME
5.0V
2.5V
tPDHL
tPDLH
0.5V
0V
TIME
Figure 6. Propagation Delay Timing Diagram
+5.0 V
R
L
470 kW
LMS33640
GND
V
V
IN
OUT
C
L
10 pF
Copyright © 2016, Texas Instruments Incorporated
Figure 7. Propagation Delay Test Circuit
6
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SNVS158E –MARCH 2001–REVISED DECEMBER 2016
7.2 Functional Block Diagram
V
IN
LMS33460
V
OUT
V
REF
+
-
GND
Copyright © 2016, Texas Instruments Incorporated
7.3 Feature Description
The input supply (VIN) is the voltage that is being monitored and as it decreases past 3 V, the active-low output
(VOUT) transitions to a logic low state. When VIN rises above 3 V plus the built-in hysterisis, VOUT returns to its
original state of logic high. The LMS33460 has built-in hysteresis when the input supply is coming back up to
help prevent erratic output operation when the input voltage crosses the threshold.
The LMS33460 is useful in a variety of applications that require low voltage detection and is suited for battery-
powered systems where low quiescent current and small package size is required. It can also be used as a
precision reset circuit for microcontroller applications.
7.4 Device Functional Modes
7.4.1 Start Up
As the input voltage (VIN) ramps up, the output (VOUT) remains logic low until VIN reaches 3.15 V due to the built-
in hysteresis (nominally 150 mV). After VIN crosses that threshold, VOUT remains logic high until VIN drops below
the 3-V threshold. The hysteresis only applies to the VIN rising threshold.
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SNVS158E –MARCH 2001–REVISED DECEMBER 2016
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
This device is ideal to use in battery-powered or microprocessor based systems and can be used as a low
voltage indicator or reset circuit.
8.2 Typical Application
V
DD
R
470 kW
V
V
DD
IN
RESET
V
OUT
CPU
LMS33460
GND
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 8. Typical Application Schematic
8.2.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters.
Table 1. Design Parameters
PARAMETER
Input supply voltage maximum
VOUT maximum
EXAMPLE VALUE
7 V
7 V
VOUT minimum
0 V
Pullup resistor
470 kΩ
8.2.2 Detailed Design Procedure
The LMS33460 is a very easy to use low voltage detector. All that required is the input supply voltage and a
pullup resistor at the output. TI recommends 470 kΩ for the pullup resistor.
8
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SNVS158E –MARCH 2001–REVISED DECEMBER 2016
8.2.3 Application Curve
RL = 475 kΩ
* See Figure 4 for tPDLH values
** See Figure 3 for tPDHL values
Figure 9. LMS33460 Turnon
9 Power Supply Recommendations
The input of the LMS33460 is designed to handle up to the recommended supply voltage of 7 V and remain in
the recommended input voltage range during operation. No input capacitor is required.
10 Layout
10.1 Layout Guidelines
Place the output pullup resistor, and delay capacitor if used, as close as possible to the IC. Keep traces short
between the IC and the components used at the output to ensure the timing delay is as accurate as possible.
10.2 Layout Example
VIN
R1
VOUT
GND
Figure 10. Layout Example Diagram
Copyright © 2001–2016, Texas Instruments Incorporated
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SNVS158E –MARCH 2001–REVISED DECEMBER 2016
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11 Device and Documentation Support
11.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
10
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PACKAGE OPTION ADDENDUM
www.ti.com
30-Sep-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LMS33460MG
NRND
SC70
SC70
DCK
5
5
1000
Non-RoHS
& Green
Call TI
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
C33
C33
LMS33460MG/NOPB
ACTIVE
DCK
1000 RoHS & Green
SN
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
30-Sep-2021
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Jun-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LMS33460MG
SC70
SC70
DCK
DCK
5
5
1000
1000
178.0
178.0
8.4
8.4
2.25
2.25
2.45
2.45
1.2
1.2
4.0
4.0
8.0
8.0
Q3
Q3
LMS33460MG/NOPB
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Jun-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LMS33460MG
SC70
SC70
DCK
DCK
5
5
1000
1000
208.0
208.0
191.0
191.0
35.0
35.0
LMS33460MG/NOPB
Pack Materials-Page 2
PACKAGE OUTLINE
DCK0005A
SOT - 1.1 max height
S
C
A
L
E
5
.
6
0
0
SMALL OUTLINE TRANSISTOR
C
2.4
1.8
0.1 C
1.4
1.1
B
1.1 MAX
A
PIN 1
INDEX AREA
1
2
5
NOTE 4
(0.15)
(0.1)
2X 0.65
1.3
2.15
1.85
1.3
4
3
0.33
5X
0.23
0.1
0.0
(0.9)
TYP
0.1
C A B
0.15
0.22
0.08
GAGE PLANE
TYP
0.46
0.26
8
0
TYP
TYP
SEATING PLANE
4214834/C 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-203.
4. Support pin may differ or may not be present.
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EXAMPLE BOARD LAYOUT
DCK0005A
SOT - 1.1 max height
SMALL OUTLINE TRANSISTOR
PKG
5X (0.95)
1
5
5X (0.4)
SYMM
(1.3)
2
3
2X (0.65)
4
(R0.05) TYP
(2.2)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:18X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214834/C 03/2023
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
DCK0005A
SOT - 1.1 max height
SMALL OUTLINE TRANSISTOR
PKG
5X (0.95)
1
5
5X (0.4)
SYMM
(1.3)
2
3
2X(0.65)
4
(R0.05) TYP
(2.2)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:18X
4214834/C 03/2023
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
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