LMH6639 [TI]
具有禁能功能的 190MHz 轨到轨输出放大器;型号: | LMH6639 |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有禁能功能的 190MHz 轨到轨输出放大器 放大器 |
文件: | 总31页 (文件大小:1639K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LMH6639
www.ti.com
SNOS989G –JANUARY 2002–REVISED MARCH 2013
LMH6639 190MHz Rail-to-Rail Output Amplifier with Disable
Check for Samples: LMH6639
1
FEATURES
DESCRIPTION
The LMH6639 is a voltage feedback operational
amplifier with a rail-to-rail output drive capability of
110mA. Employing TI’s patented VIP10 process, the
LMH6639 delivers a bandwidth of 190MHz at a
current consumption of only 3.6mA. An input common
mode voltage range extending to 0.2V below the V−
and to within 1V of V+, makes the LMH6639 a true
single supply op-amp. The output voltage range
extends to within 30mV of either supply rail providing
the user with a dynamic range that is especially
desirable in low voltage applications.
2
•
•
•
•
•
•
•
•
•
•
•
•
(VS = 5V, Typical Values Unless Specified)
Supply Current (No Load) 3.6mA
Supply Current (Off Mode) 400μA
Output Resistance (Closed Loop 1MHz) 0.186Ω
−3dB BW (AV = 1) 190MHz
Settling Time 33nsec
Input Common Mode Voltage −0.2V to 4V
Output Voltage Swing 40mV from Rails
Linear Output Current 110mA
The LMH6639 offers a slew rate of 172V/μs resulting
in a full power bandwidth of approximately 28MHz.
The LMH6639 also offers protection for the input
transistors by using two anti-parallel diodes and a
series resistor connected across the inputs. The TON
value of 83nsec combined with a settling time of
33nsec makes this device ideally suited for
multiplexing applications (see application note for
details). Careful attention has been paid to ensure
device stability under all operating voltages and
modes. The result is a very well behaved frequency
response characteristic for any gain setting including
+1, and excellent specifications for driving video
cables including harmonic distortion of −60dBc,
differential gain of 0.12% and differential phase of
0.045°
Total Harmonic Distortion −60dBc
Fully Characterized for 3V, 5V and ±5V
No Output Phase Reversal with CMVR
Exceeded
•
•
•
•
Excellent Overdrive Recovery
Off Isolation 1MHz −70dB
Differential Gain 0.12%
Differential Phase 0.045°
APPLICATIONS
•
•
•
•
•
Active Filters
CD/DVD ROM
ADC Buffer Amplifier
Portable Video
Current Sense Buffer
100n
5V
+
+
-
V
OUT
INPUT
1k
75W
SD
-
V
75W
75W
V
REF
1k
10n
SHUTDOWN INPUT
Figure 1. Typical Single Supply Schematic
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002–2013, Texas Instruments Incorporated
LMH6639
SNOS989G –JANUARY 2002–REVISED MARCH 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
ESD Tolerance
2KV(3)
200V(4)
VIN Differential
±2.5V
Input Current
±10mA
Supply Voltage (V+ – V−)
Voltage at Input/Output pins
Storage Temperature Range
Junction Temperature(5)(6)
Soldering Information
13.5V
V+ +0.8V, V− −0.8V
−65°C to +150°C
+150°C
Infrared or Convection (20 sec)
Wave Soldering (10 sec)
235°C
260°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) Human body model, 1.5kΩ in series with 100pF.
(4) Machine Model, 0Ω in series with 200pF.
(5) The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board.
(6) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C.
Operating Ratings(1)
Supply Voltage (V+ to V−)
Operating Temperature Range(2)
3V to 12V
−40°C to +85°C
265°C/W
(2)
Package Thermal Resistance (θJA
)
SOT-23-6
SOIC-8
190°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics.
(2) The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board.
3V Electrical Characteristics
Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 3V, V− = 0V, VO = VCM = V+/2, and RL = 2kΩ to V+/2.
Boldface limits apply at the temperature extremes.
Symbol
BW
Parameter
Conditions
Min(1)
Typ(2)
170
63
Max(1)
Units
−3dB BW
AV = +1
120
MHz
AV = −1
BW0.1dB
FPBW
0.1dB Gain Flatness
Full Power Bandwidth
RF = 2.65kΩ , RL = 1kΩ,
16.4
21
MHz
MHz
AV = +1, VOUT = 2VPP, −1dB
V+ = 1.8V, V− = 1.2V
GBW
en
Gain Bandwidth product
AV = +1
83
19
MHz
Input-Referred Voltage Noise
RF = 33kΩ
f = 10kHz
f = 1MHz
f = 10kHz
f = 1MHz
nV/√Hz
16
in
Input-Referred Current Noise
Total Harmonic Distortion
RF = 1MΩ
1.30
0.36
−50
pA/√Hz
THD
f = 5MHz, VO = 2VPP, AV = +2,
dBc
RL = 1kΩ to V+/2
(1) All limits are ensured by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm.
2
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3V Electrical Characteristics (continued)
Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 3V, V− = 0V, VO = VCM = V+/2, and RL = 2kΩ to V+/2.
Boldface limits apply at the temperature extremes.
Symbol
TS
Parameter
Settling Time
Conditions
Min(1)
Typ(2)
Max(1)
Units
ns
VO = 2VPP, ±0.1%
37
SR
Slew Rate
AV = −1(3)
120
167
V/μs
mV
VOS
Input Offset Voltage
1.01
5
7
TC VOS
IB
Input Offset Average Drift
Input Bias Current
See(4)
See(5)
8
μV/°C
μA
−1.02
−2.6
−3.5
IOS
Input Offset Current
20
800
nA
1000
RIN
CIN
Common Mode Input Resistance AV = +1, f = 1kHz, RS = 1MΩ
6.1
MΩ
Common Mode Input
Capacitance
AV = +1, RS = 100kΩ
1.35
pF
CMVR
Input Common-Mode Voltage
Range
CMRR ≥ 50dB
−0.3
−0.2
−0.1
V
1.8
2
1.6
CMRR
AVOL
Common Mode Rejection Ratio
Large Signal Voltage Gain
See(6)
72
93
dB
dB
VO = 2VPP, RL = 2kΩ to V+/2
80
76
100
VO = 2VPP, RL = 150Ω to V+/2
74
78
70
VO
Output Swing
High
RL = 2kΩ to V+/2, VID = 200mV
RL = 150Ω to V+/2, VID = 200mV
RL = 50Ω to V+/2, VID = 200mV
RL = 2kΩ to V+/2, VID = −200mV
RL = 150Ω to V+/2, VID = −200mV
RL = 50Ω to V+/2, VID = −200mV
Sourcing to V+/2(7)
2.90
2.75
2.6
2.98
2.93
2.85
25
V
Output Swing
Low
75
75
200
300
mV
130
120
ISC
Output Short Circuit Current
50
35
mA
Sinking to V+/2(7)
67
140
40
IOUT
PSRR
IS
Output Current
VO = 0.5V from either supply
See(6)
99
96
mA
dB
Power Supply Rejection Ratio
Supply Current (Enabled)
72
No Load
3.5
5.6
7.5
mA
V
Supply Current (Disabled)
0.3
0.5
0.7
TH_SD
Threshold Voltage for Shutdown
Mode
V+−1.59
I_SD PIN Shutdown Pin Input Current
SD Pin Connect to 0V(8)
−13
83
μA
TON
On Time After Shutdown
Off Time to Shutdown
nsec
nsec
TOFF
ROUT
160
27
Output Resistance Closed Loop RF = 10kΩ, f = 1kHz, AV = −1
RF = 10kΩ, f = 1MHz, AV = −1
mΩ
266
(3) Slew rate is the average of the rising and falling slew rates.
(4) Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
(5) Positive current corresponds to current flowing into the device.
(6) f ≤ 1kHz (see typical performance Characteristics)
(7) Short circuit test is a momentary test.
(8) Positive current corresponds to current flowing into the device.
Copyright © 2002–2013, Texas Instruments Incorporated
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5V Electrical Characteristics
Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 5V, V− = 0V, VO = VCM = V+/2, and RL = 2kΩ to V+/2.
Boldface limits apply at the temperature extremes.
(2)
Symbol
BW
Parameter
Conditions
Min(1)
Typ
Max(1)
Units
−3dB BW
AV = +1
130
190
MHz
AV = −1
64
16.4
28
BW0.1dB
FPBW
GBW
en
0.1dB Gain Flatness
RF = 2.51kΩ, RL = 1kΩ,
AV = +1, VOUT = 2VPP, −1dB
AV = +1
MHz
MHz
MHz
Full Power Bandwidth
Gain Bandwidth Product
Input-Referred Voltage Noise
86
RF = 33kΩ
f = 10kHz
f = 1MHz
f = 10KHz
f = 1MHz
19
nV/√Hz
16
in
Input-Referred Current Noise
RF = 1MΩ
1.35
0.35
−60
pA/√Hz
THD
DG
DP
Total Harmonic Distortion
Differential Gain
f = 5MHz, VO = 2VPP, AV = +2
dBc
RL = 1kΩ to V+/2
NTSC, AV = +2
0.12
%
RL = 150Ω to V+/2
Differential Phase
NTSC, AV = +2
0.045
deg
RL = 150Ω to V+/2
TS
Settling Time
Slew Rate
VO = 2VPP, ±0.1%
AV = −1(3)
33
ns
SR
VOS
130
172
1.02
V/µs
Input Offset Voltage
5
7
mV
TC VOS
IB
Input Offset Average Drift
Input Bias Current
See(4)
See(5)
8
µV/°C
µA
−1.2
−2.6
−3.25
IOS
Input Offset Current
20
800
nA
1000
RIN
CIN
Common Mode Input Resistance AV = +1, f = 1kHz, RS = 1MΩ
6.88
1.32
MΩ
Common Mode Input
Capacitance
AV = +1, RS = 100kΩ
pF
CMVR
Common-Mode Input Voltage
Range
CMRR ≥ 50dB
−0.3
−0.2
−0.1
V
4
3.8
3.6
CMRR
AVOL
Common Mode Rejection Ratio
Large Signal Voltage Gain
See(6)
72
95
dB
dB
VO = 4VPP
86
82
100
RL = 2kΩ to V+/2
VO = 3.75VPP
74
70
77
RL = 150Ω to V+/2
VO
Output Swing
High
RL = 2kΩ to V+/2, VID = 200mV
RL = 150Ω to V+/2, VID = 200mV
RL = 50Ω to V+/2, VID = 200mV
RL = 2kΩ to V+/2, VID = −200mV
RL = 150Ω to V+/2, VID = −200mV
RL = 50Ω to V+/2, VID = −200mV
4.90
4.65
4.40
4.97
4.90
4.77
25
V
Output Swing
Low
100
200
400
85
mV
190
(1) All limits are ensured by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm.
(3) Slew rate is the average of the rising and falling slew rates.
(4) Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
(5) Positive current corresponds to current flowing into the device.
(6) f ≤ 1kHz (see typical performance Characteristics)
4
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SNOS989G –JANUARY 2002–REVISED MARCH 2013
5V Electrical Characteristics (continued)
Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 5V, V− = 0V, VO = VCM = V+/2, and RL = 2kΩ to V+/2.
Boldface limits apply at the temperature extremes.
(2)
Symbol
ISC
Parameter
Conditions
Sourcing to V+/2(7)
Min(1)
Typ
Max(1)
Units
Output Short Circuit Current
100
160
79
mA
Sinking from V+/2(7)
120
190
85
IOUT
PSRR
IS
Output Current
VO = 0.5V from either supply
See(6)
110
96
mA
dB
Power Supply Rejection Ratio
Supply Current (Enabled)
72
No Load
3.6
5.8
8.0
mA
V
Supply Current (Disabled)
0.40
0.8
1.0
TH_SD
Threshold Voltage for Shutdown
Mode
V+ −1.65
I_SD PIN Shutdown Pin Input Current
SD Pin Connected to 0V(5)
−30
83
μA
TON
On Time after Shutdown
Off Time to Shutdown
nsec
nsec
TOFF
ROUT
160
29
Output Resistance Closed Loop RF = 10kΩ, f = 1kHz, AV = −1
RF = 10kΩ, f = 1MHz, AV = −1
mΩ
253
(7) Short circuit test is a momentary test.
±5V Electrical Characteristics
Unless otherwise specified, all limits ensured for at TJ = 25°C, VSUPPLY = ±5V, VO = VCM = GND, and RL = 2kΩ to V+/2.
Boldface limits apply at the temperature extremes.
Symbol
BW
Parameter
Conditions
Min(1)
Typ(2)
228
65
Max(1)
Units
−3dB BW
AV = +1
150
MHz
AV = −1
BW0.1dB
FPBW
GBW
en
0.1dB Gain Flatness
RF = 2.26kΩ, RL = 1kΩ
AV = +1, VOUT = 2VPP, −1dB
AV = +1
18
MHz
MHz
MHz
Full Power Bandwidth
Gain Bandwidth Product
Input-Referred Voltage Noise
29
90
RF = 33kΩ
f = 10kHz
f = 1MHz
f = 10kHz
f = 1MHz
19
nV/√Hz
16
in
Input-Referred Current Noise
RF = 1MΩ
1.13
0.34
−71.2
pA/√Hz
THD
DG
DP
Total Harmonic Distortion
Differential Gain
f = 5MHz, VO = 2VPP, AV = +2,
RL = 1kΩ
dBc
NTSC, AV = +2
RL = 150Ω
0.11
%
Differential Phase
NTSC, AV = +2
0.053
deg
RL = 150Ω
TS
Settling Time
Slew Rate
VO = 2VPP, ±0.1%
AV = −1(3)
33
ns
V/µs
mV
SR
VOS
140
200
1.03
Input Offset Voltage
5
7
TC VOS
IB
Input Offset Voltage Drift
Input Bias Current
See(4)
See(5)
8
µV/°C
µA
−1.40
−2.6
−3.25
(1) All limits are ensured by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm.
(3) Slew rate is the average of the rising and falling slew rates.
(4) Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
(5) Positive current corresponds to current flowing into the device.
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±5V Electrical Characteristics (continued)
Unless otherwise specified, all limits ensured for at TJ = 25°C, VSUPPLY = ±5V, VO = VCM = GND, and RL = 2kΩ to V+/2.
Boldface limits apply at the temperature extremes.
Symbol
IOS
Parameter
Conditions
Min(1)
Typ(2)
Max(1)
Units
Input Offset Current
20
800
nA
1000
RIN
CIN
Common Mode Input Resistance AV +1, f = 1kHz, RS = 1MΩ
7.5
MΩ
Common Mode Input
Capacitance
AV = +1, RS = 100kΩ
1.28
pF
CMVR
Common Mode Input Voltage
Range
CMRR ≥ 50dB
−5.3
−5.2
−5.1
V
3.8
4.0
3.6
CMRR
AVOL
Common Mode Rejection Ratio
Large Signal Voltage Gain
See(6)
72
95
dB
dB
VO = 9VPP, RL = 2kΩ
88
84
100
VO = 8VPP, RL = 150Ω
74
77
70
VO
Output Swing
High
RL = 2kΩ, VID = 200mV
RL = 150Ω, VID = 200mV
RL = 50Ω, VID = 200mV
RL = 2kΩ, VID = −200mV
RL = 150Ω, VID = −200mV
RL = 50Ω, VID = −200mV
Sourcing to Ground(7)
4.85
4.55
3.60
4.96
4.80
V
V
4.55
Output Swing
Low
−4.97
−4.85
−4.65
168
−4.90
−4.55
−4.30
ISC
Output Short Circuit Current
100
80
mA
Sinking to Ground(7)
110
190
85
IOUT
PSRR
IS
Output Current
VO = 0.5V from either supply
See(8)
112
96
mA
dB
Power Supply Rejection Ratio
Supply Current (Enabled)
72
No Load
4.18
6.5
8.5
mA
V
Supply Current (Disabled)
0.758
1.0
1.3
TH_SD
Threshold Voltage for Shutdown
Mode
V+ − 1.67
I_SD PIN Shutdown Pin Input Current
SD Pin Connected to −5V(9)
−84
83
μA
TON
On Time after Shutdown
Off Time to Shutdown
nsec
nsec
TOFF
ROUT
160
32
Output Resistance Closed Loop
RF = 10kΩ, f = 1kHz, AV = −1
RF = 10kΩ, f = 1MHz, AV = −1
mΩ
226
(6) f ≤ 1kHz (see typical performance Characteristics)
(7) Short circuit test is a momentary test.
(8) f ≤ 1kHz (see typical performance Characteristics)
(9) Positive current corresponds to current flowing into the device.
6
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SNOS989G –JANUARY 2002–REVISED MARCH 2013
Connection Diagram
1
8
6
5
+
1
N/C
SD
V
OUTPUT
7
2
3
+
-
-IN
V
SD
-
2
3
V
6
5
-
OUTPUT
+
+IN
+
4
4
-IN
-
+IN
N/C
V
Figure 2. SOT-23-6
Top View
Figure 3. SOIC-8
Top View
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Typical Performance Characteristics
At TJ = 25°C, V+ = +2.5, V− = −2.5V, RF = 330Ω for AV = +2, RF = 1kΩ for AV = −1. Unless otherwise specified.
Output Sinking Saturation Voltage vs. IOUT
for Various Temperature
Output Sourcing Saturation Voltage vs. IOUT
for Various Temperature
1
1
85°C
125°C
0.9
0.9
0.8
0.8
25°C
125°C
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.7
85°C
0.6
25°C
0.5
0.4
-40°C
-40°C
0.3
0.2
0.1
V =±2.5V
S
V =±2.5V
S
0
20 40 60 80 100
140 160
0
120
180
200
0
20 40 60 80 100 120 140 160 180 200
I
(mA)
SOURCING
I
(mA)
SINK
Figure 4.
Figure 5.
Positive Output Saturation Voltage vs. VSUPPLY
for Various Temperature
Negative Output Saturation Voltage vs. VSUPPLY
for Various Temperature
0.2
0.2
125°C
0.18
0.18
125°C
0.16
0.16
85°C
0.14
85°C
0.14
0.12
0.1
0.12
0.1
-40°C
0.08
0.08
25°C
-40°C
0.06
0.04
0.02
0
0.06
25°C
0.04
R =150W TIED TO V /2
L
S
R
= 150W TIED TO V /
L
S
0.02
0
2
2
4
10
12
6
8
4
6
8
10
12
2
V
(V)
S
V
(V)
S
Figure 6.
Figure 7.
VOUT from V+ vs.
ISOURCE
VOUT from V− vs.
ISINK
10
10
V =±5V
S
V =±5V
S
1
1
125°C
125°C
-40°C
-40°C
0.1
0.1
25°C
25°C
85°C
85°C
0.01
0.1
0.01
0.1
1
10
100
1000
1
10
(mA)
100
1000
I
(mA)
I
SOURCE
SINK
Figure 8.
Figure 9.
8
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Typical Performance Characteristics (continued)
At TJ = 25°C, V+ = +2.5, V− = −2.5V, RF = 330Ω for AV = +2, RF = 1kΩ for AV = −1. Unless otherwise specified.
IOS vs.
VOS vs.
VS for Various Temperature
VS for 3 Representative Units
1
0.5
0
0.01
0
T
J
= 125°C
125°C
-0.01
-0.02
-0.03
-0.04
-0.05
-0.06
UNIT 1
UNIT 2
85°C
25°C
-0.5
-1
UNIT 3
-40°C
-1.5
-2
2
6
8
10
6
4
12
2
7
10
10
10
3
5
4
8
9
V
(V)
V (V)
S
S
Figure 10.
Figure 11.
VOS vs.
VOS vs.
VS for 3 Representative Units
VS for 3 Representative Units
0.6
0.4
0.2
0
1
0.5
0
T
= 85°C
J
UNIT 1
UNIT 2
T
= 25°C
J
UNIT 1
UNIT 2
-0.2
-0.4
-0.6
-0.8
-1
-0.5
-1
UNIT 3
UNIT 3
8
-1.2
-1.5
2
6
7
3
5
4
8
9
10
2
3
4
5
6
7
9
V
(V)
V
(V)
S
S
Figure 12.
Figure 13.
VOS vs.
ISUPPLY vs.
VCM for Various Temperature
VS for 3 Representative Units
7
6.5
6
0.6
0.4
V =10V
S
UNIT 1
UNIT 2
125°C
85°C
0.2
0
5.5
5
4.5
4
-0.2
-0.4
-0.6
-0.8
-1
T = -40°C
J
UNIT 3
3.5
3
25°C
2.5
2
-40°C
5
6
7
-1
0
1
2
3
4
8
9
2
6
7
10
3
5
4
8
9
V
(V)
V
S
(V)
CM
Figure 14.
Figure 15.
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Typical Performance Characteristics (continued)
At TJ = 25°C, V+ = +2.5, V− = −2.5V, RF = 330Ω for AV = +2, RF = 1kΩ for AV = −1. Unless otherwise specified.
ISUPPLY vs.
VS for Various Temperature
IB vs.
VS for Various Temperature
-1
-1.2
-1.4
-1.6
7
6.5
6
125°C
-40°C
85°C
5.5
5
4.5
-1.8
-2
25°C
25°C
4
3.5
3
-2.2
-2.4
-2.6
-40°C
85°C
2.5
2
125°C
1
0
4
6
8
2
3
4
5
6
9
2
7
8
10 11
V
(V)
S
V
(V)
S
Figure 16.
Figure 17.
Bandwidth for Various VS
Bandwidth for Various VS
6
6
0
3V
V = 3V
S
3
0
-6
V
= 10V
S
5V
-3
-6
-9
-12
-18
-24
10V
3V
5V
10V
100M 300M
A
= +1
A
= -1
V
-12
V
-30
-36
R
= 500W
R
= 500W
L
L
-15
1M
10M
100M 300M
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 18.
Figure 19.
Gain vs.
Frequency Normalized
Gain vs.
Frequency Normalized
5
0
5
0
-5
-5
A
= -1
V
A
= +1
V
-10
-15
-20
-25
-30
-35
-40
-45
-10
A
= -2
V
-15
-20
-25
-30
-35
-40
-45
A
= +2
V
A
= -5
V
A
= +5
V
A
= -10
V
A
V
= +10
R - 500W
L
R
L
= 500W
10k
100k
1M
10M
100M 300M
10k
100k
1M
10M
100M 300M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 20.
Figure 21.
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Typical Performance Characteristics (continued)
At TJ = 25°C, V+ = +2.5, V− = −2.5V, RF = 330Ω for AV = +2, RF = 1kΩ for AV = −1. Unless otherwise specified.
Gain and phase vs.
0.1dB Gain Flatness
Frequency for Various Temperature
0.20
0.00
70
60
50
40
30
20
10
0
140
PHASE
85/25/ & -40°C
120
100
10V
3V
80
60
40
20
-0.20
-0.40
-0.60
-0.80
-1.00
+
R
S
-
R
F
R
R
R
R
= 1k
S
F
F
F
0
5V
GAIN
85/25/ & -40°C
= 2.65k V = 3V
S
-10
-20
-30
-20
= 2.51k V = 5V
S
-40
= 2.26k V = 10V
S
-60
1
M
100k
1M
10M
100M 200M
100k
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 22.
Figure 23.
Frequency Response vs.
Temperature
Harmonic Distortion
10
5
-40
-50
-60
85°C
THD
0
3rd
-5
2nd
25°C
-70
-80
3rd
-10
-15
-20
-25
2nd
-40°C
f = 5MHz
A = +2
4th
A
= +1
V
-90
R
= 1k
= 5V
L
R
= 500W
L
V
S
-100
10
M
100k
1M
100M 300M
1
1.5
2
2.5
3
3.5
4
4.5 4.75
FREQUENCY (Hz)
OUTPUT VOLTAGE (V
)
PP
Figure 24.
Figure 25.
Differential Gain/Phase
On-Off Switching DC Voltage
0.14
0.07
0.06
0.05
0.04
V
= 5V
S
0.12
R
= 150W
L
0.1
0.08
0.06
0.04
0.02
0
f = 3.58MHz
SHUTDOWN PULSE
GAIN
0.03
0.02
0.01
0.00
-0.01
PHASE
0.8
SWITCHED DC VOLTAGE
-0.02
-0.04
A
= 2
V
-0.02
-0.03
-0.04
-0.05
0.3
0
-0.06
-0.08
-0.1
-0.2
80 ns/DIV
0
-100 -75 -50 -25
25 50 75 100
IRE
Figure 26.
Figure 27.
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Typical Performance Characteristics (continued)
At TJ = 25°C, V+ = +2.5, V− = −2.5V, RF = 330Ω for AV = +2, RF = 1kΩ for AV = −1. Unless otherwise specified.
On-Off Switching 10MHz
Slew Rate (Positive)
1.50
1.00
OUTPUT
SHUTDOWN PULSE
0.50
0.00
0.6
0.4
0.2
0
-0.50
-1.00
-1.50
SWITCHED 10MHz SIGNAL
-0.2
-0.4
-0.6
INPUT
A
V
= 2
100 ns/DIV
4 ns/DIV
Figure 28.
Figure 29.
Slew Rate (Negative)
On-Off Switching of Sinewave
1.50
1.00
0.50
SHUTDOWN PULSE
INPUT
1.00
0.00
0.00
-0.50
-1.00
-1.50
OUTPUT
-1.00
-2.00
A
= +2
V
25 ms/DIV
4 ns/DIV
Figure 30.
Figure 31.
CMRR vs.
Frequency
Power Sweep
120
100
80
20
15
1MHz
10MHz
A
V
= +1
= 5V
V
= 10V
V
S
S
10
5
25MHz
50MHz
V
5V
=
S
60
V
= 3V
S
0
-5
40
100MHz
20
-10
-15
0
10
100
1k
10k
100k
1M
10M
-10 -8 -6 -4 -2
0
4
12 14
8 10 16
2
6
INPUT (dBm)
FREQUENCY (Hz)
Figure 32.
Figure 33.
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Typical Performance Characteristics (continued)
At TJ = 25°C, V+ = +2.5, V− = −2.5V, RF = 330Ω for AV = +2, RF = 1kΩ for AV = −1. Unless otherwise specified.
PSRR vs.
Frequency
Current Noise
80
70
6
5
4
3
2
1
0
V
= 3V TO 10V
= 1M
S
NEGATIVE PSRR
R
F
60
50
40
30
20
10
0
POSITIVE PSRR
V
= 5V
= +1
S
A
V
10
100
1k
10k
100k
1M 10M
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 34.
Figure 35.
Closed Loop Output Resistance vs.
Frequency
Voltage Noise
1000
40
3V
R
A
= R = 10k
S
V
= 3V TO 10V
F
S
900
= -1
35
30
V
800
700
5V
25
20
600
500
400
15
10
5
300
200
100
0
10V
0
100k
100
1k
10k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY
FREQUENCY (Hz)
Figure 36.
Figure 37.
Off Isolation
Small Signal Pulse Response (AV = +1, RL = 2k )
-10
-20
-30
-40
-50
-60
-70
-80
A
V
= +1
A
= +2
V
V
= 3 to 10V
S
100k
1M
10M
100M
1k
10k
50 ns/DIV
FREQUENCY (Hz)
Figure 38.
Figure 39.
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Typical Performance Characteristics (continued)
At TJ = 25°C, V+ = +2.5, V− = −2.5V, RF = 330Ω for AV = +2, RF = 1kΩ for AV = −1. Unless otherwise specified.
Small Signal Pulse Response (AV = −1)
Large Signal Pulse Response (RL = 2k)
V
A
= 3V
S
V
= +1
R
L
= 100W
C
L
= ~ 5pF
V
= 3 to 10V
= 10pF
S
C
L
R
S
= 10W
50 ns/DIV
50 ns/DIV
Figure 40.
Figure 41.
Large Signal Pulse Response
Large Signal Pulse Response
V
A
= 5V
V
A
= 10V
= +1
S
V
S
V
= +1
R
= 100W
= ~5pF
R
C
= 100W
= ~ 5pF
L
L
L
L
C
50 ns/DIV
50 ns/DIV
Figure 42.
Figure 43.
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APPLICATION NOTES
INPUT AND OUTPUT TOPOLOGY
All input / output pins are protected against excessive voltages by ESD diodes connected to V+ and V- rails (see
Figure 44). These diodes start conducting when the input / output pin voltage approaches 1Vbe beyond V+ or V-
to protect against over voltage. These diodes are normally reverse biased. Further protection of the inputs is
provided by the two resistors (R in Figure 44), in conjunction with the string of anti-parallel diodes connected
between both bases of the input stage. The combination of these resistors and diodes reduces excessive
differential input voltages approaching 2Vbe. The most common situation when this occurs is when the device is
put in shutdown and the LMH6639’s inputs no longer follow each other. In such a case, the diodes may conduct.
As a consequence, input current increases, and a portion of signal may appear at the Hi-Z output. Another
possible situation for the conduction of these diodes is when the LMH6639 is used as a comparator (or with little
or no feedback). In either case, it is important to make sure that the subsequent current flow through the device
input pins does not violate the Absolute Maximum Ratings of the device. To limit the current through the
protection circuit extra series resistors can be placed. Together with the build in series resistors of several
hundred ohms this extra resistors can limit the input current to a safe number depending on the used application.
Be aware of the effect that extra series resistors may impact the switching speed of the device. A special
situation occurs when the part is configured for a gain of +1, which means the output is directly connected to the
inverting input, see Figure 45. When the part is now placed in shutdown mode the output comes in a high
impedance state and is unable to keep the inverting input at the same level as the non-inverting input. In many
applications the output is connected to the ground via a low impedance resistor. When this situation occurs and
there is a DC voltage offset of more than 2 volt between the non-inverting input and the output, current flows
from the non-inverting input through the series resistors R via the bypass diodes to the output. Now the input
current becomes much bigger than expected and in many cases the source at the input cannot deliver this
current and will drop down. Be sure in this situation that no DC current path is available from the non-inverting
input to the output pin, or from the output pin to the load resistor. This DC path is drawn by a curved line and can
be broken by placing one of the capacitors CIN or COUT or both, depending on the used application.
V+
V+
V+
R
R
IN-
IN+
V-
V-
Figure 44.
5V
7
2
-
6
SD
COUT
+
8
4
CIN
3
1k
Figure 45. DC path while in shutdown
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MULTIPLEXING 5 AND 10MHz
The LMH6639 may be used to implement a circuit which multiplexes two signals of different frequencies. Three
LMH6639 high speed op-amps are used in the circuit of Figure 46 to accomplish the multiplexing function. Two
LMH6639 are used to provide gain for the input signals, and the third device is used to provide output gain for
the selected signal.
330W
330W
1k
5V
5V
2
3
7
-
1k
2
3
6
IC1
4
7
-
OUT
6
IC3
8
FREQ 1
+
8
+
50
2k
4
5V
330W
330W
5V
V
REF
7
-
6
IC2
4
FREQ 2
+
8
50
SD
SD
Note: Pin numbers pertain to SOIC-8 package
Figure 46. Multiplexer
Multiplexing signals “FREQ 1” and “FREQ 2” exhibit closed loop non-inverting gain of +2 each based upon
identical 330Ω resistors in the gain setting positions of IC1 and IC2. The two multiplexing signals are combined
at the input of IC3, which is the third LMH6639. This amplifier may be used as a unity gain buffer or may be used
to set a particular gain for the circuit.
1.5
SHUTDOWN
1
0.5
0
-0.5
-1
TIME (400 ns/DIV)
Figure 47. Switching between 5 and 10MHz
1k resistors are used to set an inverting gain of −1 for IC3 in the circuit of Figure 46. Figure 47 illustrates the
waveforms produced. The upper trace shows the switching waveform used to switch between the 5MHz and
10MHz multiplex signals. The lower trace shows the output waveform consisting of 5MHz and 10MHz signals
corresponding to the high or low state of the switching signal.
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In the circuit of Figure 46, the outputs of IC1 and IC2 are tied together such that their output impedances are
placed in parallel at the input of IC3. The output impedance of the disabled amplifier is high compared both to the
output impedance of the active amplifier and the 330Ω gain setting resistors. The closed loop output resistance
for the LMH6639 is around 0.2Ω. Thus the active state amplifier output impedance dominates the input node to
IC3, while the disabled amplifier is assured of a high level of suppression of unwanted signals which might be
present at the output.
SHUTDOWN OPERATION
With SD pin left floating, the device enters normal operation. However, since the SD pin has high input
impedance, it is best tied to V+ for normal operation. This will avoid inadvertent shutdown due to capacitive pick-
up from nearby nodes. LMH6639 will typically go into shutdown when SD pin is more than 1.7V below V+,
regardless of operating supplies.
The SD pin can be driven by push-pull or open collector (open drain) output logic. Because the LMH6639's
shutdown is referenced to V+, interfacing to the shutdown logic is rather simple, for both single and dual supply
operation, with either form of logic used. Typical configurations are shown in Figure 48 and Figure 49 below for
push-pull output:
+
V
PUSH-PULL
OUTPUT
LOGIC GATE
-
V
S
V
+
-
+
-
V
SD
LMH6639
V
Figure 48. Shutdown Interface (Single Supply)
+
V
PUSH-PULL
OUTPUT
LOGIC GATE
+
-
V
V
+
-
+
-
V
SD
LMH6639
V
-
V
Figure 49. Shutdown Interface (Dual Supplies)
Common voltages for logic gates are +5V or +3V. To ensure proper power on/off with these supplies, the logic
should be able to swing to 3.4V and 1.4V minimum, respectively.
LMH6639’s shutdown pin can also be easily controlled in applications where the analog and digital sections are
operated at different supplies. Figure 50 shows a configuration where a logic output, SD, can turn the LMH6639
on and off, independent of what supplies are used for the analog and the digital sections:
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SD
+
-
+
-
+
-
+
V
V
SD
LMH6639
V
Figure 50. Shutdown Interface (Single Supply, Open Collector Logic)
The LMH6639 has an internal pull-up resistor on SD such that if left un-connected, the device will be in normal
operation. Therefore, no pull-up resistor is needed on this pin. Another common application is where the
transistor in Figure 50 above, would be internal to an open collector (open drain) logic gate; the basic
connections will remain the same as shown.
PCB LAYOUT CONSIDERATION AND COMPONENTS SELECTION
Care should be taken while placing components on a PCB. All standard rules should be followed especially the
ones for high frequency and/ or high gain designs. Input and output pins should be separated to reduce cross-
talk, especially under high gain conditions. A groundplane will be helpful to avoid oscillations. In addition, a
ground plane can be used to create micro-strip transmission lines for matching purposes. Power supply, as well
as shutdown pin de-coupling will reduce cross-talk and chances of oscillations.
Another important parameter in working with high speed amplifiers is the component values selection. Choosing
high value resistances reduces the cut-off frequency because of the influence of parasitic capacitances. On the
other hand choosing the resistor values too low could "load down" the nodes and will contribute to higher overall
power dissipation. Keeping resistor values at several hundreds of ohms up to several kΩ will offer good
performance.
Texas Instruments suggests the following evaluation boards as a guide for high frequency layout and as an aid in
device testing and characterization:
Device
Package
8-Pin SOIC
SOT-23-6
Evaluation Board PN
CLC730027
LMH6639MA
LMH6639MF
CLC730116
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SNOS989G –JANUARY 2002–REVISED MARCH 2013
REVISION HISTORY
Changes from Revision F (March 2013) to Revision G
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PACKAGE OPTION ADDENDUM
www.ti.com
19-May-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LMH6639 MDC
LMH6639MA
ACTIVE
NRND
DIESALE
SOIC
Y
D
0
8
400
95
RoHS & Green
Call TI
Level-1-NA-UNLIM
-40 to 85
-40 to 85
Samples
Non-RoHS
& Green
Call TI
SN
Level-1-235C-UNLIM
LMH66
39MA
LMH6639MA/NOPB
LMH6639MAX/NOPB
LMH6639MF
ACTIVE
ACTIVE
NRND
SOIC
SOIC
D
D
8
8
6
95
RoHS & Green
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
LMH66
39MA
Samples
Samples
2500 RoHS & Green
SN
LMH66
39MA
SOT-23
DBV
1000
Non-RoHS
& Green
Call TI
A81A
LMH6639MF/NOPB
LMH6639MFX/NOPB
ACTIVE
ACTIVE
SOT-23
SOT-23
DBV
DBV
6
6
1000 RoHS & Green
SN
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
A81A
A81A
Samples
Samples
3000 RoHS & Green
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
19-May-2022
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LMH6639MAX/NOPB
LMH6639MF
SOIC
D
8
6
6
6
2500
1000
1000
3000
330.0
178.0
178.0
178.0
12.4
8.4
8.4
8.4
6.5
3.2
3.2
3.2
5.4
3.2
3.2
3.2
2.0
1.4
1.4
1.4
8.0
4.0
4.0
4.0
12.0
8.0
8.0
8.0
Q1
Q3
Q3
Q3
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
LMH6639MF/NOPB
LMH6639MFX/NOPB
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LMH6639MAX/NOPB
LMH6639MF
SOIC
D
8
6
6
6
2500
1000
1000
3000
367.0
208.0
208.0
208.0
367.0
191.0
191.0
191.0
35.0
35.0
35.0
35.0
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
LMH6639MF/NOPB
LMH6639MFX/NOPB
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TUBE
*All dimensions are nominal
Device
Package Name Package Type
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
LMH6639MA
LMH6639MA
D
D
D
SOIC
SOIC
SOIC
8
8
8
95
95
95
495
495
495
8
8
8
4064
4064
4064
3.05
3.05
3.05
LMH6639MA/NOPB
Pack Materials-Page 3
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.189-.197
[4.81-5.00]
NOTE 3
.150
[3.81]
4X (0 -15 )
4
5
8X .012-.020
[0.31-0.51]
B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.010 [0.25]
C A B
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 - 8
.016-.050
[0.41-1.27]
DETAIL A
TYPICAL
(.041)
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED
METAL
EXPOSED
METAL
.0028 MAX
[0.07]
.0028 MIN
[0.07]
ALL AROUND
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
DBV0006A
SOT-23 - 1.45 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
0.1 C
1.75
1.45
B
1.45 MAX
A
PIN 1
INDEX AREA
1
2
6
5
2X 0.95
1.9
3.05
2.75
4
3
0.50
6X
0.25
C A B
0.15
0.00
0.2
(1.1)
TYP
0.25
GAGE PLANE
0.22
0.08
TYP
8
TYP
0
0.6
0.3
TYP
SEATING PLANE
4214840/C 06/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X (0.95)
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214840/C 06/2021
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X(0.95)
4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214840/C 06/2021
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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Copyright © 2022, Texas Instruments Incorporated
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