LMH6624MA [TI]

LMH6624/LMH6626 Single/Dual Ultra Low Noise Wideband Operational Amplifier; LMH6624 / LMH6626单通道/双通道超低噪声宽带运算放大器
LMH6624MA
型号: LMH6624MA
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

LMH6624/LMH6626 Single/Dual Ultra Low Noise Wideband Operational Amplifier
LMH6624 / LMH6626单通道/双通道超低噪声宽带运算放大器

运算放大器
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LMH6624  
www.ti.com  
SNOSA42F NOVEMBER 2002REVISED MARCH 2013  
LMH6624/LMH6626 Single/Dual Ultra Low Noise Wideband Operational Amplifier  
Check for Samples: LMH6624  
1
FEATURES  
DESCRIPTION  
The LMH6624/LMH6626 offer wide bandwidth  
(1.5GHz for single, 1.3GHz for dual) with very low  
input noise (0.92nV/Hz, 2.3pA/Hz) and ultra low dc  
errors (100μV VOS, ±0.1μV/°C drift) providing very  
precise operational amplifiers with wide dynamic  
range. This enables the user to achieve closed-loop  
gains of greater than 10, in both inverting and non-  
inverting configurations.  
2
VS = ±6V, TA = 25°C, AV = 20, (Typical values  
unless specified)  
Gain Bandwidth (LMH6624) 1.5GHz  
Input Voltage Noise 0.92nV/Hz  
Input Offset Voltage (limit over temp) 700µV  
Slew Rate 350V/μs  
Slew Rate (AV = 10) 400V/μs  
The LMH6624 (single) and LMH6626’s (dual)  
traditional voltage feedback topology provide the  
following benefits: balanced inputs, low offset voltage  
and offset current, very low offset drift, 81dB open  
loop gain, 95dB common mode rejection ratio, and  
88dB power supply rejection ratio.  
HD2 @ f = 10MHz, RL = 100Ω −63dBc  
HD3 @ f = 10MHz, RL = 100Ω −80dBc  
Supply Voltage Range (dual supply) ±2.5V to  
±6V  
Supply Voltage Range (single supply) +5V to  
+12V  
The LMH6624/LMH6626 operate from ± 2.5V to ± 6V  
in dual supply mode and from +5V to +12V in single  
supply configuration.  
Improved Replacement for the CLC425  
(LMH6624)  
LMH6624 is offered in SOT-23-5 and SOIC-8  
packages.  
Stable for Closed Loop |AV| 10  
The LMH6626 is offered in SOIC-8 and VSSOP-8  
packages.  
APPLICATIONS  
Instrumentation Sense Amplifiers  
Ultrasound Pre-amps  
Magnetic Tape & Disk Pre-amps  
Wide band active filters  
Professional Audio Systems  
Opto-electronics  
Medical Diagnostic Systems  
Connection Diagram  
LMH6624 5-Pin SOT-23  
LMH6624 8-Pin SOIC  
LMH6626 8-Pin SOIC/VSSOP  
1
8
N/C  
N/C  
1
5
+
V
OUT  
2
3
4
7
6
5
+
-IN  
-
V
-
2
V
+IN  
OUT  
N/C  
+
-
+
4
3
-
-IN  
+IN  
V
Figure 1. Top View  
Figure 2. Top View  
Figure 3. Top View  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2002–2013, Texas Instruments Incorporated  
LMH6624  
SNOSA42F NOVEMBER 2002REVISED MARCH 2013  
www.ti.com  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
(1)  
Absolute Maximum Ratings  
ESD Tolerance  
(2)  
Human Body Model  
Machine Model  
2000V  
200V  
(3)  
VIN Differential  
±1.2V  
13.2V  
V+ +0.5V, V0.5V  
Supply Voltage (V+ - V)  
Voltage at Input pins  
Soldering Information  
Infrared or Convection (20 sec.)  
Wave Soldering (10 sec.)  
235°C  
260°C  
Storage Temperature Range  
65°C to +150°C  
+150°C  
(4) (5)  
Junction Temperature  
,
(1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test  
conditions, see the Electrical Characteristics.  
(2) Human body model, 1.5kin series with 100pF.  
(3) Machine Model, 0in series with 200pF.  
(4) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in  
exceeding the maximum allowed junction temperature of 150°C.  
(5) The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient  
temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board.  
(1)  
Operating Ratings  
Operating Temperature Range  
(2) (3)  
,
40°C to +125°C  
(3)  
Package Thermal Resistance (θJA  
)
SOIC-8  
166°C/W  
265°C/W  
235°C/W  
SOT23–5  
VSSOP-8  
(1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test  
conditions, see the Electrical Characteristics.  
(2) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in  
exceeding the maximum allowed junction temperature of 150°C.  
(3) The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient  
temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board.  
2
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Copyright © 2002–2013, Texas Instruments Incorporated  
Product Folder Links: LMH6624  
LMH6624  
www.ti.com  
SNOSA42F NOVEMBER 2002REVISED MARCH 2013  
±2.5V Electrical Characteristics  
Unless otherwise specified, all limits ensured at TA = 25°C, V+ = 2.5V, V= 2.5V, VCM = 0V, AV = +20, RF = 500, RL =  
(1)  
100. Boldface limits apply at the temperature extremes. See  
.
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
(2)  
(3)  
(2)  
Dynamic Performance  
fCL  
3dB BW  
VO = 400mVPP (LMH6624)  
VO = 400mVPP (LMH6626)  
VO = 2VPP, AV = +20 (LMH6624)  
VO = 2VPP, AV = +20 (LMH6626)  
VO = 2VPP, AV = +10 (LMH6624)  
VO = 2VPP, AV = +10 (LMH6626)  
VO = 400mV Step, 10% to 90%  
VO = 400mV Step, 10% to 90%  
VO = 2VPP (Step)  
90  
80  
MHz  
SR  
Slew Rate(4)  
300  
290  
360  
340  
4.1  
4.1  
20  
V/μs  
tr  
tf  
Rise Time  
ns  
ns  
ns  
Fall Time  
ts  
Settling Time 0.1%  
Distortion and Noise Response  
en  
Input Referred Voltage Noise  
f = 1MHz (LMH6624)  
0.92  
1.0  
nV/Hz  
pA/Hz  
f = 1MHz (LMH6626)  
in  
Input Referred Current Noise  
f = 1MHz (LMH6624)  
2.3  
f = 1MHz (LMH6626)  
1.8  
HD2  
HD3  
2nd Harmonic Distortion  
3rd Harmonic Distortion  
fC = 10MHz, VO = 1VPP, RL 100Ω  
fC = 10MHz, VO = 1VPP, RL 100Ω  
60  
76  
dBc  
dBc  
Input Characteristics  
VOS  
IOS  
IB  
Input Offset Voltage  
VCM = 0V  
0.75  
0.95  
0.25  
+0.75  
+0.95  
mV  
(5)  
Average Drift  
VCM = 0V  
VCM = 0V  
±0.25  
μV/°C  
μA  
Input Offset Current  
1.5  
2.0  
0.05  
+1.5  
+2.0  
(5)  
Average Drift  
VCM = 0V  
VCM = 0V  
2
nA/°C  
Input Bias Current  
13  
+20  
μA  
+25  
(5)  
Average Drift  
VCM = 0V  
12  
6.6  
4.6  
0.9  
2.0  
nA/°C  
MΩ  
kΩ  
(6)  
RIN  
Input Resistance  
Common Mode  
Differential Mode  
Common Mode  
Differential Mode  
Input Referred,  
(6)  
CIN  
Input Capacitance  
pF  
CMRR  
Common Mode Rejection Ratio  
dB  
VCM = 0.5 to +1.9V  
VCM = 0.5 to +1.75V  
87  
85  
90  
Transfer Characteristics  
AVOL Large Signal Voltage Gain  
(LMH6624)  
RL = 100, VO = 1V to +1V  
75  
70  
79  
79  
dB  
dB  
(LMH6626)  
72  
RL = 100, VO = 1V to +1V  
67  
Xt  
Crosstalk Rejection  
f = 1MHz (LMH6626)  
75  
(1) Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very  
limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical  
tables under conditions of internal self-heating where TJ > TA. Absolute maximum ratings indicate junction temperature limits beyond  
which the device may be permanently degraded, either mechanically or electrically.  
(2) All limits are specified by testing or statistical analysis.  
(3) Typical Values represent the most likely parametric norm.  
(4) Slew rate is the slowest of the rising and falling slew rates.  
(5) Average drift is determined by dividing the change in parameter at temperature extremes into the total temperature change.  
(6) Simulation results.  
Copyright © 2002–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
3
Product Folder Links: LMH6624  
LMH6624  
SNOSA42F NOVEMBER 2002REVISED MARCH 2013  
www.ti.com  
±2.5V Electrical Characteristics (continued)  
Unless otherwise specified, all limits ensured at TA = 25°C, V+ = 2.5V, V= 2.5V, VCM = 0V, AV = +20, RF = 500, RL =  
100. Boldface limits apply at the temperature extremes. See (1)  
.
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
(2)  
(3)  
(2)  
Output Characteristics  
VO  
Output Swing  
RL = 100Ω  
±1.1  
±1.0  
±1.5  
±1.7  
V
No Load  
±1.4  
±1.25  
RO  
ISC  
Output Impedance  
f 100KHz  
10  
mΩ  
Output Short Circuit Current  
(LMH6624)  
90  
145  
Sourcing to Ground  
75  
(7) (8)  
ΔVIN = 200mV  
,
(LMH6624)  
Sinking to Ground  
ΔVIN = 200mV  
90  
75  
145  
120  
120  
100  
75  
(7) (8)  
,
mA  
(LMH6626)  
Sourcing to Ground  
ΔVIN = 200mV  
60  
50  
(7) (8)  
,
(LMH6626)  
Sinking to Ground  
ΔVIN = 200mV  
60  
50  
(7) (8)  
,
IOUT  
Output Current  
(LMH6624)  
Sourcing, VO = +0.8V  
Sinking, VO = 0.8V  
mA  
(LMH6626)  
Sourcing, VO = +0.8V  
Sinking, VO = 0.8V  
Power Supply  
PSRR  
Power Supply Rejection Ratio  
VS = ±2.0V to ±3.0V  
No Load  
82  
80  
90  
dB  
IS  
Supply Current (per channel)  
11.4  
16  
mA  
18  
(7) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in  
exceeding the maximum allowed junction temperature of 150°C.  
(8) Short circuit test is a momentary test. Output short circuit duration is 1.5ms.  
4
Submit Documentation Feedback  
Copyright © 2002–2013, Texas Instruments Incorporated  
Product Folder Links: LMH6624  
LMH6624  
www.ti.com  
SNOSA42F NOVEMBER 2002REVISED MARCH 2013  
±6V Electrical Characteristics  
Unless otherwise specified, all limits ensured at TA = 25°C, V+ = 6V, V= 6V, VCM = 0V, AV = +20, RF = 500, RL = 100.  
(1)  
Boldface limits apply at the temperature extremes. See  
.
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
(2)  
(3)  
(2)  
Dynamic Performance  
fCL  
3dB BW  
VO = 400mVPP (LMH6624)  
VO = 400mVPP (LMH6626)  
VO = 2VPP, AV = +20 (LMH6624)  
VO = 2VPP, AV = +20 (LMH6626)  
VO = 2VPP, AV = +10 (LMH6624)  
VO = 2VPP, AV = +10 (LMH6626)  
VO = 400mV Step, 10% to 90%  
VO = 400mV Step, 10% to 90%  
VO = 2VPP (Step)  
95  
85  
MHz  
(4)  
SR  
Slew Rate  
350  
320  
400  
360  
3.7  
3.7  
18  
V/μs  
tr  
tf  
Rise Time  
Fall Time  
ns  
ns  
ns  
ts  
Settling Time 0.1%  
Distortion and Noise Response  
en  
Input Referred Voltage Noise  
f = 1MHz (LMH6624)  
0.92  
1.0  
nV/Hz  
pA/Hz  
f = 1MHz (LMH6626)  
in  
Input Referred Current Noise  
f = 1MHz (LMH6624)  
2.3  
f = 1MHz (LMH6626)  
1.8  
HD2  
HD3  
2nd Harmonic Distortion  
3rd Harmonic Distortion  
fC = 10MHz, VO = 1VPP, RL 100Ω  
fC = 10MHz, VO = 1VPP, RL 100Ω  
63  
80  
dBc  
dBc  
Input Characteristics  
VOS Input Offset Voltage  
VCM = 0V  
VCM = 0V  
0.5  
0.7  
±0.10  
+0.5  
+0.7  
mV  
(5)  
Average Drift  
±0.2  
0.05  
μV/°C  
μA  
IOS  
Input Offset Current Average Drift (LMH6624)  
1.1  
2.5  
1.1  
2.5  
(5)  
VCM = 0V  
(LMH6626)  
VCM = 0V  
2.0  
2.5  
0.1  
2.0  
2.5  
VCM = 0V  
0.7  
13  
nA/°C  
IB  
Input Bias Current  
VCM = 0V  
+20  
μA  
+25  
(5)  
Average Drift  
VCM = 0V  
12  
6.6  
4.6  
0.9  
2.0  
nA/°C  
MΩ  
(6)  
RIN  
Input Resistance  
Common Mode  
Differential Mode  
Common Mode  
Differential Mode  
Input Referred,  
kΩ  
(6)  
CIN  
Input Capacitance  
pF  
CMRR  
Common Mode Rejection Ratio  
dB  
VCM = 4.5 to +5.25V  
VCM = 4.5 to +5.0V  
90  
87  
95  
Transfer Characteristics  
AVOL Large Signal Voltage Gain  
(LMH6624)  
RL = 100, VO = 3V to +3V  
77  
72  
81  
80  
dB  
(LMH6626)  
74  
RL = 100, VO = 3V to +3V  
70  
(1) Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very  
limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical  
tables under conditions of internal self-heating where TJ > TA. Absolute maximum ratings indicate junction temperature limits beyond  
which the device may be permanently degraded, either mechanically or electrically.  
(2) All limits are specified by testing or statistical analysis.  
(3) Typical Values represent the most likely parametric norm.  
(4) Slew rate is the slowest of the rising and falling slew rates.  
(5) Average drift is determined by dividing the change in parameter at temperature extremes into the total temperature change.  
(6) Simulation results.  
Copyright © 2002–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
5
Product Folder Links: LMH6624  
LMH6624  
SNOSA42F NOVEMBER 2002REVISED MARCH 2013  
www.ti.com  
±6V Electrical Characteristics (continued)  
Unless otherwise specified, all limits ensured at TA = 25°C, V+ = 6V, V= 6V, VCM = 0V, AV = +20, RF = 500, RL = 100.  
Boldface limits apply at the temperature extremes. See (1)  
.
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
(2)  
(3)  
(2)  
Xt  
Crosstalk Rejection  
f = 1MHz (LMH6626)  
75  
dB  
Output Characteristics  
VO  
Output Swing  
(LMH6624)  
RL = 100Ω  
±4.4  
±4.3  
±4.9  
±5.2  
±4.8  
±5.2  
(LMH6624)  
No Load  
±4.8  
±4.65  
V
(LMH6626)  
RL = 100Ω  
±4.3  
±4.2  
(LMH6626)  
No Load  
±4.8  
±4.65  
RO  
ISC  
Output Impedance  
f 100KHz  
10  
mΩ  
Output Short Circuit Current  
(LMH6624)  
100  
156  
Sourcing to Ground  
85  
(7) (8)  
ΔVIN = 200mV  
,
(LMH6624)  
Sinking to Ground  
ΔVIN = 200mV  
100  
85  
156  
120  
120  
100  
80  
(7) (8)  
,
mA  
(LMH6626)  
Sourcing to Ground  
ΔVIN = 200mV  
65  
55  
(7) (8)  
,
(LMH6626)  
Sinking to Ground  
ΔVIN = 200mV  
65  
55  
(7) (8)  
,
IOUT  
Output Current  
(LMH6624)  
Sourcing, VO = +4.3V  
Sinking, VO = 4.3V  
mA  
(LMH6626)  
Sourcing, VO = +4.3V  
Sinking, VO = 4.3V  
Power Supply  
PSRR  
Power Supply Rejection Ratio  
VS = ±5.4V to ±6.6V  
No Load  
82  
80  
88  
12  
dB  
IS  
Supply Current (per channel)  
16  
mA  
18  
(7) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in  
exceeding the maximum allowed junction temperature of 150°C.  
(8) Short circuit test is a momentary test. Output short circuit duration is 1.5ms.  
6
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Copyright © 2002–2013, Texas Instruments Incorporated  
Product Folder Links: LMH6624  
 
LMH6624  
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SNOSA42F NOVEMBER 2002REVISED MARCH 2013  
Typical Performance Characteristics  
Voltage Noise  
vs.  
Frequency  
Current Noise  
vs.  
Frequency  
Figure 4.  
Figure 5.  
Inverting Frequency Response  
Inverting Frequency Response  
5
4
5
4
V
V
= ±2.5V  
V
V
= ±6V  
= 5mV  
= 100W  
S
S
= 5mV  
IN  
PP  
IN  
PP  
3
2
1
0
3
2
1
0
A
V
= -10  
R
= 100W  
R
L
L
A
= -10  
V
A
= -20  
V
A
= -20  
V
A
A
= -40  
= -60  
V
A
A
= -40  
= -60  
V
-1  
-2  
-1  
-2  
V
V
V
V
-3  
-4  
-5  
-3  
-4  
-5  
A
= -80  
A
= -80  
A
= -100  
A
V
= -100  
V
1M  
100M  
1M  
100M  
1k  
100k  
10M  
1G  
1k  
100k  
10M  
1G  
10k  
10k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 6.  
Figure 7.  
Non-Inverting Frequency Response  
Non-Inverting Frequency Response  
5
4
5
4
V
= ±2.5V  
V
= ±6V  
S
S
R
= 500W  
R
= 500W  
F
F
3
3
2
1
V
= 2V  
PP  
V
= 2V  
PP  
O
O
2
1
A
V
= +10  
A
V
= +10  
0
0
A
= +200  
= +100  
V
A = +200  
V
-1  
-2  
-3  
-4  
-1  
A
= +100  
A
V
V
-2  
-3  
A
= +40  
A
= +40  
V
V
A
V
= +30  
A
= +30  
V
-4  
-5  
A
= +20  
A
= +20  
V
V
-5  
10k 100k 1M  
10M 100M 1G  
1k  
100k 1M  
10M  
1G  
1k  
10k  
100M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 8.  
Figure 9.  
Copyright © 2002–2013, Texas Instruments Incorporated  
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7
Product Folder Links: LMH6624  
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SNOSA42F NOVEMBER 2002REVISED MARCH 2013  
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Typical Performance Characteristics (continued)  
Open Loop Frequency Response Over Temperature  
Open Loop Frequency Response Over Temperature  
80  
70  
60  
50  
40  
30  
20  
10  
0
0
-40°C  
25°C  
-45  
PHASE  
-90  
125°C  
-40°C  
-135  
-180  
-225  
-270  
-315  
-360  
125°C  
25°C  
GAIN  
V
= ±2.5V  
1M  
S
100k  
10M  
100M  
1G  
FREQUENCY (Hz)  
Figure 10.  
Figure 11.  
Frequency Response with Cap. Loading  
Frequency Response with Cap. Loading  
5
5
33pF  
4
3
33pF  
4
3
15pF  
5pF  
15pF  
5pF  
10pF  
10pF  
2
2
1
1
0
0
0pF  
0pF  
V
A
= ±6V  
= +10  
V
A
= ±2.5V  
= +10  
S
-1  
-2  
-3  
-4  
-5  
S
V
-1  
-2  
-3  
-4  
-5  
V
R
R
R
= 250W  
R
R
R
= 250W  
F
F
= 10W  
= 10W  
ISO  
ISO  
= 1kW||C  
L
= 1kW||C  
L
L
L
1G  
1M  
10M  
100M  
1G  
1M  
10M  
100M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 12.  
Figure 13.  
Frequency Response with Cap. Loading  
Frequency Response with Cap. Loading  
5
5
V
A
= ±6V  
= +10  
V
A
= ±2.5V  
= +10  
S
V
S
V
4
4
3
3
R
R
R
= 250W  
R
R
R
= 250W  
F
F
0pF  
0pF  
5pF  
2
2
= 100W  
ISO  
= 1kW||C  
L
= 100W  
ISO  
5pF  
= 1kW||C  
L
1
1
L
L
0
0
-1  
-2  
-3  
-4  
-5  
-1  
-2  
-3  
-4  
-5  
10pF  
15pF  
33pF  
10pF  
15pF  
33pF  
1G  
1G  
1M  
10M  
100M  
1M  
10M  
100M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 14.  
Figure 15.  
8
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Typical Performance Characteristics (continued)  
Non-Inverting Frequency Response Varying VIN  
Non-Inverting Frequency Response Varying VIN  
5
5
V
A
= ±2.5V  
= +10  
V
A
= ±6V  
= +10  
S
S
4
4
V
V
3
2
3
2
R
F
= 500W  
R
F
= 500W  
V
IN  
= 20mV  
V
= 20mV  
IN  
1
1
0
0
-1  
-1  
-2  
-3  
-4  
-5  
-2  
-3  
-4  
-5  
V
= 200mV  
10M  
IN  
V
IN  
= 200mV  
10M  
100k  
1M  
100M  
1G  
100k  
1M  
100M  
1G  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 16.  
Figure 17.  
Non-Inverting Frequency Response Varying VIN (LMH6624)  
Non-Inverting Frequency Response Varying VIN (LMH6626)  
5
5
V
A
= ±2.5V  
= +20  
S
V
A
= ±2.5V  
= +20  
S
V
4
4
3
V
3
2
R
= 500W  
F
R
= 500W  
F
2
1
1
0
V
IN  
= 20mV  
0
V
IN  
= 20mV  
-1  
-1  
-2  
-3  
-4  
-5  
-2  
-3  
-4  
-5  
V
= 200mV  
IN  
V
= 200mV  
10M  
IN  
100k  
1M  
10M  
100M  
1G  
100k  
1M  
100M  
1G  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 18.  
Figure 19.  
Non-Inverting Frequency Response Varying VIN (LMH6624)  
Non-Inverting Frequency Response Varying VIN (LMH6626)  
5
5
V
A
= ±6V  
= +20  
S
V
A
= ±6V  
= +20  
S
V
4
4
3
2
V
3
2
R
= 500W  
F
R
= 500W  
F
1
1
0
V = 20mV  
IN  
V
= 20mV  
0
-1  
-2  
-3  
-4  
-5  
IN  
-1  
-2  
-3  
-4  
-5  
V
= 200mV  
IN  
V
= 200mV  
10M  
IN  
100k  
1M  
10M  
100M  
1G  
100k  
1M  
100M  
1G  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 20.  
Figure 21.  
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Typical Performance Characteristics (continued)  
Sourcing Current  
vs.  
VOUT (LMH6624)  
Sourcing Current  
vs.  
VOUT (LMH6626)  
160  
140  
120  
-40°C  
-40°C  
140  
120  
100  
80  
125°C  
100  
25°C  
25°C  
80  
60  
40  
125°C  
60  
40  
20  
0
20  
0
V
= ±2.5V  
V
= ±2.5V  
S
S
0
0.5  
1
1.5  
0
0.5  
1
1.5  
V
(V)  
OUT  
V
(V)  
OUT  
Figure 22.  
Figure 23.  
Sourcing Current  
vs.  
VOUT (LMH6624)  
Sourcing Current  
vs.  
VOUT (LMH6626)  
140  
120  
180  
160  
140  
120  
-40°C  
-40°C  
25°C  
125°C  
100  
80  
25°C  
125°C  
100  
80  
60  
40  
20  
0
60  
40  
20  
0
V
= ±6V  
V
= ±6V  
S
S
0
1
2
3
4
5
0
1
2
3
4
5
V
(V)  
OUT  
V
(V)  
OUT  
Figure 24.  
Figure 25.  
VOS  
vs.  
VOS  
vs.  
VSUPPLY (LMH6624)  
VSUPPLY (LMH6626)  
150  
100  
50  
50  
0
125°C  
125°C  
-50  
0
25°C  
25°C  
-100  
-150  
-200  
-250  
-300  
-50  
-100  
-150  
-200  
-250  
-40°C  
-40°C  
4
5
6
7
8
9
10 11 12  
4
5
7
8
9
10 11 12  
6
V
(V)  
V
(V)  
SUPPLY  
SUPPLY  
Figure 26.  
Figure 27.  
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Typical Performance Characteristics (continued)  
Sinking Current  
vs.  
VOUT (LMH6624)  
Sinking Current  
vs.  
VOUT (LMH6626)  
140  
120  
160  
140  
-40°C  
-40°C  
120  
100  
80  
125°C  
25°C  
100  
80  
125°C  
25°C  
60  
60  
40  
40  
20  
20  
0
0
V
= ±2.5V  
S
V
= ±2.5V  
S
-20  
0
0.5  
1
1.5  
0
0
4
0.5  
1
1.5  
V
(V)  
V
(V)  
OUT  
OUT  
Figure 28.  
Figure 29.  
Sinking Current  
vs.  
VOUT (LMH6624)  
Sinking Current  
vs.  
VOUT (LMH6626)  
140  
120  
180  
160  
140  
120  
-40°C  
-40°C  
100  
80  
125°C  
125°C  
25°C  
100  
80  
60  
40  
20  
0
25°C  
60  
40  
20  
0
V
= ±6V  
S
V
= ±6V  
1
S
2
3
4
5
0
1
2
3
4
5
V
(V)  
V
(V)  
OUT  
OUT  
Figure 30.  
Figure 31.  
IOS  
vs.  
Crosstalk Rejection  
vs.  
Frequency (LMH6626)  
VSUPPLY  
0.2  
0
V
= 60mV  
= +20  
IN  
PP  
-20  
0.15  
0.1  
A
R
V
= 100W  
L
CH 1 OUTPUT  
-40  
25°C  
0.05  
0
-60  
-80  
125°C  
V
= ±2.5V  
S
-100  
-0.05  
-0.1  
-0.15  
CH 2 OUTPUT  
-120  
-140  
-40°C  
V
= ±6V  
S
1M  
100k  
10M  
100M  
1k  
10k  
5
6
7
8
9
10 11 12  
FREQUENCY (Hz)  
V
(V)  
SUPPLY  
Figure 32.  
Figure 33.  
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Typical Performance Characteristics (continued)  
Distortion  
vs.  
Frequency  
Distortion  
vs.  
Frequency  
0
0
A
= +20  
A
= +10  
V
V
R
= 100W  
-20  
-40  
R
L
= 100W  
L
-20  
-40  
HD2  
-60  
-80  
V
V
= ±6V,  
S
HD2  
V
= ±6V, V = 2V  
PP  
S
O
-60  
-80  
= 2V  
PP  
O
HD3  
V
V
= ±2.5V,  
S
-100  
-120  
-140  
= 1V  
O
PP  
-100  
V
S
= ±2.5V, V = 1V  
O
HD3  
1M  
PP  
-120  
100k  
1M  
10M  
100M  
100k  
100M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 34.  
Figure 35.  
Distortion  
vs.  
Frequency  
Distortion  
vs.  
Gain  
-50  
-60  
0
HD2  
A
= +20  
V
= ±6V  
= 2V  
PP  
V
S
R
= 500W  
V
L
-20  
-40  
O
HD2  
V
= ±2.5V,  
-70  
-80  
S
-60  
-80  
V
= 1V  
PP  
O
HD3  
-100  
-120  
-140  
V
V
= ±2.5V  
S
-90  
HD3  
= ±6V, V = 2V  
f
= 1MHz  
C
= 1V  
PP  
O
R
= 100W  
L
V
S
O
PP  
-100  
0
20  
40  
60  
80  
100  
100k  
1M  
10M  
100M  
FREQUENCY (Hz)  
GAIN (V/V)  
Figure 36.  
Figure 37.  
Distortion  
vs.  
VOUT Peak to Peak  
Distortion  
vs.  
VOUT Peak to Peak  
0
0
-20  
-40  
-60  
-80  
A
= +20  
A
= +20  
V
S
V
V
= ±6V  
V
= ±2.5V  
S
-20  
R
= 100W  
HD2  
R
= 100W  
L
L
f
= 10MHz  
C
f
= 10MHz  
C
-40  
-60  
-80  
HD2  
HD3  
f
= 1MHz  
f
= 1MHz  
C
C
-100  
-100  
-120  
HD3  
-120  
0
0.5  
1
1.5  
V
2
2.5  
(V)  
3
3.5  
4
0
2
4
6
8
10  
12  
OUT  
V
(V )  
OUT PP  
Figure 38.  
Figure 39.  
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Typical Performance Characteristics (continued)  
Non-Inverting Large Signal Pulse Response  
Non-Inverting Large Signal Pulse Response  
V
S
V
O
A
V
= ±2.5V  
V
S
V
O
A
V
= ±6V  
= 1V  
PP  
= 1V  
PP  
= +10  
= +20  
R
L
= 100W  
R
L
= 100W  
10 ns/DIV  
10 ns/DIV  
Figure 40.  
Figure 41.  
Non-Inverting Small Signal Pulse Response  
Non-Inverting Small Signal Pulse Response  
V
S
V
O
A
V
= ±2.5V  
= 200mV  
= +10  
V
S
V
O
A
V
= ±6V  
= 500mV  
= +20  
R
L
= 100W  
R
L
= 100W  
10 ns/DIV  
10 ns/DIV  
Figure 42.  
Figure 43.  
PSRR  
vs.  
Frequency  
PSRR  
vs.  
Frequency  
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-100  
0
-20  
-40  
V
S
= ±2.5V  
V
= ±6V  
+PSRR, A +10  
S
V
+PSRR, A +20  
V
+PSRR, A = +10  
V
+PSRR, A = +20  
-60  
-80  
V
-PSRR, A +20  
-PSRR, A = +10  
V
V
-100  
-120  
-140  
-PSRR, A = +20  
V
-PSRR, A +10  
V
1M  
100M  
1k  
1M  
100M  
1k  
100k  
10M  
1G  
10k 100k  
10M  
1G  
10k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 44.  
Figure 45.  
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Typical Performance Characteristics (continued)  
Input Referred CMRR  
vs.  
Input Referred CMRR  
vs.  
Frequency  
Frequency  
0
-10  
-20  
0
-10  
-20  
V
V
= ±2.5V  
V
V
= ±6V  
S
S
= 5mV  
PP  
= 5mV  
PP  
IN  
IN  
-30  
-40  
-50  
-30  
-40  
-50  
A
= +10  
V
A
= +10  
V
-60  
-60  
-70  
-80  
-70  
-80  
A
V
= +20  
A = +20  
V
-90  
-90  
1M  
1M  
1k  
10k  
100k  
10M  
100M  
1k  
10k  
100k  
10M  
100M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 46.  
Figure 47.  
Amplifier Peaking with Varying RF  
Amplifier Peaking with Varying RF  
= 2kW  
5
5
R
F
R
F
= 2kW  
4
R
F
= 1.5kW  
4
R
= 1.5kW  
F
3
2
3
2
1
R
= 1kW  
F
R
F
= 1kW  
R
= 750W  
F
R
F
= 750W  
1
0
0
-1  
-2  
-3  
-4  
-5  
R
= 511W  
F
-1  
-2  
-3  
-4  
-5  
R
= 511W  
F
V
= ±6V  
V
A
= ±2.5V  
= +10  
S
S
V
A
= +10V  
= 100W  
V
R
R
= 100W  
L
L
100M  
1G  
10M  
10M  
100M  
1G  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 48.  
Figure 49.  
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APPLICATION SECTION  
Figure 50. Non-Inverting Amplifier Configuration  
INTRODUCTION  
The LMH6624/LMH6626 are very wide gain bandwidth, ultra low noise voltage feedback operational amplifiers.  
Their excellent performances enable applications such as medical diagnostic ultrasound, magnetic tape & disk  
storage and fiber-optics to achieve maximum high frequency signal-to-noise ratios. The set of characteristic plots  
in the "Typical Performance" section illustrates many of the performance trade offs. The following discussion will  
enable the proper selection of external components to achieve optimum system performance.  
BIAS CURRENT CANCELLATION  
To cancel the bias current errors of the non-inverting configuration, the parallel combination of the gain setting  
(Rg) and feedback (Rf) resistors should equal the equivalent source resistance (Rseq) as defined in Figure 50.  
Combining this constraint with the non-inverting gain equation also seen in Figure 50, allows both Rf and Rg to  
be determined explicitly from the following equations:  
Rf = AVRseq and Rg = Rf/(AV-1)  
(1)  
When driven from a 0source, such as the output of an op amp, the non-inverting input of the  
LMH6624/LMH6626 should be isolated with at least a 25series resistor.  
As seen in Figure 51, bias current cancellation is accomplished for the inverting configuration by placing a  
resistor (Rb) on the non-inverting input equal in value to the resistance seen by the inverting input (Rf||(Rg+Rs)).  
Rb should to be no less than 25for optimum LMH6624/LMH6626 performance. A shunt capacitor can minimize  
the additional noise of Rb.  
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Figure 51. Inverting Amplifier Configuration  
TOTAL INPUT NOISE vs. SOURCE RESISTANCE  
To determine maximum signal-to-noise ratios from the LMH6624/LMH6626, an understanding of the interaction  
between the amplifier’s intrinsic noise sources and the noise arising from its external resistors is necessary.  
Figure 52 describes the noise model for the non-inverting amplifier configuration showing all noise sources. In  
+
addition to the intrinsic input voltage noise (en) and current noise (in = in = in ) source, there is also thermal  
voltage noise (et = (4KTR)) associated with each of the external resistors. Equation 1 provides the general form  
for total equivalent input voltage noise density (eni). Equation 2 is a simplification of Equation 1 that assumes  
Figure 52. Non-Inverting Amplifier Noise Model  
(2)  
Rf||Rg = Rseq for bias current cancellation. Figure 53 illustrates the equivalent noise model using this assumption.  
Figure 54 is a plot of eni against equivalent source resistance (Rseq) with all of the contributing voltage noise  
source of Equation 2. This plot gives the expected eni for a given (Rseq) which assumes Rf||Rg = Rseq for bias  
current cancellation. The total equivalent output voltage noise (eno) is eni*AV.  
Figure 53. Noise Model with Rf||Rg = Rseq  
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(3)  
As seen in Figure 54, eni is dominated by the intrinsic voltage noise (en) of the amplifier for equivalent source  
resistances below 33.5. Between 33.5and 6.43k, eni is dominated by the thermal noise (et = (4kT(2Rseq))  
of the external resistor. Above 6.43k, eni is dominated by the amplifier’s current noise (in = (2) inRseq). When  
Rseq = 464(ie., en/(2) in) the contribution from voltage noise and current noise of LMH6624/LMH6626 is equal.  
For example, configured with a gain of +20V/V giving a 3dB of 90MHz and driven from Rseq = 25, the  
LMH6624 produces a total equivalent input noise voltage (eni × Hz1.57*90MHz) of 16.5μVrms  
.
100  
e
t
10  
1
e
ni  
e
n
i
n
0.1  
10  
100  
1k  
10k  
100k  
R
(W)  
SEQ  
Figure 54. Voltage Noise Density vs. Source Resistance  
If bias current cancellation is not a requirement, then Rf||Rg need not equal Rseq. In this case, according to  
Equation 1, Rf||Rg should be as low as possible to minimize noise. Results similar to Equation 1 are obtained for  
the inverting configuration of Figure 51 if Rseq is replaced by Rb and Rg is replaced by Rg + Rs. With these  
substitutions, Equation 1 will yield an eni referred to the non-inverting input. Referring eni to the inverting input is  
easily accomplished by multiplying eni by the ratio of non-inverting to inverting gains.  
NOISE FIGURE  
Noise Figure (NF) is a measure of the noise degradation caused by an amplifier.  
(4)  
The Noise Figure formula is shown in Equation 4. The addition of a terminating resistor RT, reduces the external  
thermal noise but increases the resulting NF. The NF is increased because RT reduces the input signal amplitude  
thus reducing the input SNR.  
2
2
2
2
e
+ i (R  
Seq  
+ (R ||R ) ) + 4KT (R  
+ (R ||R ))  
Seq f g  
n
n
f
g
NF = 10 LOG  
4KT (R  
+ (R ||R ))  
f g  
Seq  
(5)  
The noise figure is related to the equivalent source resistance (Rseq) and the parallel combination of Rf and Rg.  
To minimize noise figure.  
Minimize Rf||Rg  
Choose the Optimum RS (ROPT  
)
ROPT is the point at which the NF curve reaches a minimum and is approximated by:  
R
OPT en/in  
(6)  
17  
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SINGLE SUPPLY OPERATION  
The LMH6624/LMH6626 can be operated with single power supply as shown in Figure 55. Both the input and  
output are capacitively coupled to set the DC operating point.  
Figure 55. Single Supply Operation  
LOW NOISE TRANSIMPEDANCE AMPLIFIER  
Figure 56 implements a low-noise transimpedance amplifier commonly used with photo-diodes. The  
transimpedance gain is set by Rf. Equation 4 provides the total input current noise density (ini) equation for the  
basic transimpedance configuration and is plotted against feedback resistance (Rf) showing all contributing noise  
sources in Figure 57. This plot indicates the expected total equivalent input current noise density (ini) for a given  
feedback resistance (Rf). The total equivalent output voltage noise density (eno) is ini*Rf.  
Figure 56. Transimpedance Amplifier Configuration  
16  
14  
i
ni  
12  
10  
8
i
t
e /R  
n
F
6
4
2
i
n
0
1k  
10k  
100  
, R (W)  
F
FEEDBACK RESISTANCE  
Figure 57. Current Noise Density vs. Feedback Resistance  
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(7)  
LOW NOISE INTEGRATOR  
The LMH6624/LMH6626 implement a deBoo integrator shown in Figure 58. Positive feedback maintains  
integration linearity. The LMH6624/LMH6626’s low input offset voltage and matched inputs allow bias current  
cancellation and provide for very precise integration. Keeping RG and RS low helps maintain dynamic stability.  
R
R
K
F
O
V
O
@ V  
IN  
K
= 1 +  
;
O
sR C  
S
G
R
B
V
O
R
S
+
-
V
IN  
C
R
50W  
50W  
R
F
R
G
R
R
= R  
B
F
= R ||R  
G
S
Figure 58. Low Noise Integrator  
HIGH-GAIN SALLEN-KEY ACTIVE FILTERS  
The LMH6624/LMH6626 are well suited for high gain Sallen-Key type of active filters. Figure 59 shows the 2nd  
order Sallen-Key low pass filter topology. Using component predistortion methods discussed in OA-21  
(SNOA369) enables the proper selection of components for these high-frequency filters.  
C
1
R
1
R
2
+
-
C
2
R
F
R
G
Figure 59. Sallen-Key Active Filter Topology  
LOW NOISE MAGNETIC MEDIA EQUALIZER  
The LMH6624/LMH6626 implement a high-performance low noise equalizer for such application as magnetic  
tape channels as shown in Figure 60. The circuit combines an integrator with a bandpass filter to produce the  
low noise equalization. The circuit’s simulated frequency response is illustrated in Figure 61.  
Copyright © 2002–2013, Texas Instruments Incorporated  
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Product Folder Links: LMH6624  
 
 
LMH6624  
SNOSA42F NOVEMBER 2002REVISED MARCH 2013  
www.ti.com  
Figure 60. Low Noise Magnetic Media Equalizer  
Figure 61. Equalizer Frequency Response  
LAYOUT CONSIDERATION  
TI suggests the copper patterns on the evaluation boards listed below as a guide for high frequency layout.  
These boards are also useful as an aid in device testing and characterization. As is the case with all high-speed  
amplifiers, accepted-practice RF design technique on the PCB layout is mandatory. Generally, a good high  
frequency layout exhibits a separation of power supply and ground traces from the inverting input and output  
pins. Parasitic capacitances between these nodes and ground may cause frequency response peaking and  
possible circuit oscillations (see Application Note OA-15 (SNOA367) for more information). Use high quality chip  
capacitors with values in the range of 1000pF to 0.1F for power supply bypassing. One terminal of each chip  
capacitor is connected to the ground plane and the other terminal is connected to a point that is as close as  
possible to each supply pin as allowed by the manufacturer’s design rules. In addition, connect a tantalum  
capacitor with a value between 4.7μF and 10μF in parallel with the chip capacitor. Signal lines connecting the  
feedback and gain resistors should be as short as possible to minimize inductance and microstrip line effect.  
Place input and output termination resistors as close as possible to the input/output pins. Traces greater than 1  
inch in length should be impedance matched to the corresponding load termination.  
Symmetry between the positive and negative paths in the layout of differential circuitry should be maintained to  
minimize the imbalance of amplitude and phase of the differential signal.  
Component value selection is another important parameter in working with high speed/high performance  
amplifiers. Choosing external resistors that are large in value compared to the value of other critical components  
will affect the closed loop behavior of the stage because of the interaction of these resistors with parasitic  
capacitances. These parasitic capacitors could either be inherent to the device or be a by-product of the board  
layout and component placement. Moreover, a large resistor will also add more thermal noise to the signal path.  
Either way, keeping the resistor values low will diminish this interaction. On the other hand, choosing very low  
value resistors could load down nodes and will contribute to higher overall power dissipation and high distortion.  
20  
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Copyright © 2002–2013, Texas Instruments Incorporated  
Product Folder Links: LMH6624  
 
LMH6624  
www.ti.com  
SNOSA42F NOVEMBER 2002REVISED MARCH 2013  
Device  
Package  
SOT-23–5  
SOIC-8  
Evaluation Board Part Number  
LMH6624MF  
LMH6624MA  
LMH6626MA  
LMH6626MM  
LMH730216  
LMH730227  
LMH730036  
LMH730123  
SOIC-8  
VSSOP-8  
Copyright © 2002–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
21  
Product Folder Links: LMH6624  
LMH6624  
SNOSA42F NOVEMBER 2002REVISED MARCH 2013  
www.ti.com  
REVISION HISTORY  
Changes from Revision E (March 2013) to Revision F  
Page  
Changed layout of National Data Sheet to TI format .......................................................................................................... 20  
22  
Submit Documentation Feedback  
Copyright © 2002–2013, Texas Instruments Incorporated  
Product Folder Links: LMH6624  
PACKAGE OPTION ADDENDUM  
www.ti.com  
1-Nov-2013  
PACKAGING INFORMATION  
Orderable Device  
LMH6624MA  
Status Package Type Package Pins Package  
Eco Plan  
Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 125  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(6)  
(3)  
(4/5)  
NRND  
SOIC  
SOIC  
SOIC  
D
8
8
8
95  
TBD  
Call TI  
CU SN  
CU SN  
Call TI  
LMH66  
24MA  
LMH6624MA/NOPB  
LMH6624MAX/NOPB  
ACTIVE  
ACTIVE  
D
D
95  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 125  
LMH66  
24MA  
2500  
Green (RoHS  
& no Sb/Br)  
-40 to 125  
LMH66  
24MA  
LMH6624MF  
NRND  
SOT-23  
SOT-23  
DBV  
DBV  
5
5
1000  
1000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 125  
-40 to 125  
A94A  
A94A  
LMH6624MF/NOPB  
ACTIVE  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMH6624MFX  
NRND  
SOT-23  
SOT-23  
DBV  
DBV  
5
5
3000  
3000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 125  
-40 to 125  
A94A  
A94A  
LMH6624MFX/NOPB  
ACTIVE  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LMH6626MA/NOPB  
LMH6626MAX/NOPB  
LMH6626MM/NOPB  
LMH6626MMX/NOPB  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
D
8
8
8
8
95  
Green (RoHS  
& no Sb/Br)  
CU SN  
CU SN  
CU SN  
CU SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
LMH66  
26MA  
D
2500  
1000  
3500  
Green (RoHS  
& no Sb/Br)  
LMH66  
26MA  
VSSOP  
VSSOP  
DGK  
DGK  
Green (RoHS  
& no Sb/Br)  
A98A  
Green (RoHS  
& no Sb/Br)  
A98A  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
1-Nov-2013  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish  
value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
23-Sep-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LMH6624MAX/NOPB  
LMH6624MF  
SOIC  
D
8
5
5
5
5
8
8
8
2500  
1000  
1000  
3000  
3000  
2500  
1000  
3500  
330.0  
178.0  
178.0  
178.0  
178.0  
330.0  
178.0  
330.0  
12.4  
8.4  
6.5  
3.2  
3.2  
3.2  
3.2  
6.5  
5.3  
5.3  
5.4  
3.2  
3.2  
3.2  
3.2  
5.4  
3.4  
3.4  
2.0  
1.4  
1.4  
1.4  
1.4  
2.0  
1.4  
1.4  
8.0  
4.0  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
12.0  
8.0  
Q1  
Q3  
Q3  
Q3  
Q3  
Q1  
Q1  
Q1  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOIC  
DBV  
DBV  
DBV  
DBV  
D
LMH6624MF/NOPB  
LMH6624MFX  
8.4  
8.0  
8.4  
8.0  
LMH6624MFX/NOPB  
LMH6626MAX/NOPB  
LMH6626MM/NOPB  
LMH6626MMX/NOPB  
8.4  
8.0  
12.4  
12.4  
12.4  
12.0  
12.0  
12.0  
VSSOP  
VSSOP  
DGK  
DGK  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
23-Sep-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LMH6624MAX/NOPB  
LMH6624MF  
SOIC  
D
8
5
5
5
5
8
8
8
2500  
1000  
1000  
3000  
3000  
2500  
1000  
3500  
367.0  
210.0  
210.0  
210.0  
210.0  
367.0  
210.0  
367.0  
367.0  
185.0  
185.0  
185.0  
185.0  
367.0  
185.0  
367.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOIC  
DBV  
DBV  
DBV  
DBV  
D
LMH6624MF/NOPB  
LMH6624MFX  
LMH6624MFX/NOPB  
LMH6626MAX/NOPB  
LMH6626MM/NOPB  
LMH6626MMX/NOPB  
VSSOP  
VSSOP  
DGK  
DGK  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other  
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and  
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