LME49811 [TI]

Audio Power Amplifier Series High Fidelity 200 Volt Power Amplifier Input Stage with Shutdown;
LME49811
型号: LME49811
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

Audio Power Amplifier Series High Fidelity 200 Volt Power Amplifier Input Stage with Shutdown

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LME49811  
www.ti.com  
SNAS394C DECEMBER 2007REVISED APRIL 2013  
LME49811 Audio Power Amplifier Series High Fidelity 200 Volt Power Amplifier Input  
Stage with Shutdown  
Check for Samples: LME49811  
1
FEATURES  
DESCRIPTION  
The LME49811 is a high fidelity audio power amplifier  
input stage designed for demanding consumer and  
pro-audio applications. Amplifier output power may be  
scaled by changing the supply voltage and number of  
output devices. The LME49811 is capable of driving  
an output stage to deliver in excess of 500 watts  
single-ended into an 8 ohm load in the presence of  
10% high line headroom and 20% supply regulation.  
2
Very High Voltage Operation  
Scalable Output Power  
Minimum External Components  
External Compensation  
Thermal Shutdown  
APPLICATIONS  
The LME49811 includes thermal shut down circuitry  
that activates when the die temperature exceeds  
150°C. The LME49811's shutdown function when  
activated, forces the LME49811 into shutdown state.  
Powered Subwoofers  
Pro Audio  
Powered Studio Monitors  
Audio Video Receivers  
Guitar Amplifiers  
High Voltage Industrial Applications  
KEY SPECIFICATIONS  
Wide Operating Voltage Range: ±20V to ±100V  
PSRR (f = DC): 115dB (Typ)  
THD+N (f = 1kHz): 0.00035% (Typ)  
Output Drive Current: 9mA  
TYPICAL APPLICATION  
R
F
56 kW  
+V  
CC  
C
C
+V  
CC  
30 pF  
Q
DAR  
N
+
C
S
0.1 mF  
R
B2  
R
E1  
0.22W  
MULT  
C
R
IN  
IN  
1.2 kW  
10 mF 1.8 kW  
IN-  
Q
Source  
Sink  
-
R
E2  
C
R
i
R
B1  
i
0.22W  
10 mF 1.8 kW  
500W  
IN+  
SD  
+
R
S
Q
DAR  
P
56 kW  
+5V  
Shutdown  
Circuitry  
GND  
-V  
EE  
R
M
1.4 kW  
C
S
+
-V  
0.1 mF  
EE  
Figure 1. Typical Audio Amplifier Application Circuit  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2007–2013, Texas Instruments Incorporated  
 
LME49811  
SNAS394C DECEMBER 2007REVISED APRIL 2013  
www.ti.com  
Connection Diagram  
+V  
15  
14  
13  
12  
CC  
SOURCE  
SINK  
NC  
NC  
EE  
11  
10  
9
-V  
NC  
8
NC  
NC  
7
COMP  
6
5
4
3
2
IN-  
IN+  
GND  
SD  
1
NC  
Figure 2. Top View  
See Package Number NDN0015A  
PIN DESCRIPTIONS  
Pin  
1
Pin Name  
NC  
Description  
No Connect, Pin electrically isolated  
2
SD  
GND  
IN+  
Shutdown Control  
Device Ground  
3
4
Non-Inverting Input  
Inverting Input  
5
IN-  
6
Comp  
NC  
External Compensation Connection  
No Connect, Pin electrically isolated  
No Connect, Pin electrically isolated  
No Connect, Pin electrically isolated  
Negative Power Supply  
7
8
NC  
9
NC  
10  
11  
12  
13  
14  
15  
-VEE  
NC  
No Connect, Pin electrically isolated  
No Connect, Pin electrically isolated  
Output Sink  
NC  
Sink  
Source  
+VCC  
Output Source  
Positive Power Supply  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
2
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Copyright © 2007–2013, Texas Instruments Incorporated  
Product Folder Links: LME49811  
LME49811  
www.ti.com  
SNAS394C DECEMBER 2007REVISED APRIL 2013  
ABSOLUTE MAXIMUM RATINGS(1)(2)  
Supply Voltage |V+| + |V-|  
Differential Input Voltage  
200V  
+/-6V  
Common Mode Input Range  
Power Dissipation(3)  
0.4 VEE to 0.4 VCC  
4W  
ESD Rating(4)  
2kV  
ESD Rating(5)  
200V  
(6)  
Junction Temperature (TJMAX  
Soldering Information  
Storage Temperature  
Thermal Resistance  
)
150°C  
NDN Package (10 seconds)  
260°C  
-40°C to +150°C  
73°C/W  
θJA  
θJC  
4°C/W  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of  
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or  
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating  
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All  
voltages are measured with respect to the ground pin, unless otherwise specified  
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and  
specifications.  
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature,  
TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings,  
whichever is lower.  
(4) Human body model, applicable std. JESD22-A114C.  
(5) Machine model, applicable std. JESD22-A115-A.  
(6) The maximum operating junction temperature is 150°C.  
OPERATING RATINGS(1)(2)  
Temperature Range  
TMIN TA TMAX  
40°C TA +85°C  
Supply Voltage |V+| + |V-|  
+/-20V VTOTAL +/-100V  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of  
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or  
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating  
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All  
voltages are measured with respect to the ground pin, unless otherwise specified  
(2) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as  
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and  
are not ensured.  
Copyright © 2007–2013, Texas Instruments Incorporated  
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LME49811  
SNAS394C DECEMBER 2007REVISED APRIL 2013  
www.ti.com  
ELECTRICAL CHARACTERISTICS +VCC = -VEE = 50V(1)(2)  
The following specifications apply for ISD = 1.5mA, Figure 1, unless otherwise specified. Limits apply for TA = 25°C, CC =  
30pF.  
Symbol  
Parameter  
Conditions  
LME49811  
Units  
(Limits)  
Typical(3)  
Limit(4)  
Total Quiescent Power Supply  
Current  
VCM = 0V, VO = 0V, IO = 0A  
VCM = 0V, VO = 0V, IO = 0A  
ICC  
IEE  
14  
16  
17  
mA (max)  
mA (max)  
% (max)  
Total Quiescent Power Supply  
Current  
19  
Total Harmonic Distortion +  
Noise  
No load, AV = 29dB  
VOUT = 20VRMS, f = 1kHz  
THD+N  
AV  
0.00055  
0.0015  
26  
Closed Loop Voltage Gain  
dB (min)  
dB  
VIN = 1mVRMS, f = 1kHz  
f = DC  
93  
120  
33  
AV  
Open Loop Gain  
dB  
VOM  
VNOISE  
IOUT  
ISD  
Output Voltage Swing  
Output Noise  
THD+N = 0.05%, Freq = 20Hz to 20kHz  
LPF = 30kHz, Av = 29dB  
A-weighted  
VRMS  
μV  
100  
70  
180  
6.5  
μV (max)  
mA(min)  
Output Current  
Outputs Shorted  
8
1
2
mA(min)  
mA (max)  
Current into Shutdown Pin  
To put part in “play” mode  
1.5  
16  
VIN = 1.2VP-P, f = 10kHz square Wave,  
Outputs shorted  
SR  
Slew Rate  
13  
3
V/μs (min)  
VOS  
IB  
Input Offset Voltage  
VCM = 0V, IO = 0mA  
VCM = 0V, IO = 0mA  
DC, Input Referred  
1
mV (max)  
nA  
Input Bias Current  
100  
115  
PSRR  
Power Supply Rejection Ratio  
105  
dB (min)  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of  
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or  
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating  
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All  
voltages are measured with respect to the ground pin, unless otherwise specified  
(2) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as  
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and  
are not ensured.  
(3) Typical values represent most likely parametric norms at TA = +25ºC, and at the Recommended Operation Conditions at the time of  
product characterization and are not ensured.  
(4) Data sheet min/max specification limits are ensured by test or statistical analysis.  
4
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Product Folder Links: LME49811  
LME49811  
www.ti.com  
SNAS394C DECEMBER 2007REVISED APRIL 2013  
ELECTRICAL CHARACTERISTICS +VCC = –VEE = 100V(1)(2)  
The following specifications apply for ISD = 1.5mA, Figure 1, unless otherwise specified. Limits apply for TA = 25°C.  
Symbol  
Parameter  
Conditions  
LME49811  
Units  
(Limits)  
Typical(3)  
Limit(4)  
Total Quiescent Power Supply  
Current  
ICC  
IEE  
VCM = 0V, VO = 0V, IO = 0A  
VCM = 0V, VO = 0V, IO = 0A  
17  
19  
22  
mA (max)  
mA (max)  
% (max)  
Total Quiescent Power Supply  
Current  
24  
Total Harmonic Distortion +  
Noise  
No load, AV = 30dB  
VOUT = 30VRMS, f = 1kHz  
THD+N  
AV  
0.00035  
0.001  
26  
Closed Loop Voltage Gain  
dB (min)  
dB  
VIN = 1mVRMS, f = 1kHz  
f = DC  
93  
120  
68  
AV  
Open Loop Gain  
dB  
VOM  
VNOISE  
IOUT  
ISD  
Output Voltage Swing  
Output Noise  
THD+N = 0.05%, Freq = 20Hz to 20kHz  
LPF = 30kHz, Av = 29dB  
A-weighted  
VRMS  
μV  
100  
70  
180  
7
μV (max)  
mA(min)  
Output Current  
Outputs Shorted  
9
1
2
mA(min)  
mA (max)  
Current into Shutdown Pin  
To put part in “play” mode  
1.5  
17  
VIN = 1.2VP-P, f = 10kHz square Wave,  
Outputs shorted  
SR  
Slew Rate  
14  
3
V/μs (min)  
VOS  
IB  
Input Offset Voltage  
VCM = 0V, IO = 0mA  
VCM = 0V, IO = 0mA  
f = DC, Input Referred  
1
mV (max)  
nA (max)  
dB (min)  
Input Bias Current  
100  
115  
PSRR  
Power Supply Rejection Ratio  
105  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of  
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or  
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating  
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All  
voltages are measured with respect to the ground pin, unless otherwise specified  
(2) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as  
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and  
are not ensured.  
(3) Typical values represent most likely parametric norms at TA = +25ºC, and at the Recommended Operation Conditions at the time of  
product characterization and are not ensured.  
(4) Data sheet min/max specification limits are ensured by test or statistical analysis.  
Copyright © 2007–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
5
Product Folder Links: LME49811  
LME49811  
SNAS394C DECEMBER 2007REVISED APRIL 2013  
www.ti.com  
TYPICAL PERFORMANCE CHARACTERISTICS  
Data taken with Bandwidth = 30kHz, AV = 29dB, CC = 30pF, and TA = 25°C except where specified.  
THD+N vs Frequency  
+VCC = –VEE = 100V, VO = 14V  
THD+N vs Frequency  
+VCC = –VEE = 100V, VO = 30V  
10  
10  
1
0.1  
1
0.1  
0.01  
0.01  
BW = 80 kHz  
BW = 80 kHz  
0.001  
0.001  
BW = 30 kHz  
BW = 30 kHz  
100  
0.0001  
0.0001  
20  
1k  
20k  
10k  
10k  
20  
100  
1k  
20k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 3.  
Figure 4.  
THD+N vs Frequency  
+VCC = –VEE = 50V, VO = 10V  
THD+N vs Frequency  
+VCC = –VEE = 50V, VO = 20V  
10  
10  
1
0.1  
1
0.1  
0.01  
0.01  
BW = 80 kHz  
BW = 30 kHz  
BW = 80 kHz  
BW = 30 kHz  
0.001  
0.001  
0.0001  
0.0001  
10k  
20  
100  
1k  
20k  
20  
100  
1k  
20k  
10k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 5.  
Figure 6.  
THD+N vs Frequency  
+VCC = –VEE = 20V, VO = 5V  
THD+N vs Frequency  
+VCC = –VEE = 20V, VO = 10V  
10  
10  
1
0.1  
1
0.1  
BW = 80 kHz  
0.01  
0.01  
BW = 80 kHz  
0.001  
0.001  
BW = 30 kHz  
100  
BW = 30 kHz  
0.0001  
0.0001  
10k  
20  
100  
1k  
20k  
20  
1k  
10k 20k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 7.  
Figure 8.  
6
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Product Folder Links: LME49811  
LME49811  
www.ti.com  
SNAS394C DECEMBER 2007REVISED APRIL 2013  
TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Data taken with Bandwidth = 30kHz, AV = 29dB, CC = 30pF, and TA = 25°C except where specified.  
THD+N vs Output Voltage  
+VCC = –VEE = 50V, f = 20Hz  
THD+N vs Output Voltage  
+VCC = –VEE = 100V, f = 20Hz  
10  
10  
1
0.1  
1
0.1  
BW = 80 kHz  
BW = 80 kHz  
0.01  
0.01  
BW = 30 kHz  
BW = 30 kHz  
0.001  
0.001  
0.0001  
0.0001  
1
10  
100m  
1
2
10 20  
50  
100m  
50 100  
OUTPUT VOLTAGE (Vrms)  
OUTPUT VOLTAGE (Vrms)  
Figure 9.  
Figure 10.  
THD+N vs Output Voltage  
+VCC = –VEE = 50V, f = 1kHz  
THD+N vs Output Voltage  
+VCC = –VEE = 100V, f = 1kHz  
10  
10  
1
0.1  
1
0.1  
BW = 80 kHz  
BW = 80 kHz  
0.01  
0.01  
BW = 30 kHz  
0.001  
0.001  
BW = 30 kHz  
0.0001  
0.0001  
1
10  
100m  
1
2
10 20  
50  
100m  
50 100  
OUTPUT VOLTAGE (Vrms)  
OUTPUT VOLTAGE (Vrms)  
Figure 11.  
Figure 12.  
THD+N vs Output Voltage  
+VCC = –VEE = 50V, f = 20kHz  
THD+N vs Output Voltage  
+VCC = –VEE = 100V, f = 20kHz  
10  
10  
1
0.1  
1
0.1  
BW = 80 kHz  
BW = 80 kHz  
0.01  
0.01  
BW = 30 kHz  
BW = 30 kHz  
0.001  
0.001  
0.0001  
0.0001  
100m  
1
2
10 20  
50  
100m  
1
10  
50 100  
OUTPUT VOLTAGE (Vrms)  
OUTPUT VOLTAGE (Vrms)  
Figure 13.  
Figure 14.  
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LME49811  
SNAS394C DECEMBER 2007REVISED APRIL 2013  
www.ti.com  
TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Data taken with Bandwidth = 30kHz, AV = 29dB, CC = 30pF, and TA = 25°C except where specified.  
THD+N vs Output Voltage  
+VCC = –VEE = 20V, f = 20kHz  
THD+N vs Output Voltage  
+VCC = –VEE = 20V, f = 1kHz  
10  
10  
1
0.1  
1
0.1  
BW = 80 kHz  
BW=80 kHz  
0.01  
0.01  
BW = 30 kHz  
BW=30 kHz  
0.001  
0.001  
0.0001  
0.0001  
100m  
1
2
10 20  
100m  
1
2
10 20  
OUTPUT VOLTAGE (Vrms)  
OUTPUT VOLTAGE (Vrms)  
Figure 15.  
Figure 16.  
THD+N vs Output Voltage  
+VCC = –VEE = 20V, f = 20kHz  
Closed Loop Frequency Response  
+VCC = –VEE = 50V, VIN = 1VRMS  
10  
3
2
1
0.1  
1
0
BW = 80 kHz  
0.01  
-1  
-2  
BW = 30 kHz  
0.001  
0.0001  
-3  
10k  
100m  
1
2
10 20  
20  
100  
1k  
200k  
FREQUENCY (Hz)  
OUTPUT VOLTAGE (Vrms)  
Figure 17.  
Figure 18.  
Closed Loop Frequency Response  
+VCC = –VEE = 100V, VIN = 1VRMS  
Output Voltage vs Supply Voltage  
3
2
100  
80  
60  
1
0
THD+N = 1%  
40  
20  
0
-1  
-2  
THD+N = 0.05%  
-3  
10k  
20  
100  
1k  
200k  
0
20  
40  
60  
80  
100  
SUPPLY VOLTAGE (±V)  
FREQUENCY (Hz)  
Figure 19.  
Figure 20.  
8
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LME49811  
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SNAS394C DECEMBER 2007REVISED APRIL 2013  
TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Data taken with Bandwidth = 30kHz, AV = 29dB, CC = 30pF, and TA = 25°C except where specified.  
PSRR vs Frequency  
+VCC = –VEE = 100V, No Filters  
Input Referred, VRIPPLE = 1VRMS on VCC pin  
0
PSRR vs Frequency  
+VCC = –VEE = 50V, No Filters  
Input Referred, VRIPPLE = 1VRMS on VCC pin  
0
-20  
-40  
-20  
-40  
-60  
-60  
-80  
-80  
-100  
-120  
-140  
-100  
-120  
-140  
1k  
10k  
20  
100  
100k  
100  
1k  
10k  
100k  
20  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 21.  
Figure 22.  
PSRR vs Frequency  
PSRR vs Frequency  
+VCC = –VEE = 100V, No Filters  
+VCC = –VEE = 50V, No Filters  
Input Referred, VRIPPLE = 1VRMS on VEE pin  
Input Referred, VRIPPLE = 1VRMS on VEE pin  
0
0
-20  
-40  
-60  
-20  
-40  
-60  
-80  
-80  
-100  
-120  
-100  
-120  
-140  
100  
1k  
10k  
20  
100  
100k  
1k  
10k  
20  
100k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 23.  
Figure 24.  
Open Loop and Phase Upper-Phase  
Lower Gain  
Supply Current vs Supply Voltage  
180  
160  
28  
24  
20  
16  
12  
8
203  
180  
140  
120  
100  
80  
158  
135  
113  
90  
I
EE  
I
CC  
60  
68  
45  
23  
0
40  
20  
0
4
-20  
-23  
0
20 30 40 50  
60 70 80 90 100  
10 100 1k 10k 100k 1M 10M 100M  
SUPPLY VOTAGE (±V)  
FREQUENCY (Hz)  
Figure 25.  
Figure 26.  
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TEST CIRCUIT  
R
F
56 kW  
+V  
CC  
+
C
S
0.1 mF  
C
i
R
C
C
i
22 mF  
30 pF  
1.8 kW  
-
C
R
IN  
IN  
10 mF  
1.8 kW  
Test  
Signal  
Input  
+
R
S
56 kW  
C
S
0.1 mF  
+
-V  
EE  
R
M
1.4 kW  
Shutdown  
Circuitry  
5V  
Figure 27. Test Circuit  
APPLICATION INFORMATION  
SHUTDOWN FUNCTION  
The shutdown function of the LME49811 is controlled by the amount of current that flows into the shutdown pin.  
If there is less than 1mA of current flowing into the shutdown pin, the part will be in shutdown. This can be  
achieved by shorting the shutdown pin to ground or by floating the shutdown pin. If there is between 1mA and  
2mA of current flowing into the shutdown pin, the part will be in “play” mode. This can be done by connecting a  
reference voltage to the shutdown pin through a resistor (RM). The current into the shutdown pin can be  
determined by the equation ISD = (VREF – 2.9) / RM. For example, if a 5V power supply is connected through a  
1.4kresistor to the shutdown pin, then the shutdown current will be 1.5mA, at the center of the specified range.  
It is also possible to use VCC as the power supply for the shutdown pin, though RM will have to be recalculated  
accordingly. It is not recommended to flow more than 2mA of current into the shutdown pin because damage to  
the LME49811 may occur.  
It is highly recommended to switch between shutdown and “play” modes rapidly. This is accomplished most  
easily through using a toggle switch that alternatively connects the shutdown pin through a resistor to either  
ground or the shutdown pin power supply. Slowly increasing the shutdown current may result in undesired  
voltages on the outputs of the LME49811, which can damage an attached speaker.  
THERMAL PROTECTION  
The LME49811 has a thermal protection scheme to prevent long-term thermal stress of the device. When the  
temperature on the die exceeds 150°C, the LME49811 shuts down. It starts operating again when the die  
temperature drops to about 145°C, but if the temperature again begins to rise, shutdown will occur again above  
150°C. Therefore, the device is allowed to heat up to a relatively high temperature if the fault condition is  
temporary, but a sustained fault will cause the device to cycle in a Schmitt Trigger fashion between the thermal  
shutdown temperature limits of 150°C and 145°C. This greatly reduces the stress imposed on the IC by thermal  
cycling, which in turn improves its reliability under sustained fault conditions.  
10  
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Since the die temperature is directly dependent upon the heat sink used, the heat sink should be chosen so that  
thermal shutdown is not activated during normal operation. Using the best heat sink possible within the cost and  
space constraints of the system will improve the long-term reliability of any power semiconductor device, as  
discussed in the DETERMINING THE CORRECT HEAT SINK section.  
POWER DISSIPATION AND HEAT SINKING  
When in “play” mode, the LME49811 draws a constant amount of current, regardless of the input signal  
amplitude. Consequently, the power dissipation is constant for a given supply voltage and can be computed with  
the equation PDMAX = ICC* (VCC– VEE).  
DETERMINING THE CORRECT HEAT SINK  
The choice of a heat sink for a high-power audio amplifier is made entirely to keep the die temperature at a level  
such that the thermal protection circuitry is not activated under normal circumstances.  
The thermal resistance from the die to the outside air, θJA (junction to ambient), is a combination of three thermal  
resistances, θJC (junction to case), θCS (case to sink), and θSA (sink to ambient). The thermal resistance, θJC  
(junction to case), of the LME49811 is 0.4 °C/W. Using Thermalloy Thermacote thermal compound, the thermal  
resistance, θCS (case to sink), is about 0.2°C/W. Since convection heat flow (power dissipation) is analogous to  
current flow, thermal resistance is analogous to electrical resistance, and temperature drops are analogous to  
voltage drops, the power dissipation out of the LME49811 is equal to the following:  
PDMAX = (TJMAXTAMB) / θJA  
where  
TJMAX = 150°C  
TAMB is the system ambient temperature  
θJA = θJC + θCS + θSA  
(1)  
Once the maximum package power dissipation has been calculated using Equation (1), the maximum thermal  
resistance, θSA, (heat sink to ambient) in °C/W for a heat sink can be calculated. This calculation is made using  
Equation (2) which is derived by solving for θSA in Equation (1).  
θSA = [(TJMAXTAMB)PDMAX(θJC +θCS)] / PDMAX  
(2)  
Again it must be noted that the value of θSA is dependent upon the system designer's amplifier requirements. If  
the ambient temperature that the audio amplifier is to be working under is higher than 25°C, then the thermal  
resistance for the heat sink, given all other things are equal, will need to be smaller.  
PROPER SELECTION OF EXTERNAL COMPONENTS  
Proper selection of external components is required to meet the design targets of an application. The choice of  
external component values that will affect gain and low frequency response are discussed below.  
The gain of each amplifier is set by resistors RF and Ri for the non-inverting configuration shown in Figure 1. The  
gain is found by Equation (3) below:  
AV = RF / Ri (V/V)  
(3)  
For best noise performance, lower values of resistors are used. A value of 1kis commonly used for Ri and then  
setting the value of RF for the desired gain. For the LME49811 the gain should be set no lower than 26dB. Gain  
settings below 26dB may experience instability.  
The combination of Ri with Ci (see Figure 1) creates a high pass filter. The low frequency response is determined  
by these two components. The -3dB point can be found from Equation (4) shown below:  
fi = 1 / (2πRiCi) (Hz)  
(4)  
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If an input coupling capacitor is used to block DC from the inputs as shown in Figure 1, there will be another high  
pass filter created with the combination of CIN and RIN. When using a input coupling capacitor RIN is needed to  
set the DC bias point on the amplifier's input terminal. The resulting -3dB frequency response due to the  
combination of CIN and RIN can be found from Equation (5) shown below:  
fIN = 1 / (2πRINCIN) (Hz)  
(5)  
With large values of RIN oscillations may be observed on the outputs when the inputs are left floating. Decreasing  
the value of RIN or not letting the inputs float will remove the oscillations. If the value of RIN is decreased then the  
value of CIN will need to increase in order to maintain the same -3dB frequency response.  
COMPENSATION CAPACITOR  
The compensation capacitor (CC) is one of the most critical external components in value, placement and type.  
The capacitor should be placed close to the LME49811 and a silver mica type will give good performance. The  
value of the capacitor will affect slew rate and stability. The highest slew rate is possible while also maintaining  
stability through out the power and frequency range of operation results in the best audio performance. The value  
shown in Figure 1 should be considered a starting value with optimization done on the bench and in listening  
testing.  
SUPPLY BYPASSING  
The LME49811 has excellent power supply rejection and does not require a regulated supply. However, to  
eliminate possible oscillations all op amps and power op amps should have their supply leads bypassed with low-  
inductance capacitors having short leads and located close to the package terminals. Inadequate power supply  
bypassing will manifest itself by a low frequency oscillation known as “motorboating” or by high frequency  
instabilities. These instabilities can be eliminated through multiple bypassing utilizing a large electrolytic capacitor  
(10μF or larger) which is used to absorb low frequency variations and a small ceramic capacitor (0.1μF) to  
prevent any high frequency feedback through the power supply lines. If adequate bypassing is not provided the  
current in the supply leads which is a rectified component of the load current may be fed back into internal  
circuitry. This signal causes low distortion at high frequencies requiring that the supplies be bypassed at the  
package terminals with an electrolytic capacitor of 470μF or more.  
OUTPUT STAGE USING BIPOLAR TRANSISTORS  
With a properly designed output stage and supply voltage of ±100V, an output power up to 500W can be  
generated at 0.05% THD+N into an 8speaker load. With an output current of several amperes, the output  
transistors need substantial base current drive because power transistors usually have quite low current  
gain—typical hfe of 50 or so. To increase the current gain, audio amplifiers commonly use Darlington style  
devices or additional driver stages. Power transistors should be mounted together with the VBE multiplier  
transistor on the same heat sink to avoid thermal run away. Please see the section BIASING TECHNIQUES  
AND AVOIDING THERMAL RUNAWAY for additional information.  
BIASING TECHNIQUES AND AVOIDING THERMAL RUNAWAY  
A class AB amplifier has some amount of distortion called Crossover distortion. To effectively minimize the  
crossover distortion from the output, a VBE multiplier may be used instead of two biasing diodes. A VBE multiplier  
normally consists of a bipolar transistor (QMULT, see Figure 1) and two resistors (RB1 and RB2, see Figure 1). A  
trim pot can also be added in series with RB1 for optional bias adjustment. A properly designed output stage,  
combine with a VBE multiplier, can eliminate the trim pot and virtually eliminate crossover distortion. The VCE  
voltage of QMULT (also called BIAS of the output stage) can be set by following formula:  
VBIAS = VBE(1+RB2/RB1  
)
(V)  
(6)  
When using a bipolar output stage with the LME49811 (as in Figure 1), the designer must beware of thermal  
runaway. Thermal runaway is a result of the temperature dependence of VBE (an inherent property of the  
transistor). As temperature increases, VBE decreases. In practice, current flowing through a bipolar transistor  
heats up the transistor, which lowers the VBE. This in turn increases the current gain, and the cycle repeats. If the  
system is not designed properly this positive feedback mechanism can destroy the bipolar transistors used in the  
output stage. One of the recommended methods of preventing thermal runaway is to use the same heat sink on  
the bipolar output stage transistor together with VBE multiplier transistor. When the VBE multiplier transistor is  
mounted to the same heat sink as the bipolar output stage transistors, it temperature will track that of the output  
transistors. Its VBE is dependent upon temperature as well, and so it will draw more current as the output  
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transistors heat up, reducing the bias voltage to compensate. This will limit the base current into the output  
transistors, which counteracts thermal runaway. Another widely popular method of preventing thermal runaway is  
to use low value emitter degeneration resistors (RE1 and RE2). As current increases, the voltage at the emitter  
also increases, which decreases the voltage across the base and emitter. This mechanism helps to limit the  
current and counteracts thermal runaway.  
LAYOUT CONSIDERATION AND AVOIDING GROUND LOOPS  
A proper layout is virtually essential for a high performance audio amplifier. It is very important to return the load  
ground, supply grounds of output transistors, and the low level (feedback and input) grounds to the circuit board  
common ground point through separate paths. When ground is routed in this fashion, it is called a star ground or  
a single point ground. It is advisable to keep the supply decoupling capacitors of 0.1μF close as possible to  
LME49811 to reduce the effects of PCB trace resistance and inductance. Following the general rules will  
optimize the PCB layout and avoid ground loops problems:  
a) Make use of symmetrical placement of components.  
b) Make high current traces, such as output path traces, as wide as possible to accommodate output stage  
current requirement.  
c) To reduce the PCB trace resistance and inductance, same ground returns paths should be as short as  
possible. If possible, make the output traces short and equal in length.  
d) To reduce the PCB trace resistance and inductance, ground returns paths should be as short as possible.  
e) If possible, star ground or a single point ground should be observed. Advanced planning before starting the  
PCB can improve audio performance.  
Demonstration Board Layout  
Figure 28. Silkscreen Layer  
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Figure 29. Top Layer  
Figure 30. Bottom Layer  
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REVISION HISTORY  
Rev  
1.0  
Date  
Description  
12/19/07  
01/04/08  
Initial release.  
1.01  
Edited the project title (replaced “Driver” with “Power Amplifier Input  
Stage”.  
1.02  
C
11/11/09  
04/05/13  
Fixed the spacing between the equations 3, 4, 5, and 6 to the units  
measures.  
Changed layout of National Data Sheet to TI format.  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
14-Oct-2016  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(6)  
(3)  
(4/5)  
LME49811TB/NOPB  
OBSOLETE TO-OTHER  
NDN  
15  
TBD  
Call TI  
Call TI  
-20 to 75  
LME49811  
TB  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish  
value exceeds the maximum column width.  
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TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
14-Oct-2016  
Addendum-Page 2  
MECHANICAL DATA  
NDN0015A  
TB15A (Rev A)  
www.ti.com  
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