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LM95235QEIMMX/NOPB [TI]

Precision Remote Diode Temperature Sensor with SMBus Interface and TruTherm™ Technology;
LM95235QEIMMX/NOPB
型号： LM95235QEIMMX/NOPB
厂家： TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述：

Precision Remote Diode Temperature Sensor with SMBus Interface and TruTherm™ Technology

输出元件 传感器 换能器
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LM95235  
LM95235-Q1  
www.ti.com  
SNIS142F –APRIL 2006–REVISED MARCH 2013  
Precision Remote Diode Temperature Sensor with SMBus Interface and TruTherm™  
Technology  
Check for Samples: LM95235, LM95235-Q1  
1
FEATURES  
KEY SPECIFICATIONS  
2
•
Remote and Local Temperature Channels  
•
•
•
Supply Voltage 3.0 to 3.6 V  
•
•
TruTherm BJT Beta Compensation Technology  
Supply Current, Conv. Rate = 1 Hz 350 µA (typ)  
Remote Diode Temperature Accuracy  
LM95235Q is AEC-Q100 Grade 3 Compliant  
and is Manufactured on an Automotive Grade  
Flow  
–
TA = 25°C to 85°C; TD = 60°C to 100°C, ±0.75  
°C (max)  
•
•
Diode Model Selection Bit - MMBT3904 or  
65/90-nm Processor Diodes  
–
TA = 25°C to 90°C; TD = 40°C to 125°C, ±1.5  
°C (max)  
Two Formats: -128°C to 127.875°C and 0°C to  
255.875°C  
•
•
Local Temperature Accuracy  
TA = 25°C to 100°C, ±2.0 °C (max)  
Conversion Rate, Both Channels 16 to 0.4 Hz  
–
•
•
•
•
•
•
Digital Filter for Remote Channel  
Programmable TCRIT and OS Thresholds  
Programmable Shared Hysteresis Register  
Diode Fault Detection  
DESCRIPTION  
The LM95235 is an 11-bit digital temperature sensor  
with a 2-wire System Management Bus (SMBus)  
interface and TruTherm technology that can monitor  
the temperature of a remote diode as well as its own  
temperature. The LM95235 can be used to very  
accurately monitor the temperature of external  
Mask, Offset, and Status Registers  
SMBus 2.0 Compatible Interface, Supports  
TIMEOUT  
•
Programmable Conversion Rate for Best  
Power Consumption  
devices  
processors, or  
such  
as  
a
microprocessors,  
diode-connected MMBT3904  
graphics  
•
•
•
Three-Level Address Pin  
transistor. For automotive applications the LM95235Q  
is available that is AEC-Q100 Grade3 compliant and  
is manufactured on an Automotive Grade Flow.  
TruTherm BJT (transistor) beta compensation  
technology allows the LM95235 to precisely monitor  
thermal diodes found in 90 nm and smaller geometry  
processes. LM95235 reports temperature in two  
different formats for +127.875°C/-128°C range and  
0°C/255°C range. The LM95235 T_CRIT and OS  
outputs are asserted when either unmasked channel  
exceeds its programmed limit and can be used to  
shutdown the system, to turn on the system fans, or  
as a microcontroller interrupt function. The current  
status of the T_CRIT and OS pins can be read back  
from the status registers via the SMBus interface. All  
Standby Mode One-Shot Conversion Control  
Pin-for-Pin Compatible With the LM86 and  
LM89  
•
8-Pin VSSOP Package  
APPLICATIONS  
•
Processor/Computer System Thermal  
Management (For Example, Laptops,  
Desktops, Workstations, Servers)  
•
Electronic Test Equipment and Office  
Electronics  
limits have  
register.  
a shared programmable hysteresis  
The remote temperature channel of the LM95235 has  
a programmable digital filter. The LM95235 contains  
a diode model selection bit to select between a  
typical Intel® processor on a 65 nm or 90 nm process  
or MMBT3904, as well as an offset register for  
maximum flexibility and best accuracy.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2006–2013, Texas Instruments Incorporated  
LM95235  
LM95235-Q1  
SNIS142F –APRIL 2006–REVISED MARCH 2013  
www.ti.com  
DESCRIPTION (CONTINUED)  
The LM95235 has a three-level address pin to connect up to 3 devices to the same SMBus master, that is  
shared with the OS output. The LM95235 has a programmable conversion rate register and a standby mode to  
save power. One conversion can be triggered in standby mode by writing to the one-shot register.  
Connection Diagram  
Top View  
1
2
3
4
8
7
6
5
SMBCLK  
SMBDAT  
OS/A0  
V
DD  
D+  
LM95235  
D-  
T_CRIT  
GND  
Figure 1. VSSOP-8 Package  
See package number DGK0008A  
Simplified Block Diagram  
3.0V-3.6V  
1
LM95235  
4
6
T_CRIT  
Local  
Diode Selector  
+
-
Temperature  
Sensor  
S D Converter  
2
Circuitry  
Remote  
Diode  
Selector  
D+  
D-  
OS  
/A0  
+
-
3
TruTherm &  
Diode Config  
Registers  
Limit &  
Hyst  
Local  
Temp  
Remote  
Temp  
General  
Config  
Registers  
Status  
Registers  
ID  
Registers  
Control  
Logic  
Registers Registers Registers  
7
8
SMBus Serial Interface  
SMBDAT  
SMBCLK  
5
2
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Copyright © 2006–2013, Texas Instruments Incorporated  
Product Folder Links: LM95235 LM95235-Q1  
LM95235  
LM95235-Q1  
www.ti.com  
SNIS142F –APRIL 2006–REVISED MARCH 2013  
Table 1. Pin Descriptions  
Pin  
Number  
Name  
Type  
Description  
Device power supply. Requires bypass capacitor of 10 µF in parallel with 0.1 µF and 100  
pF. Place 100 pF closest to device pin.  
1
VDD  
Power  
2
3
4
5
D+  
D-  
Analog Input/Output Positive input from the thermal diode.  
Analog Input/Output Negative input from the thermal diode.  
T_CRIT  
GND  
Digital Output  
Ground  
Critical temperature output. Open-drain output requires pull-up resistor. Active low.  
Device ground.  
Over-temperature shutdown comparator output or SMBus slave address input. Defaults  
as an SMBus slave address input that selects one of three addresses. Can be tied to  
VDD, GND, or to the middle of a resistor divider connected between VDD and GND. When  
programmed as an OS comparator output it is active low and open drain.  
6
OS/A0  
Digital Input/Output  
7
8
SMBDAT  
SMBCLK  
Digital Input/Output SMBus interface data pin. Open-drain output requires pull-up resistor.  
Digital Input  
SMBus interface clock pin.  
Typical Application  
+3.3V  
Standby  
C4  
10 µF  
C3  
0.1 µF  
C2  
100 pF  
R2  
1.3k  
R3  
1.3k  
R1  
1.3k  
R4  
1.3k  
SMBus  
Master  
Place capacitor C2  
close to LM95235  
LM95235  
1
2
3
4
8
7
6
5
SMBCLK  
SMBDAT  
ALERT  
SMI  
V
SMBCLK  
SMBDAT  
OS/A0  
DD  
D+  
D-  
C1  
100 pF  
Processor  
Place close to  
LM95235  
GND  
T_CRIT  
Shutdown Control  
Main CPU  
Voltage  
Power Supply  
Copyright © 2006–2013, Texas Instruments Incorporated  
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3
Product Folder Links: LM95235 LM95235-Q1  
LM95235  
LM95235-Q1  
SNIS142F –APRIL 2006–REVISED MARCH 2013  
www.ti.com  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
Absolute Maximum Ratings(1)  
Supply Voltage, VDD  
-0.3V to 6.0V  
-0.5V to 6.0V  
(VDD +0.3V)  
±1 mA  
Voltage at SMBDAT, SMBCLK, T_CRIT, OS/A0 Pins  
Voltage at Other Pins  
(2)  
Input Current at D- Pin  
Input Current at All Other Pins(2)  
±5 mA  
Output Sink Current, SMBDAT, T_Crit, OS Pins  
10 mA  
(2)  
Package Input Current  
30 mA  
Human Body Model  
Machine Model  
2500V  
ESD Susceptibility(3)  
250V  
Charged Device Model  
1000V  
Junction Temperature(4)  
Storage Temperature  
+125°C  
-65°C to +150°C  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is guaranteed to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test  
conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance  
characteristics may degrade when the device is not operated under the listed test conditions. Operation of the device beyond the  
maximum Operating Ratings is not recommended.  
(2) When the input voltage (VI) at any pin exceeds the power supplies (VI < GND or VI > VDD), the current at that pin should be limited to 5  
mA. Parasitic components and or ESD protection circuitry are shown in the figures in Table 2 for the LM95235's pins. Care should be  
taken not to forward bias the parasitic diodes on pins 2 and 3. Doing so by more than 50 mV may corrupt the temperature  
measurements. SNP refers to Snap-back device.  
(3) Human body model (HBM) is a charged 100 pF capacitor discharged into a 1.5 kΩ resistor. Machine model (MM), is a charged 200 pF  
capacitor discharged directly into each pin. Charged Device Model (CDM) simulates a pin slowly acquiring charge (such as from a  
device sliding down the feeder in an automated assembler) then rapidly being discharged.  
(4) Thermal resistance junction-to-ambient when attached to a printed circuit board with 1 oz. foil and no airflow is: θJA for VSSOP-8  
package = 210°C/W  
Table 2. ESD Protection  
Pin No.  
Label  
VDD  
Circuit  
Pin ESD Protection Structure Circuits  
1
2
3
4
5
6
7
8
A
A
A
B
A
B
B
B
V+  
D+  
D-  
PIN  
D2  
D1  
D1  
T_CRIT  
GND  
SNP  
PIN  
ESD  
CLAMP  
D3  
6.5V  
OS/A0  
SMBDAT  
SMBCLK  
GND  
Circuit B  
GND  
Circuit A  
(1)  
Operating Ratings  
Operating Temperature Range  
-40°C to +125°C  
0°C ≤ TA ≤ +90°C  
-40°C ≤ TA ≤ +90°C  
-40°C ≤ TA ≤ +90°C  
-40°C ≤ TA ≤ +85°C  
+3.0V to +3.6V  
LM95235CIMM  
LM95235DIMM  
LM95235EIMM  
LM95235QEIMM  
Electrical Characteristics Temperature Range, TMIN ≤ TA ≤ TMAX  
Supply Voltage (VDD  
)
Soldering process must comply with Reflow Temperature Profile specifications. Refer to http://www.ti.com/packaging.(2)  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is guaranteed to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test  
conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance  
characteristics may degrade when the device is not operated under the listed test conditions. Operation of the device beyond the  
maximum Operating Ratings is not recommended.  
(2) Reflow temperature profiles are different for packages containing lead (Pb) than for those that do not.  
4
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Product Folder Links: LM95235 LM95235-Q1  
 
 
LM95235  
LM95235-Q1  
www.ti.com  
SNIS142F –APRIL 2006–REVISED MARCH 2013  
Temperature-to-Digital Converter Characteristics  
Unless otherwise noted, these specifications apply for VDD = +3.0 Vdc to 3.6 Vdc. Boldface limits apply for TA = TJ = TMIN  
≤
TA ≤ TMAX; all other limits TA = TJ = +25°C, unless otherwise noted. TJ is the junction temperature of the LM95235. TA is the  
ambient temperature of the LM95235. TD is the junction temperature of the remote thermal diode.  
LM95235  
LM95235 LM95235  
EIMM  
LM95235  
QEIMM  
Typical  
CIMM  
DIMM  
Parameter  
Test Conditions  
Unit  
(1)  
Limits  
Limits  
(2)  
(2)  
Limits  
(2)  
Temperature Accuracy  
Using Local Diode(3)  
TA = 25°C to +100°C  
±1  
±2  
±2  
±2  
°C (max)  
°C (max)  
TA = -40°C to +25°C  
±6.0  
±6.0  
Temperature Accuracy  
Using Remote Diode(4)  
TA = +25°C to +85°C;  
TD = +60°C to +100°C  
65nm Intel Processor  
±0.5  
±0.5  
±0.75  
±1.0  
±1.5  
±0.75  
±1.0  
±1.5  
±3.0  
±0.75  
±1.0  
±1.5  
°C (max)  
°C (max)  
°C (max)  
°C (max)  
°C (max)  
°C (max)  
TA = +25°C to TMAX  
;
MMBT3904 or  
65nm Intel Processor  
TD = +60°C to +100°C  
TA = +25°C to TMAX  
;
MMBT3904 or  
65nm Intel Processor  
±0.75  
TD = +40°C to +120°C  
TA = -40°C to +25°C;  
TD = +25°C to +125°C  
MMBT3904 or  
65nm Intel Processor  
TA = -40°C to +25°C;  
TD = +25°C to +125°C  
MMBT3904  
MMBT3904  
±3.0  
±5.0  
TA = -40°C to +25°C;  
TD = -40°C to +25°C  
±5.0  
11  
0.125  
13  
Bits  
°C  
Digital Filter Off  
Digital Filter On  
Remote Diode  
Measurement Resolution  
Bits  
0.03125  
11  
°C  
Local Diode Measurement  
Resolution  
Bits  
0.125  
63  
°C  
Conversion Time, Fastest  
Local and Remote Channels  
Local or Remote Channels  
72  
72  
72  
ms (max)  
ms  
(5)  
Setting  
33  
SMBus Inactive, 1 Hz conversion rate(6)  
350  
650  
650  
650  
µA (max)  
µA  
Quiescent Current  
D- Source Voltage  
Standby Mode  
300  
400  
mV  
High-level  
Low-level  
172  
225  
225  
225  
µA (max)  
µA  
External Diode Current  
Source  
10.75  
16  
Diode Source Current Ratio  
Power-On Reset Voltage  
2.8  
1.6  
2.8  
1.6  
2.8  
1.6  
V (max)  
V (min)  
°C  
T_CRIT Pin Temperature  
Threshold  
Default  
Default  
+110  
+85  
OS Pin Temperature  
Threshold  
°C  
(1) Typical figures are at TA = 25°C and represent most likely parametric norms at the time of product characterization. The typical  
specifications are not guaranteed.  
(2) Limits are guaranteed to TI's AOQL (Average Outgoing Quality Level).  
(3) Local temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the  
internal power dissipation of the LM95235 and the thermal resistance. See () for the thermal resistance to be used in the self-heating  
calculation.  
(4) The accuracy of the LM95235 is guaranteed when using a typical thermal diode of an Intel processor on a 65 nm process or an  
MMBT3904 diode-connected transistor, as selected in the Remote Diode Model Select register. See typical performance curve for  
performance with Intel processor on a 90nm process.  
(5) This specification is provided only to indicate how often temperature data is updated. The LM95235 can be read at any time without  
regard to conversion state (and will yield last conversion result).  
(6) Quiescent current will not increase substantially when the SMBus is active.  
Copyright © 2006–2013, Texas Instruments Incorporated  
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Product Folder Links: LM95235 LM95235-Q1  
LM95235  
LM95235-Q1  
SNIS142F –APRIL 2006–REVISED MARCH 2013  
www.ti.com  
Logic Electrical Characteristics  
Digital DC Characteristics  
Unless otherwise noted, these specifications apply for VDD= +3.0 Vdc to 3.6 Vdc. Boldface limits apply for TA = TJ = TMIN to  
TMAX; all other limits TA= TJ= +25°C, unless otherwise noted.  
Unit  
(Limit)  
Symbol  
Parameter  
Test Conditions  
Typical(1)  
Limits(2)  
SMBDAT, SMBCLK INPUTS  
VIN(1)  
VIN(0)  
Logical “1” Input Voltage  
Logical “0” Input Voltage  
2.1  
0.8  
V (min)  
V (max)  
SMBDAT and SMBCLK Digital Input  
Hysteresis  
VIN(HYST)  
400  
mV  
IIN(1)  
IIN(0)  
CIN  
Logical “1” Input Current  
Logical “0” Input Current  
Input Capacitance  
VIN = VDD  
-0.005  
0.005  
5
-10  
µA (max)  
µA (max)  
pF  
VIN = 0 V  
+10  
A0 DIGITAL INPUT  
VIH  
Input High Voltage  
0.90 × VDD  
0.57 × VDD  
0.43 × VDD  
0.10 × VDD  
-10  
V (min)  
V (max)  
V (min)  
V (max)  
µA (max)  
µA (max)  
pF  
VIM  
Input Middle Voltage  
VIL  
Input Low Voltage  
IIN(1)  
IIN(0)  
CIN  
Logical “1” Input Current  
Logical “0” Input Current  
Input Capacitance  
VIN = VDD  
VIN = 0 V  
-0.005  
0.005  
5
+10  
SMBDAT, T_CRIT, OS DIGITAL OUTPUTS  
IOH  
High Level Output Leakage Current  
VOUT = VDD  
IOL = 6 mA  
10  
µA (max)  
V (max)  
VOL(T_CRIT,  
OS)  
T_CRIT, OS Low Level Output Voltage  
0.4  
IOL = 4 mA  
IOL = 6 mA  
0.4  
0.6  
V (max)  
V (max)  
VOL(SMBDAT)  
COUT  
SMBDAT Low Level Output Voltage  
Digital Output Capacitance  
5
pF  
(1) Typical figures are at TA = 25°C and represent most likely parametric norms at the time of product characterization. The typical  
specifications are not guaranteed.  
(2) Limits are guaranteed to TI's AOQL (Average Outgoing Quality Level).  
SMBus Digital Switching Characteristics  
Unless otherwise noted, these specifications apply for VDD= +3.0 Vdc to +3.6 Vdc, CL (load capacitance) on output lines = 80  
pF. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25°C, unless otherwise noted.  
The switching characteristics of the LM95235 fully meet or exceed the published specifications of the SMBus version 2.0. The  
following parameters are the timing relationships between SMBCLK and SMBDAT signals related to the LM95235. They  
adhere to, but are not necessarily, the SMBus specifications.  
Parameter  
Test Conditions  
Typical  
Limits  
Unit  
(1)  
(2)  
(Limit)  
100  
10  
kHz (max)  
kHz (min)  
fSMB  
tLOW  
SMBus Clock Frequency  
SMBus Clock Low Time  
4.7  
25  
µs (min)  
ms (max)  
from VIN(0)max to VIN(0)max  
tHIGH  
SMBus Clock High Time  
SMBus Rise Time  
from VIN(1)min to VIN(1)min  
(3)  
4.0  
µs (min)  
µs (max)  
µs (max)  
tR,SMB  
tF,SMB  
1
(4)  
SMBus Fall Time  
0.3  
(1) Typical figures are at TA = 25°C and represent most likely parametric norms at the time of product characterization. The typical  
specifications are not guaranteed.  
(2) Limits are guaranteed to TI's AOQL (Average Outgoing Quality Level).  
(3) The output rise time is measured from (VIN(0)max - 0.15V) to (VIN(1)min + 0.15V).  
(4) The output fall time is measured from (VIN(1)min + 0.15V) to (VIN(0)max - 0.15V).  
6
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Product Folder Links: LM95235 LM95235-Q1  
LM95235  
LM95235-Q1  
www.ti.com  
SNIS142F –APRIL 2006–REVISED MARCH 2013  
SMBus Digital Switching Characteristics (continued)  
Unless otherwise noted, these specifications apply for VDD= +3.0 Vdc to +3.6 Vdc, CL (load capacitance) on output lines = 80  
pF. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25°C, unless otherwise noted.  
The switching characteristics of the LM95235 fully meet or exceed the published specifications of the SMBus version 2.0. The  
following parameters are the timing relationships between SMBCLK and SMBDAT signals related to the LM95235. They  
adhere to, but are not necessarily, the SMBus specifications.  
Parameter  
Test Conditions  
Typical  
Limits  
Unit  
(1)  
(2)  
(Limit)  
CL = 400 pF,  
IO = 3 mA,  
tOF  
Output Fall Time  
250  
ns (max)  
(4)  
SMBDAT and SMBCLK Time Low for  
Reset of Serial Interface  
25  
35  
ms (min)  
ms (max)  
tTIMEOUT  
tSU;DAT  
tHD;DAT  
(5)  
Data In Setup Time to SMBCLK High  
250  
ns (min)  
300  
1075  
ns (min)  
ns (max)  
Data Out Stable after SMBCLK Low  
Start Condition SMBDAT Low to  
SMBCLK Low (Start condition hold  
before the first clock falling edge)  
tHD;STA  
100  
ns (min)  
Stop Condition SMBCLK High to  
SMBDAT Low (Stop Condition Setup)  
tSU;STO  
tSU;STA  
tBUF  
100  
0.6  
1.3  
ns (min)  
µs (min)  
µs (min)  
SMBus Repeated Start-Condition Setup  
Time, SMBCLK High to SMBDAT Low  
SMBus Free Time Between Stop and  
Start Conditions  
(5) Holding the SMBDAT and/or SMBCLK lines Low for a time interval greater than tTIMEOUT will reset the LM95235's SMBus state machine,  
therefore setting SMBDAT and SMBCLK pins to a high impedance state.  
tLOW  
tR  
tF  
VIH  
SMBCLK V  
IL  
tHD;STA  
tHD;DAT  
tSU;STA  
tHIGH  
tSU;STO  
tBUF  
tSU;DAT  
VIH  
VIL  
SMBDAT  
P
S
S
P
Figure 2. SMBus Communication  
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LM95235  
LM95235-Q1  
SNIS142F –APRIL 2006–REVISED MARCH 2013  
www.ti.com  
Typical Performance Characteristics  
Thermal Diode Capacitor or PCB Leakage Current Effect  
Remote Diode Temperature Reading  
Remote Temperature Reading Sensitivity to Thermal Diode  
Filter Capacitance, TruTherm Enabled  
Figure 3.  
Figure 4.  
Intel Processor on 65nm Process or 90nm Process  
Thermal Diode Performance Comparison  
Conversion Rate Effect on Average Power Supply Current  
Figure 5.  
Figure 6. n  
8
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Copyright © 2006–2013, Texas Instruments Incorporated  
Product Folder Links: LM95235 LM95235-Q1  
LM95235  
LM95235-Q1  
www.ti.com  
SNIS142F –APRIL 2006–REVISED MARCH 2013  
FUNCTIONAL DESCRIPTION  
The LM95235 is a temperature sensor that measures Local and Remote temperature zones. The LM95235 uses  
a ΔVbe temperature sensing method. A differential voltage, representing temperature, is digitized using a Sigma-  
Delta analog to digital converter. TruTherm Technology allows the LM95235 to accurately sense the temperature  
of a thermal diode found on die fabricated using a sub-micron process. For more information on TruTherm  
Technology see Applications Hints . The LM95235 is compatible with the serial SMBus version 2.0 two-wire  
serial interface.  
The LM95235 has OS and TCRIT open-drain digital outputs that indicate the state of the local and remote  
temperature readings when compared to user-programmable limits. If enabled, the local temperature is  
compared to the user-programmable Local Shared OS and TCRIT Limit Register (Default Value = 85°C). The  
comparison result can trigger the T_CRIT pin and/or the OS pin depending on the settings of the Local TCRIT  
Mask and OS Mask bits found in Configuration Register 1. The comparison result can also be read back from  
Status Register 1. If enabled, the remote temperature is compared to the user-programmable Remote TCRIT  
Limit Register (Default Value = 110°C), and the Remote OS Limit Register (Default Value = 85°C) values. The  
comparison result can trigger the T_CRIT pin and/or the OS pin depending on the settings of Configuration  
Register 1. The following table describes the default temperature settings for each measured temperature that  
triggers T_CRIT and/or OS pins:  
Output Pin  
T_CRIT  
OS  
Remote,°C  
Local,°C  
110  
85  
85  
85  
The following table describes the limit register mapping to the T_CRIT and/or OS pins:  
Output Pin  
T_CRIT  
OS  
Remote  
Local  
Remote TCRIT Limit  
Remote OS Limit  
Local Shared OS/TCRIT Limit  
Local Shared OS/TCRIT Limit  
The T_CRIT and OS outputs are open-drain, active low.  
The remote temperature readings support a programmable digital filter. Based on the settings in Configuration  
Register 2 a digital filter can be turned on to improve the noise performance of the remote temperature as well as  
to increase the resolution of the temperature reading. If the filter is enabled the filtered readings are used for  
TCRIT and OS comparisons. The LM95235 may be placed in low power consumption (Standby) mode by setting  
the STOP/RUN bit found in Configuration Register 1. In the Standby mode, the LM95235’s SMBus interface  
remains active while all circuitry not required is turned off. In the Standby mode the host can trigger one round of  
conversions by writing to the One-Shot Register. The value written into this register is not kept. Local and  
Remote temperatures will be converted once and the T_CRIT and OS pins will reflect the comparison results  
based on this set of conversions results.  
All the temperature readings are in 16-bit left-justified word format. The 10-bit plus sign local temperature reading  
is contained in two 8-bit registers: Local Temp MSB and Local Temp LSB Registers. The remote temperature  
supports both a 13-bit unsigned and a 12-bit plus sign format. These readings are available in their  
corresponding registers as described in the LM95235 Register table. The lower 2-bits of the remote temperature  
reading will contain temperature information only if the digital filter is enabled. If the digital filter is disabled, these  
two bits will read back 0.  
The signed and unsigned remote temperature readings are available simultaneously in separate registers,  
therefore allowing both negative temperatures and temperatures 128°C and above to be measured.  
All Limit Registers support unsigned temperature format with 1°C LSb resolution. The Local Shared TCRIT and  
OS Limit Register is 7 bits for limits between 0°C and 127°C. The Remote Temperature TCRIT and OS Limit  
Registers are 8 bits each for limits between 0°C and 255°C.  
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CONVERSION SEQUENCE  
In the power-up default state the LM95235 takes a maximum of 1 second to convert the Local Temperature,  
Remote Temperature, and to update all of its registers. Only during the conversion process is the Busy bit (D7) in  
Status Register 1 (02h) high. These conversions are addressed in a round-robin sequence. The conversion rate  
may be modified by the Conversion Rate bits found in the Conversion Rate Register (R/W: 04h/0Ah). When the  
conversion rate is modified a delay is inserted between conversions, the actual maximum conversion time  
remains at 72 ms. Different conversion rates will cause the LM95235 to draw different amounts of supply current  
as shown in Figure 7.  
Figure 7. Conversion Rate Effect on Power Supply Current  
POWER-ON-DEFAULT STATES  
LM95235 always powers up to these known default states. The LM95235 remains in these states until after the  
first conversion.  
1. Command Register set to 00h  
2. Conversion Rate register defaults to 02h (1 second).  
3. Local Temperature set to 0°C until the end of the first conversion  
4. Remote Diode Temperature set to 0°C until the end of the first conversion  
5. Remote OS limit default is 55h (85°C).  
6. Local Shared and TCRIT limit default is 55h (85°C).  
7. Remote TCRIT limit default is 6Eh (110°C).  
8. Remote Offset High and Low bytes default to 00h.  
9. Configuration Register 1 defaults to 00h. This sets the LM95235 as follows:  
(a) The STOP/RUN defaults to the active/converting mode.  
(b) The Local and Remote TCRIT and OS Masks are reset to 0.  
10. Configuration Register 2 defaults to 1Fh. This sets the LM95235 as follows:  
(a) Remote Diode digital filter defaults on.  
(b) The Remote Diode mode defaults to a typical Intel processor on 65/90 nm process.  
(c) Diode Fault Mask bit for TCRIT defaults to 1.  
(d) Diode Fault Mask bit for OS defaults to 0.  
(e) Pin 6 Function defaults to Address Input function (A0).  
SMBus INTERFACE  
The LM95235 operates as a slave on the SMBus, so the SMBCLK line is an input and the SMBDAT line is  
bidirectional. The LM95235 never drives the SMBCLK line and it does not support clock stretching. According to  
SMBus specifications, the LM95235 has a 7-bit slave address. Three SMBus addresses can be selected by  
connecting pin 6 (A0) to either Low, Mid-Supply or High voltages. Table 3 shows the possible selections.  
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Table 3. Address Selection  
SMBus Device Address  
Binary  
State of the A0 Pin  
HEX  
18  
Low  
Mid-Supply  
High  
001 1000  
29  
010 1001  
4C  
100 1100  
The OS/A0 pin, after power-up, defaults as an address select input pin (A0). After power-up, the OS/A0 pin can  
only be programmed as an OS output when it is in the “High” state. Therefore, 4Ch is the only valid slave  
address that can be used when the OS/A0 pin is programmed to function as an OS output. When the OS/A0 pin  
is programmed to function as an A0 input the LM95235 will immediately detect the state of this pin to determine  
its SMBus slave address. The LM95235 does not latch the state of the A0 pin when it is functioning as an input.  
DIGITAL FILTER  
In order to suppress erroneous remote temperature readings due to noise, the LM95235 incorporates a digital  
filter for the Remote Temperature Channel. The filter is accessed in the Configuration Register 2, bits D2 (FE1)  
and D1(FE0). The filter can be set according to the following table.  
FE1  
0
FE0  
0
Filter Setting  
Filter Off  
0
1
Reserved  
Reserved  
Filter On  
1
0
1
1
Figure 8 through Figure 10 depict the filter output in response to a step input and an impulse input.  
Figure 8. Filter Impulse and Step Response Curve  
Seventeen and Fifty Degree Step Response  
Figure 9. Filter Impulse and Step Response Curve  
Impulse Response with Input Transients Less  
Than 4°C  
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Figure 10. Filter Impulse and Step Response Curve  
Impulse Response with Input Transients Greater Than 4°C  
Figure 11 shows the filter in use in a typical Intel processor on a 65/90 nm process system. Note that the two  
curves have been purposely offset for clarity. Inserting the filter does not induce an offset as shown.  
45  
LM95235 with  
Filter Off  
43  
41  
39  
37  
35  
33  
31  
29  
27  
25  
LM95235 with  
Filter On  
0
50  
100  
150  
200  
SAMPLE NUMBER  
A. The filter curves were purposely offset for clarity.  
Figure 11. Digital Filter Response in a Typical Intel Processor on a 65 nm or 90 nm Process  
TEMPERATURE DATA FORMAT  
Temperature data can only be read from the Local and Remote Temperature registers.  
Remote temperature data with the digital filter off is represented by an 10-bit plus sign, two's complement word  
and 11-bit unsigned binary word with an LSb (Least Significant Bit) equal to 0.125°C. The data format is a left  
justified 16-bit word available in two 8-bit registers. Unused bits report "0".  
Remote temperature data with the digital filter on is represented by a 12-bit plus sign, two's complement word  
and 13-bit unsigned binary word with an LSb (Least Significant Bit) equal to 0.03125°C (1/32°C). The data format  
is a left justified 16-bit word available in two 8-bit registers. Unused bits report "0".  
Table 4. 11-Bit, 2's Complement (10-Bit Plus Sign)  
Digital Output  
Temperature  
Binary  
Hex  
+125°C  
+25°C  
0111 1101 0000 0000  
0001 1001 0000 0000  
0000 0001 0000 0000  
0000 0000 0010 0000  
0000 0000 0000 0000  
1111 1111 1110 0000  
7D00h  
1900h  
0100h  
0020h  
0000h  
FFE0h  
+1°C  
+0.125°C  
0°C  
-0.125°C  
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Table 4. 11-Bit, 2's Complement (10-Bit Plus  
Sign) (continued)  
Digital Output  
Temperature  
Binary  
Hex  
-1°C  
-25°C  
-55°C  
1111 1111 0000 0000  
1110 0111 0000 0000  
1100 1001 0000 0000  
FF00h  
E700h  
C900h  
Table 5. 11-Bit, Unsigned Binary  
Digital Output  
Temperature  
Binary  
Hex  
+255.875°C  
+255°C  
+201°C  
+125°C  
+25°C  
1111 1111 1110 0000  
1111 1111 0000 0000  
1100 1001 0000 0000  
0111 1101 0000 0000  
0001 1001 0000 0000  
0000 0001 0000 0000  
0000 0000 0010 0000  
0000 0000 0000 0000  
FFE0h  
FF00h  
C900h  
7D00h  
1900h  
0100h  
0020h  
0000h  
+1°C  
+0.125°C  
0°C  
Table 6. 13-Bit, 2's Complement (12-Bit Plus Sign)  
Digital Output  
Temperature  
Binary  
Hex  
+125°C  
+25°C  
0111 1101 0000 0000  
0001 1001 0000 0000  
0000 0001 0000 0000  
0000 0000 0000 1000  
0000 0000 0000 0000  
1111 1111 1111 1000  
1111 1111 0000 0000  
1110 0111 0000 0000  
1100 1001 0000 0000  
7D00h  
1900h  
0100h  
0008h  
0000h  
FFF8h  
FF00h  
E700h  
C900h  
+1°C  
+0.03125°C  
0°C  
-0.03125°C  
-1°C  
-25°C  
-55°C  
Table 7. 13-Bit, Unsigned Binary  
Digital Output  
Temperature  
Binary  
Hex  
+255.875°C  
+255°C  
+201°C  
+125°C  
+25°C  
1111 1111 1110 0000  
1111 1111 0000 0000  
1100 1001 0000 0000  
0111 1101 0000 0000  
0001 1001 0000 0000  
0000 0001 0000 0000  
0000 0000 0000 1000  
0000 0000 0000 0000  
FFE0h  
FF00h  
C900h  
7D00h  
1900h  
0100h  
0008h  
0000h  
+1°C  
+0.03125°C  
0°C  
Local Temperature data is represented by a 10-bit plus sign, two's complement word with an LSb (Least  
Significant Bit) equal to 0.125°C. The data format is a left justified 16-bit word available in two 8-bit registers.  
Unused bits will always report "0". Local temperature readings greater than +127.875°C are clamped to  
+127.875°C, they will not roll-over to negative temperature readings.  
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Table 8. 11-Bit, 2's Complement (10-Bit Plus Sign)  
Digital Output  
Binary  
Temperature  
Hex  
+125°C  
+25°C  
+1°C  
0111 1101 0000 0000  
0001 1001 0000 0000  
0000 0001 0000 0000  
0000 0000 0010 0000  
0000 0000 0000 0000  
1111 1111 1110 0000  
1111 1111 0000 0000  
1110 0111 0000 0000  
1100 1001 0000 0000  
7D00h  
1900h  
0100h  
0020h  
0000h  
FFE0h  
FF00h  
E700h  
C900h  
+0.125°C  
0°C  
-0.125°C  
-1°C  
-25°C  
-55°C  
SMBDAT OPEN-DRAIN OUTPUT  
The SMBDAT output is an open-drain output and does not have internal pull-ups. A “high” level will not be  
observed on this pin until pull-up current is provided by some external source, typically a pull-up resistor. Choice  
of resistor value depends on many system factors but, in general, the pull-up resistor should be as large as  
possible without effecting the SMBus desired data rate. This will minimize any internal temperature reading  
errors due to internal heating of the LM95235. The maximum resistance of the pull-up to provide a 2.1V high  
level, based on LM95235 specification for High Level Output Current with the supply voltage at 3.0V, is 82 kΩ  
(5%) or 88.7 kΩ (1%).  
T_CRIT OUTPUT AND TCRIT LIMIT  
The LM95235's T_CRIT pin is an active-low open-drain output that is triggered when the local and/or the remote  
temperature conversion is above the limits defined by the Remote and/or Local Limit registers. The state of the  
T_CRIT pin will return to the HIGH state when both the Local and Remote temperatures are below the values  
programmed into the Limit Registers less the value in the Common Hysteresis Register. Additionally, if the  
remote temperature exceeds the value in the Remote TCRIT Limit Register the Status Bit for Remote TCRIT  
(RTCRIT), in Status Register 1, is set to 1. In the same way if the local temperature exceeds the value in the  
Local Shared OS and TCRIT Limit Register the Status Bit for the Shared Local OS and TCRIT (LOC) bit in  
Status Register 1 is set to 1.The T_CRIT output and the Status Register flags are updated after every Local and  
Remote temperature conversion. See Figure 12  
Remote TCRIT Limit  
Hysteresis  
Remote  
Temperature  
Remote TCRIT Limit -  
Hysteresis  
T_CRIT  
Output Pin  
Status bit RCRIT  
Figure 12. T_CRIT Comparator Temperature Response Diagram  
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OS OUTPUT AND OS LIMIT  
The LM95235's OS/A0 pin is selected as an OS digital output as described in SMBus INTERFACE. As an OS  
pin, it is activated whenever the local and/or remote temperature conversion is above the limits defined by the  
Limit registers. If the remote temperature exceeds the value in the Remote OS Limit Register the Status Bit for  
Remote OS (ROS) in Status Register 1 is set to 1. In the same way if the local temperature exceeds the value in  
the Local Shared OS and TCRIT Limit Register the Status Bit for the Shared Local OS and TCRIT (LOC) bit in  
Status Register 1 is set to 1. The state of the T_CRIT pin output will return to the HIGH state when both the  
Local and Remote temperatures are below the values programmed into the Limit Registers less the value in the  
Common Hysteresis Register. The OS output and the Status Register flags are updated after every Local and  
Remote temperature conversion. See Figure 13.  
Remote OS Limit  
Hysteresis  
Remote  
Temperature  
Remote OS Limit -  
Hysteresis  
OS  
Output Pin  
Status bit ROS  
Figure 13. OS Temperature Response Diagram  
DIODE FAULT DETECTION  
The LM95235 is equipped with operational circuitry designed to detect fault conditions concerning the remote  
diodes. In the event that the D+ pin is detected as shorted to GND, D-, VDD or D+ is floating, the Remote  
Temperature reading is –128.000°C if signed format is selected and +255.875°C if unsigned format is selected.  
In addition, the Status Register 1 bit D2 is set.  
COMMUNICATING WITH THE LM95235  
The data registers in the LM95235 are selected by the Command Register. At power-up the Command Register  
is set to “00”, the location for the Read Local Temperature Register. The Command Register latches the last  
location it was set to. Each data register in the LM95235 falls into one of four types of user accessibility:  
1. Read only  
2. Write only  
3. Write/Read same address  
4. Write/Read different address  
A Write to the LM95235 will always include the address byte and the command byte. A write to any register  
requires one data byte.  
Reading the LM95235 can take place either of two ways:  
1. If the location latched in the Command Register is correct (most of the time it is expected that the Command  
Register will point to one of the Read Temperature Registers because that will be the data most frequently  
read from the LM95235), then the read can simply consist of an address byte, followed by retrieving the data  
byte.  
2. If the Command Register needs to be set, then an address byte, command byte, repeat start, and another  
address byte will accomplish a read.  
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The data byte has the most significant bit first. At the end of a read, the LM95235 can accept either acknowledge  
or No Acknowledge from the Master (No Acknowledge is typically used as a signal for the slave that the Master  
has read its last byte). When retrieving all 11 bits from a previous remote diode temperature measurement, the  
master must insure that all 11 bits are from the same temperature conversion. This may be achieved by reading  
the MSB register first. The LSB will be locked after the MSB is read. The LSB will be unlocked after being read. If  
the user reads MSBs consecutively, each time the MSB is read, the LSB associated with that temperature will be  
locked in and override the previous LSB value locked-in.  
1
9
1
9
SMBCLK  
SMBDAT  
R/W  
A6 A5 A4 A3 A2 A1 A0  
D7 D6 D5 D4 D3 D2 D1 D0  
Ack  
by  
LM95235  
Stop  
by  
Master  
Ack by  
LM95235  
Start by  
Master  
Frame 1  
Frame 2  
Serial Bus Address Byte  
Command Byte  
Figure 14. SMBus Timing Diagram for Access of Data (Default Address of 4Ch is shown)  
(a) Serial Bus Write to the Internal Command Register  
1
9
1
9
SMBCLK  
SMBDAT  
R/W  
A6 A5 A4 A3 A2 A1 A0  
D7 D6 D5 D4 D3 D2 D1 D0  
Ack  
by  
LM95235  
Ack  
by  
LM95235  
Start by  
Master  
Frame 1  
Frame 2  
Serial Bus Address Byte  
Command Byte  
1
9
SMBCLK  
(Continued)  
SMBDAT  
(Continued)  
D7 D6 D5 D4 D3 D2 D1 D0  
Stop  
by  
Ack by  
LM95235  
Master  
Frame 3  
Data Byte  
Figure 15. SMBus Timing Diagram for Access of Data (Default Address of 4Ch is shown)  
(b) Serial Bus Write to the Internal Command Register Followed by a Data Byte  
1
9
1
9
SMBCLK  
SMBDAT  
A6 A5 A4 A3 A2 A1 A0 R/W  
D7 D6 D5 D4 D3 D2 D1 D0  
Ack  
by  
LM95235  
NoAck Stop  
Start by  
Master  
by  
by  
Master Master  
Frame 1  
Frame 2  
Serial Bus Address Byte  
Data Byte from the LM95235  
Figure 16. SMBus Timing Diagram for Access of Data (Default Address of 4Ch is shown)  
(c) Serial Bus Byte Read from a Register with the Internal Command Register Preset to Desired Value  
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1
9
1
9
SMBCLK  
SMBDAT  
R/W  
A6 A5 A4 A3 A2 A1 A0  
D7 D6 D5 D4 D3 D2 D1 D0  
Ack  
by  
LM95235  
Ack Repeat  
by Start by  
LM95235 Master  
Start by  
Master  
Frame 1  
Frame 2  
Serial Bus Address Byte  
Command Byte  
1
9
1
9
SMBCLK  
(Continued)  
SMBDAT  
(Continued)  
A6 A5 A4 A3 A2 A1 A0  
D7 D6 D5 D4 D3 D2 D1 D0  
R/W  
Ack  
by  
No Ack Stop  
by  
by  
Master Master  
LM95235  
Frame 3  
Frame 4  
Serial Bus Address Byte  
Data Byte from the LM95235  
Figure 17. SMBus Timing Diagram for Access of Data (Default Address of 4Ch is shown)  
(d) Serial Bus Write Followed by a Repeat Start and Immediate Read  
SERIAL INTERFACE RESET  
In the event that the SMBus Master is RESET while the LM95235 is transmitting on the SMBDAT line, the  
LM95235 must be returned to a known state in the communication protocol. This may be done in one of two  
ways:  
1. When SMBDAT is LOW, the LM95235 SMBus state machine resets to the SMBus idle state if either  
SMBDAT or SMBCLK are held low for more than 35 ms (tTIMEOUT). Note that according to SMBus  
specification 2.0 all devices are to timeout when either the SMBCLK or SMBDAT lines are held low for 25 -  
35 ms. Therefore, to insure a timeout of all devices on the bus the SMBCLK or SMBDAT lines must be held  
low for at least 35 ms.  
2. When SMBDAT is HIGH, have the master initiate an SMBus start. The LM95235 will respond properly to an  
SMBus start condition at any point during the communication. After the start the LM95235 will expect an  
SMBus Address address byte.  
ONE-SHOT CONVERSION  
The One-Shot register is used to initiate a single conversion and comparison cycle when the device is in standby  
mode, after which the device returns to standby. This is not a data register and it is the write operation that  
causes the one-shot conversion. The data written to this address is irrelevant and is not stored. A zero will  
always be read from this register.  
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LM95235 REGISTERS  
Command register selects which registers will be read from or written to. Data for this register should be  
transmitted during the Command Byte of the SMBus write communication. POR means Power-On Reset.  
P0-P7: Command  
P7  
P6  
P5  
P4  
P3  
P2  
P1  
P0  
Command  
Table 9. Register Summary  
Read  
Address Address  
(Hex)  
Write  
No.  
of  
bits  
POR  
Default  
(Hex)  
Read/  
Write  
Register Name  
Description  
(Hex)  
TEMPERATURE SIGNED VALUE REGISTERS  
Local Temp MSB  
0x00  
0x30  
0x01  
0x10  
NA  
NA  
NA  
NA  
8
3
-
-
-
-
RO  
RO  
RO  
RO  
Supports SMBus byte  
Local Temp LSB  
All unused bits are reported as "0".  
Supports SMBus byte  
Remote Temp MSB – Signed  
Remote Temp LSB – Signed  
8
5/3  
All unused bits are reported as "0".  
TEMPERATURE UNSIGNED VALUE REGISTERS  
Remote Temp MSB – Unsigned  
Remote Temp LSB – Unsigned  
0x31  
0x32  
NA  
NA  
8
-
-
RO  
RO  
Supports SMBus byte reads  
5/3  
All unused bits are reported as "0".  
DIODE CONFIGURATION REGISTERS  
Filter Enable, Diode Model Select, Diode  
Fault Mask; Pin 6 OS/A0 function select  
Configuration Register 2  
0xBF  
0xBF  
0x11  
0x12  
5
8
3
0x1F  
0x00  
0x00  
R/W  
R/W  
R/W  
Remote Offset High Byte  
Remote Offset Low Byte  
0x11  
0x12  
2's Complement  
2's Complement  
All unused bits are reported as "0".  
GENERAL CONFIGURATION REGISTERS  
0x03/  
0x09/  
0x03  
STOP/RUN , Remote TCRIT mask, Remote  
OS mask, Local TCRIT mask, Local OS mask  
Configuration Register 1  
0x09  
5
2
-
0x00  
0x02  
-
R/W  
R/W  
WO  
0x04/0x0 0x04/0x0  
Conversion Rate  
One-Shot  
Continuous or specific settings  
A
A
A write to this register activates one  
conversion if STOP/RUN bit = 1.  
NA  
0x0F  
STATUS REGISTERS  
Status Register 1  
0x02  
0x33  
NA  
NA  
5
2
-
-
RO  
RO  
Busy bit, and status bits  
Status Register 2  
Not Ready bit, Diode detect bit  
LIMIT REGISTERS  
0x07/  
0x0D  
0x0D/  
0x07  
Unsigned 0 to 255°C  
Default 85°C  
Remote OS Limit  
8
7
0x55  
0x55  
R/W  
R/W  
Local Shared OS and T_Crit Limit  
Unsigned 0 to 127°C  
Default 85°C  
0x20  
0x20  
Unsigned 0 to 255°C  
Default 110°C  
Remote T_Crit Limit  
0x19  
0x21  
0x19  
0x21  
8
5
0x6E  
0x0A  
R/W  
R/W  
Common Hysteresis  
IDENTIFICATION REGISTERS  
Manufacturer ID  
up to 31°C  
0xFE  
0xFF  
0x01  
0xB1  
RO  
RO  
Always returns 0x01  
Revision ID  
Returns revision number.  
18  
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LOCAL and REMOTE MSB and LSB TEMPERATURE REGISTERS  
Table 10. Local Temperature MSB  
(Read Only Address 00h)  
10-bit plus sign format:  
BIT  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Value  
SIGN  
64  
32  
16  
8
4
2
1
Temperature Data: LSb = 1°C.  
Table 11. Local Temperature LSB  
(Read Only Address 30h)  
10-bit plus sign format:  
BIT  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Value  
0.5  
0.25  
0.125  
0
0
0
0
0
Temperature Data: LSb = 0.125°C.  
Table 12. Signed Remote Temperature MSB  
(Read Only Address 01h)  
12-bit plus sign format:  
BIT  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Value  
SIGN  
64  
32  
16  
8
4
2
1
Temperature Data: LSb = 1°C.  
Table 13. Signed Remote Temperature LSB, Filter On  
(Read Only Address 10h)  
12-bit plus sign binary formats with filter on:  
BIT  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Value  
0.5  
0.25  
0.125  
0.0625  
0.03125  
0
0
0
Table 14. Signed Remote Temperature LSB, Filter Off  
(Read Only Address 10h)  
12-bit plus sign binary formats with filter off:  
BIT  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Value  
0.5  
0.25  
0.125  
0
0
0
0
0
Temperature Data: LSb = 0.125°C filter off or 0.03125°C filter on.  
Table 15. Unsigned Remote Temperature MSB  
(Read Only Address 31h)  
13-bit unsigned format:  
BIT  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Value  
128  
64  
32  
16  
8
4
2
1
Temperature Data: LSb = 1°C.  
Table 16. Unsigned Remote Temperature LSB, Filter On  
(Read Only Address 32h)  
13-bit unsigned binary formats with filter on:  
BIT  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Value  
0.5  
0.25  
0.125  
0.0625  
0.03125  
0
0
0
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Table 17. Unsigned Remote Temperature LSB, Filter Off  
(Read Only Address 32h)  
13-bit unsigned binary formats with filter off:  
BIT  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Value  
0.5  
0.25  
0.125  
0
0
0
0
0
Temperature Data: LSb = 0.125°C filter off or 0.03125°C filter on.  
For data synchronization purposes, the MSB register should be read first if the user wants to read both MSB and LSB registers. The LSB  
will be locked after the MSB is read. The LSB will be unlocked after being read. If the user reads MSBs consecutively, each time the MSB  
is read, the LSB associated with that temperature will be locked in and override the previous LSB value locked-in.  
DIODE CONFIGURATION REGISTERS  
Table 18. Configuration Register 2  
(Read/write Address BFh)  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
0
OS/A0 Function Select  
OS Fault Mask  
T_CRIT Mask  
TruTherm Select  
RFE1  
RFE0  
1
Bits  
Name  
Description  
Reports "0" when read.  
7
Reserved  
0: Address (A0) function is enabled  
1: Over-temperature Shutdown (OS) is enabled  
6
OS/A0 Function Select  
0: Off  
1: On  
5
4
Diode Fault Mask for OS  
Diode Fault Mask for T_CRIT  
0: Off  
1: On  
0: Selects Diode Model 2, MMBT3904, with TruTherm technology disabled.  
1: Selects Diode Model 1, A typical Intel Processor, with 65 nm or 90 nm  
technology, and TruTherm technology enabled.  
Remote Diode TruTherm  
Mode Select  
3
00: Filter Disable  
01: Reserved  
10: Reserved  
2-1  
0
Remote Filter Enable  
Reserved  
11: Filter Enable  
Reports "1" when read.  
Power up default is 1Fh.  
Table 19. Remote Offset High Byte (2's Complement)  
(R/W Address 11h)  
10-bit plus sign format:  
BIT  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Value  
SIGN  
64  
32  
16  
8
4
2
1
Power up default is 00h.  
Table 20. Remote Offset Low Byte (2's Complement)  
10-bit plus sign format:(R/W Address 12h)  
BIT  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Value  
0.50  
0.25  
0.125  
0
0
0
0
0
Power up default is 00h. LSb = 0.125°C.  
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GENERAL CONFIGURATION REGISTERS  
Table 21. Configuration Register 1  
(Read/write Address 03h/09h or 09h/03h):  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
0
STOP/RUN  
0
Remote T_CRIT Mask  
Remote OS Mask  
Local T_CRIT Mask  
Local OS Mask  
0
Bits  
Name  
Description  
7
Reserved  
Reports "0" when read.  
0: Active / Converting  
1: Standby  
6
5
4
STOP/RUN  
Reserved  
Reports "0" when read.  
0: Off  
1: On  
Remote T_CRIT Mask  
0: Off  
1: On  
3
2
Remote OS Mask  
0: Off  
1: On  
Local T_CRIT Mask  
0: Off  
1: On  
1
0
Local OS Mask  
Reserved  
Reports "0" when read.  
Power up default is 00h.  
Table 22. Conversion Rate Register  
(Read/write Address 04h/0Ah or 0Ah/04h):  
2-bit format:  
BIT  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Value  
0
0
0
0
0
0
MSb  
LSb  
Bits  
Name  
Reserved  
Description  
7:2  
Reports "0" when read.  
00: Continuous (33 ms typical when remote diode is missing or fault or 63 ms typical  
with remote diode connected)  
01: 0.364 seconds  
10: 1 second  
1:0  
Conversion Rate  
11: 2.5 seconds  
Power up default is 02h (1 second).  
Table 23. One Shot Register  
(Write Only Address 0Fh):  
Writing to this register will start one conversion if the device is in standby mode (i.e. STOP/RUN bit = 1).  
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STATUS REGISTERS  
Table 24. Status Register 1  
(Read Only Address 02h):  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Busy  
0
0
ROS  
0
Diode Fault  
RTCRIT  
LOC  
Bits  
7
Name  
Description  
Busy  
When set to "1" the part is converting.  
Report "0" when read.  
6-5  
4
Reserved  
ROS  
Status Bit for Remote OS  
Reports "0" when read.  
3
Reserved  
2
Status bit for missing diode (Either D+ is shorted to GND, and/or VDD, and/or D-; or D+ is floating.)  
Note: The unsigned registers will report 0°C if read; the signed value registers will report -  
128.000°C.  
Diode Fault  
1
0
RTCRIT  
LOC  
Status bit for Remote TCRIT.  
Status bit for the shared Local OS and TCRIT .  
Table 25. Status Register 2  
(Read Only Address 33h):  
D7  
D6  
TruTherm 3904 Detect  
D5  
D4  
D3  
D2  
D1  
D0  
Not Ready  
0
0
0
0
0
0
Bits  
Name  
Description  
7
Not Ready  
Waiting for 30 ms power-up sequence to end.  
1: MMBT3904 is connected and TruTherm technology is enabled.  
0: MMBT3904 is connected and TruTherm technology is disabled.  
6
TruTherm 3904 Detect  
Reserved  
5-0  
Reports "0" when read.  
LIMIT REGISTERS  
Table 26. Unsigned Remote OS Limit - 0°C to 255°C  
(Read/Write Address 07h/0Dh or 0Dh/07h):  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
128  
64  
32  
16  
8
4
2
1
Power on Reset default is 55h (85°C).  
Table 27. Unsigned Local Shared OS and T_CRIT Limit - 0°C to 127°C  
(Read/Write Address 20h):  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
128  
64  
32  
16  
8
4
2
1
Power on Reset default is 55h (85°C).  
Table 28. Unsigned Remote T_CRIT Limit - 0°C to 255°C  
(Read/Write Address 19h):  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
128  
64  
32  
16  
8
4
2
1
Power on Reset default is 6Eh (110°C).  
22  
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Table 29. Common Hysteresis Register  
(Read/Write Address 21h):  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
0
0
0
16  
8
4
2
1
Power on Reset default is 0Ah (10°C).  
IDENTIFICATION REGISTERS  
Table 30. Manufacturers ID Register  
(Read Only Address FEh): Always returns 01h.  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
0
0
0
0
0
0
0
1
Table 31. Revision ID Register  
(Read Only Address FFh): Default is B1h. This register will increment by 1 every time there is a revision to the die by Texas Instruments.  
The initial revision bits for B1h are shown below.  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
1
0
1
1
0
0
0
1
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APPLICATIONS HINTS  
The LM95235 can be applied easily in the same way as other integrated-circuit temperature sensors, and its  
remote diode sensing capability allows it to be used in new ways as well. It can be soldered to a printed circuit  
board, and because the path of best thermal conductivity is between the die and the pins, its temperature will  
effectively be that of the printed circuit board lands and traces soldered to the LM95235's pins. This presumes  
that the ambient air temperature is almost the same as the surface temperature of the printed circuit board; if the  
air temperature is much higher or lower than the surface temperature, the actual temperature of the LM95235 die  
will be at an intermediate temperature between the surface and air temperatures. Again, the primary thermal  
conduction path is through the leads, so the circuit board temperature will contribute to the die temperature much  
more strongly than will the air temperature.  
To measure temperature external to the LM95235's die, use a remote diode. This diode can be located on the  
die of a target IC, allowing measurement of the IC's temperature, independent of the LM95235's temperature. A  
discrete diode can also be used to sense the temperature of external objects or ambient air. Remember that a  
discrete diode's temperature will be affected, and often dominated, by the temperature of its leads. Most silicon  
diodes do not lend themselves well to this application. It is recommended that an MMBT3904 transistor base-  
emitter junction be used with the collector tied to the base.  
The LM95235's TruTherm technology allows accurate sensing of integrated thermal diodes, such as those found  
on most processors. With TruTherm technology turned off, the LM95235 can measure a diode-connected  
transistor such as the MMBT3904 or the thermal diode found in an AMD processor.  
The LM95235 has been optimized to measure the remote thermal diode integrated in a typical Intel processor on  
65 nm or 90 nm process or an MMBT3904 transistor. Using the Remote Diode Model Select register either pair  
of remote inputs can be assigned to be either a typical Intel processor on 65 nm or 90 nm process or an  
MMBT3904.  
DIODE NON-IDEALITY  
Diode Non-Ideality Factor Effect on Accuracy  
When a transistor is connected as a diode, the following relationship holds for variables VBE, T and IF:  
V
h xV  
BE  
≈
’
◊
»
ÿ
Ÿ
⁄
t
«
…
=
x e  
-1  
IF IS  
…
Ÿ
where  
kT  
q
=
Vt  
•
•
•
•
•
•
•
•
q = 1.6×10-19 Coulombs (the electron charge),  
T = Absolute Temperature in Kelvin  
k = 1.38×10-23 joules/K (Boltzmann's constant),  
η is the non-ideality factor of the process the diode is manufactured on,  
IS = Saturation Current and is process dependent,  
If = Forward Current through the base-emitter junction  
VBE = Base-Emitter Voltage drop  
(1)  
(2)  
In the active region, the -1 term is negligible and may be eliminated, yielding the following equation  
V
h xV  
BE  
≈
’
»
ÿ
t
«
…
◊Ÿ  
=
x e  
IF IS  
…
Ÿ
⁄
In Equation 2, η and IS are dependant upon the process that was used in the fabrication of the particular diode.  
By forcing two currents with a very controlled ratio(IF2 / IF1) and measuring the resulting voltage difference, it is  
possible to eliminate the IS term. Solving for the forward voltage difference yields the relationship:  
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≈IF2 ’  
«IF1 ◊  
kT  
≈ ’ x ln  
= h x « q ◊  
DVBE  
(3)  
(4)  
Solving Equation 3 for temperature yields:  
q x DVBE  
T =  
IF2  
≈
’
h x k x ln  
∆
∆
÷
÷
IF1  
«
◊
Equation 4 holds true when a diode connected transistor such as the MMBT3904 is used. When this “diode”  
equation is applied to an integrated diode such as a processor transistor with its collector tied to GND as shown  
in Figure 18 it will yield a wide non-ideality spread. This wide non-ideality spread is not due to true process  
variation but due to the fact that Equation 4 is an approximation.  
TruTherm technology uses the transistor equation, Equation 5, which is a more accurate representation of the  
topology of the thermal diode found in an FPGA or processor.  
q x DVBE  
T =  
I
≈
’
C2  
h x k x ln∆  
÷
÷
∆
IC1  
«
◊
(5)  
2
3
D+  
D-  
I
E
= I  
F
100 pF  
PROCESSOR  
I
R
LM95235  
I
C
I
F
2
3
D+  
D-  
MMBT3904  
100 pF  
I
R
LM95235  
Figure 18. Thermal Diode Current Paths  
TruTherm should only be enabled when measuring the temperature of a transistor integrated as shown in the  
processor of Figure 18, because Equation 5 only applies to this topology.  
Calculating Total System Accuracy  
The voltage seen by the LM95235 also includes the IFRS voltage drop of the series resistance. The non-ideality  
factor, η, is the only other parameter not accounted for and depends on the diode that is used for measurement.  
Since ΔVBE is proportional to both η and T, the variations in η cannot be distinguished from variations in  
temperature. Since the non-ideality factor is not controlled by the temperature sensor, it will directly add to the  
inaccuracy of the sensor. For the for Intel processor on 65nm process, Intel specifies a +4.06%/-0.897% variation  
in η from part to part when the processor diode is measured by a circuit that assumes diode equation,  
Equation 4, as true. As an example, assume a temperature sensor has an accuracy specification of ±1.0°C at a  
temperature of 80°C (353 Kelvin) and the processor diode has a non-ideality variation of +1.19%/-0.27%. The  
resulting system accuracy of the processor temperature being sensed will be:  
TACC = + 1.0°C + (+4.06% of 353 K) = +15.3°C  
(6)  
and  
TACC = - 1.0°C + (-0.89% of 353 K) = -4.1°C  
(7)  
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TrueTherm technology uses the transistor equation, Equation 5, resulting in a non-ideality spread that truly  
reflects the process variation which is very small. The transistor equation non-ideality spread is ±0.39% for the  
Pentium 4 processor on 90 nm process. The resulting accuracy when using TruTherm technology improves to:  
TACC = ±0.75°C + (±0.39% of 353 K) = ± 2.16°C  
(8)  
The next error term to be discussed is that due to the series resistance of the thermal diode and printed circuit  
board traces. The thermal diode series resistance is specified on most processor data sheets. For Intel  
processors in 65 nm process, this is specified at 4.52Ω typical. The LM95235 accommodates the typical series  
resistance of Intel Processor on 65 nm process. The error that is not accounted for is the spread of the  
processor's series resistance, that is 2.79Ω to 6.24Ω or ±1.73Ω. The equation to calculate the temperature error  
due to series resistance (TER) for the LM95235 is simply:  
º
W
≈
’
÷
C
TER = 0.62  
x R  
PCB  
∆
«
◊
(9)  
Solving Equation 9 for RPCB equal to ±1.73Ω results in the additional error due to the spread in the series  
resistance of ±1.07°C. The spread in error cannot be canceled out, as it would require measuring each individual  
thermal diode device. This is quite difficult and impractical in a large volume production environment.  
Equation 9 can also be used to calculate the additional error caused by series resistance on the printed circuit  
board. Since the variation of the PCB series resistance is minimal, the bulk of the error term is always positive  
and can simply be cancelled out by subtracting it from the output readings of the LM95235.  
Transistor Equation ηT, Non-ideality  
Series R,Ω  
Processor Family  
Min  
Typ  
Max  
Intel Processor on 65 nm process  
0.997  
1.001  
1.005  
4.52  
Diode Equation ηD, Non-ideality  
Series R,Ω  
Processor Family  
Min  
Typ  
Max  
Pentium III CPUID 67h  
1
1.0065  
1.0125  
Pentium III CPUID 68h,  
PGA370Socket, Celeron  
1.0057  
1.008  
1.0125  
Pentium 4, 423 pin  
Pentium 4, 478 pin  
0.9933  
0.9933  
1.0045  
1.0045  
1.0368  
1.0368  
Pentium 4 on 0.13 micron process,  
2 to 3.06 GHz  
1.0011  
1.0021  
1.0030  
3.64  
Pentium 4 on 90 nm process  
Intel Processor on 65 nm process  
Pentium M (Centrino)  
MMBT3904  
1.0083  
1.000  
1.011  
1.009  
1.023  
1.050  
3.33  
4.52  
3.06  
1.00151  
1.00220  
1.003  
1.00289  
AMD Athlon MP model 6  
AMD Athlon 64  
1.002  
1.008  
1.008  
1.008  
1.016  
1.096  
1.096  
1.008  
AMD Opteron  
1.008  
AMD Sempron  
1.00261  
0.93  
Compensating for Different Non-Ideality  
In order to compensate for the errors introduced by non-ideality, the temperature sensor is calibrated for a  
particular processor. Texas Instruments temperature sensors are always calibrated to the typical non-ideality and  
series resistance of a given processor type. The LM95235 is calibrated for two non-ideality factors and series  
resistance values thus supporting the MMBT3904 transistor and Intel processors on 65nm process without the  
requirement for additional trims. For most accurate measurements TruTherm mode should be turned on when  
measuring the Intel processor on 65nm process to minimize the error introduced by the false non-ideality spread  
(see Diode Non-Ideality Factor Effect on Accuracy). When a temperature sensor calibrated for a particular  
processor type is used with a different processor type, additional errors are introduced.  
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Temperature errors associated with non-ideality of different processor types may be reduced in a specific  
temperature range of concern through use of software calibration. Typical Non-ideality specification differences  
cause a gain variation of the transfer function, therefore the center of the temperature range of interest should be  
the target temperature for calibration purposes. The following equation can be used to calculate the temperature  
correction factor (TCF) required to compensate for a target non-ideality differing from that supported by the  
LM95235.  
hS - hPROCESSOR  
≈
«
’
◊
x
(TCR + 273K)  
TCF  
=
hS  
where  
•
•
•
ηS = LM95235 non-ideality for accuracy specification  
ηPROCESSOR = Processor thermal diode typical non-ideality  
TCR = center of the temperature range of interest in °C  
(10)  
The correction factor should be directly added to the temperature reading produced by the LM95235. For  
example when using the LM95235, with the 3904 mode selected, to measure a AMD Athlon processor, with a  
typical non-ideality of 1.008, for a temperature range of 60°C to 100°C the correction factor would calculate to:  
1.003 - 1.008  
(80 + 273) = -1.75oC  
≈
«
’
◊
TCF  
=
∂
1.003  
(11)  
Therefore, 1.75°C should be subtracted from the temperature readings of the LM95235 to compensate for the  
differing typical non-ideality target.  
PCB LAYOUT FOR MINIMIZING NOISE  
Figure 19. Ideal Diode Trace Layout  
In a noisy environment, such as a processor mother board, layout considerations are very critical. Noise induced  
on traces running between the remote temperature diode sensor and the LM95235 can cause temperature  
conversion errors. Keep in mind that the signal level the LM95235 is trying to measure is in microvolts. The  
following guidelines should be followed:  
1. VDD should be bypassed with a 0.1 µF capacitor in parallel with 100 pF. The 100 pF capacitor should be  
placed as close as possible to the power supply pin. A bulk capacitance of approximately 10 µF needs to be  
in the near vicinity of the LM95235.  
2. A 100 pF diode bypass capacitor is recommended to filter high frequency noise but may not be necessary.  
Make sure the traces to the 100 pF capacitor are matched. Place the filter capacitors close to the LM95235  
pins.  
3. Ideally, the LM95235 should be placed within 10 cm of the Processor diode pins with the traces being as  
straight, short and identical as possible. Trace resistance of 1Ω can cause as much as 0.62°C of error. This  
error can be compensated by using simple software offset compensation.  
4. Diode traces should be surrounded by a GND guard ring to either side, above and below if possible. This  
GND guard should not be between the D+ and D- lines. In the event that noise does couple to the diode  
lines it would be ideal if it is coupled common mode. That is equally to the D+ and D- lines.  
5. Avoid routing diode traces in close proximity to power supply switching or filtering inductors.  
6. Avoid running diode traces close to or parallel to high speed digital and bus lines. Diode traces should be  
kept at least 2 cm apart from the high speed digital traces.  
Copyright © 2006–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
27  
Product Folder Links: LM95235 LM95235-Q1  
LM95235  
LM95235-Q1  
SNIS142F –APRIL 2006–REVISED MARCH 2013  
www.ti.com  
7. If it is necessary to cross high speed digital traces, the diode traces and the high speed digital traces should  
cross at a 90 degree angle.  
8. The ideal place to connect the LM95235's GND pin is as close as possible to the Processors GND  
associated with the sense diode.  
9. Leakage current between D+ and GND and between D+ and D- should be kept to a minimum. Thirteen  
nano-amperes of leakage can cause as much as 0.2°C of error in the diode temperature reading. Keeping  
the printed circuit board as clean as possible will minimize leakage current.  
Noise coupling into the digital lines greater than 400 mVp-p (typical hysteresis) and undershoot less than 500 mV  
below GND, may prevent successful SMBus communication with the LM95235. SMBus no acknowledge is the  
most common symptom, causing unnecessary traffic on the bus. Although the SMBus maximum frequency of  
communication is rather low (100 kHz max), care still needs to be taken to ensure proper termination within a  
system with multiple parts on the bus and long printed circuit board traces. An RC lowpass filter with a 3 dB  
corner frequency of about 40 MHz is included on the LM95235's SMBCLK input. Additional resistance can be  
added in series with the SMBDAT and SMBCLK lines to further help filter noise and ringing. Minimize noise  
coupling by keeping digital traces out of switching power supply areas as well as ensuring that digital lines  
containing high speed data communications cross at right angles to the SMBDAT and SMBCLK lines.  
28  
Submit Documentation Feedback  
Copyright © 2006–2013, Texas Instruments Incorporated  
Product Folder Links: LM95235 LM95235-Q1  
 
LM95235  
LM95235-Q1  
www.ti.com  
SNIS142F –APRIL 2006–REVISED MARCH 2013  
REVISION HISTORY  
Changes from Revision E (March 2013) to Revision F  
Page  
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 28  
Copyright © 2006–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
29  
Product Folder Links: LM95235 LM95235-Q1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
1-Nov-2013  
PACKAGING INFORMATION  
Orderable Device  
LM95235CIMM/NOPB  
LM95235CIMMX/NOPB  
LM95235DIMM/NOPB  
LM95235DIMMX/NOPB  
LM95235EIMM/NOPB  
LM95235EIMMX/NOPB  
Status Package Type Package Pins Package  
Eco Plan  
Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
0 to 90  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(6)  
(3)  
(4/5)  
ACTIVE  
VSSOP  
VSSOP  
VSSOP  
VSSOP  
VSSOP  
VSSOP  
DGK  
8
8
8
8
8
8
1000  
Green (RoHS  
& no Sb/Br)  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
CU SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
T36C  
T36C  
T36D  
T36D  
T36E  
T36E  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
DGK  
DGK  
DGK  
DGK  
DGK  
3500  
1000  
3500  
1000  
3500  
Green (RoHS  
& no Sb/Br)  
0 to 90  
Green (RoHS  
& no Sb/Br)  
-40 to 90  
-40 to 90  
-40 to 90  
-40 to 90  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
LM95235QEIMM  
NRND  
VSSOP  
VSSOP  
DGK  
DGK  
8
8
1000  
1000  
TBD  
Call TI  
CU SN  
Call TI  
-40 to 85  
-40 to 85  
36QE  
36QE  
LM95235QEIMM/NOPB  
ACTIVE  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
LM95235QEIMMX/NOPB  
ACTIVE  
VSSOP  
DGK  
8
3500  
Green (RoHS  
& no Sb/Br)  
CU SN  
Level-1-260C-UNLIM  
-40 to 85  
36QE  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
1-Nov-2013  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish  
value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF LM95235, LM95235-Q1 :  
Catalog: LM95235  
•
Automotive: LM95235-Q1  
•
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
•
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects  
•
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
23-Sep-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LM95235CIMM/NOPB  
VSSOP  
DGK  
DGK  
DGK  
DGK  
DGK  
DGK  
DGK  
DGK  
DGK  
8
8
8
8
8
8
8
8
8
1000  
3500  
1000  
3500  
1000  
3500  
1000  
1000  
3500  
178.0  
330.0  
178.0  
330.0  
178.0  
330.0  
178.0  
178.0  
330.0  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
12.4  
5.3  
5.3  
5.3  
5.3  
5.3  
5.3  
5.3  
5.3  
5.3  
3.4  
3.4  
3.4  
3.4  
3.4  
3.4  
3.4  
3.4  
3.4  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
12.0  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
LM95235CIMMX/NOPB VSSOP  
LM95235DIMM/NOPB VSSOP  
LM95235DIMMX/NOPB VSSOP  
LM95235EIMM/NOPB VSSOP  
LM95235EIMMX/NOPB VSSOP  
LM95235QEIMM VSSOP  
LM95235QEIMM/NOPB VSSOP  
LM95235QEIMMX/NOPB VSSOP  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
23-Sep-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LM95235CIMM/NOPB  
LM95235CIMMX/NOPB  
LM95235DIMM/NOPB  
LM95235DIMMX/NOPB  
LM95235EIMM/NOPB  
LM95235EIMMX/NOPB  
LM95235QEIMM  
VSSOP  
VSSOP  
VSSOP  
VSSOP  
VSSOP  
VSSOP  
VSSOP  
VSSOP  
VSSOP  
DGK  
DGK  
DGK  
DGK  
DGK  
DGK  
DGK  
DGK  
DGK  
8
8
8
8
8
8
8
8
8
1000  
3500  
1000  
3500  
1000  
3500  
1000  
1000  
3500  
210.0  
367.0  
210.0  
367.0  
210.0  
367.0  
210.0  
210.0  
367.0  
185.0  
367.0  
185.0  
367.0  
185.0  
367.0  
185.0  
185.0  
367.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
LM95235QEIMM/NOPB  
LM95235QEIMMX/NOPB  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other  
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest  
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and  
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