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LM73C1QDDCRQ1 [TI]

具有两线制接口的 11 至 14 位数字温度传感器 | DDC | 6 | -40 to 125;
LM73C1QDDCRQ1
型号： LM73C1QDDCRQ1
厂家： TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述：

具有两线制接口的 11 至 14 位数字温度传感器 | DDC | 6 | -40 to 125

温度传感 输出元件 传感器 换能器 温度传感器
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中文：  中文翻译
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LM73-Q1  
ZHCSFV1 –DECEMBER 2016  
LM73-Q1 具有双线制接口的 2.7V、SOT-23、11 位至 14 位数字温度传感  
器
1 特性  
3 说明  
1
•
•
适用于汽车电子 应用  
具有符合 AEC-Q100 标准的下列结果  
LM73-Q1 是一款集成有增量式 Δ-Σ ADC 的数字量输  
出温度传感器。LM73-Q1 通过兼容 SMBus 和 I2C 接  
口的双线制接口进行通信，主机可随时查询 LM73-Q1  
从而读取温度。  
–
–
LM73-Q1 温度等级 1：-40°C 至 125°C  
LM73-Q1 超出人体模型 (HBM) 静电放电 (ESD)  
分类等级 2  
LM73-Q1 可在较宽的温度范围（–40°C 至 125°C）下  
运行，温度范围为 -10°C 至 80°C 时精度可达 ±1.45°  
C。LM73-Q1 包括四种可选分辨率选项，可用于调整  
温度转换时间和灵敏度，从而实现最优性能。LM73-  
Q1 默认采用 11 位模式 (0.25°C/LSB)，可在 14ms 的  
最长时间内测量温度，这非常适用于需要在上电后快速  
获取温度数据的 应用 。在分辨率最高的 14 位模式  
(0.03125°C/LSB) 下，LM73-Q1 经过优化，可感测非  
常小的温度变化。  
–
LM73-Q1 带电器件模型 (CDM) ESD 分类等级  
C6  
•
通过一个地址引脚可为每个版本选择三个可选地址  
中的任一地址，共有 6 个可用地址。  
兼容 SMBus 和 I2C 的双线制接口  
•
•
•
支持 400kHz 工作频率  
关断模式具有单次触发功能，可实现极低的平均功  
耗
•
•
•
11 位至 14 位的可编程数字温度分辨率  
快速转换速率适用于快速上电和测量快速充电温度  
可通过单个多级地址线选择三个独特设备地址中的任一  
个地址。开漏 ALERT 输出在温度超过可编程限制时激  
活。数据和时钟线均经过滤波，可实现优异的噪声容差  
和可靠通信。此外，LM73-Q1 具有超时特性，若时钟  
和数据线保持低电平超过一段时间，这种特性会将这些  
线路自动复位。这可在不需要主机处理器干预的情况下  
防止出现总线锁定状态。  
开漏 ALERT 输出引脚在温度超过编程的温度限制  
时激活  
•
•
•
•
•
非常稳定的低噪声数字量输出  
UL 认证器件  
温度精度：±1.45°C（最大值）  
温度范围：-40°C 至 125°C  
转换时间  
器件信息(1)  
–
–
11 位 (0.25°C)：14ms（最大值）  
器件型号  
封装  
封装尺寸（标称值）  
14 位 (0.03125°C)：112ms（最大值）  
LM73-Q1  
SOT (6)  
2.90mm x 1.60mm  
•
•
•
工作电源电流：320µA（典型值）  
关断电源电流：1.9µA（典型值）  
分辨率：0.25°C 至 0.03125°C  
(1) 如需了解所有可用封装，请见数据表末尾的可订购产品附录。  
简化电路原理图  
V
= 2.7V to 5.5V  
DD  
2 应用  
•
•
•
•
•
•
•
汽车空调  
Typical bypass 0.1 mF  
3
高级驾驶员辅助系统 (ADAS)  
空气流量传感器  
信息娱乐处理器管理  
仪表板系统  
1
!ddress (set ꢁs desired for one  
of three ꢁddresses)  
!55w  
ꢀ
Ço hꢁrdꢂꢁre  
shutdoꢂn  
[a73  
![9wÇ  
6
{a.5!Ç  
{a./[Y  
Ço ꢃ from processor  
2-ꢂire interfꢁce  
4
2
UREA 传感器  
HID 灯  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
English Data Sheet: SNIS194  
 
 
 
LM73-Q1  
ZHCSFV1 –DECEMBER 2016  
www.ti.com.cn  
目录  
7.3 Feature Description................................................... 9  
7.4 Device Functional Modes........................................ 15  
7.5 Register Map........................................................... 16  
Application and Implementation ........................ 20  
8.1 Application Information............................................ 20  
8.2 Typical Application ................................................. 20  
Power Supply Recommendations...................... 22  
1
2
3
4
5
6
特性.......................................................................... 1  
应用.......................................................................... 1  
说明.......................................................................... 1  
修订历史记录 ........................................................... 2  
Pin Configuration and Functions......................... 3  
Specifications......................................................... 4  
6.1 Absolute Maximum Ratings ...................................... 4  
6.2 ESD Ratings.............................................................. 4  
6.3 Recommended Operating Conditions....................... 4  
6.4 Thermal Information.................................................. 4  
6.5 Temperature-to-Digital Converter Characteristics..... 5  
8
9
10 Layout................................................................... 22  
10.1 Layout Guidelines ................................................. 22  
10.2 Layout Example .................................................... 22  
11 器件和文档支持 ..................................................... 23  
11.1 相关文档ꢀ ........................................................... 23  
11.2 接收文档更新通知 ................................................. 23  
11.3 社区资源................................................................ 23  
11.4 商标....................................................................... 23  
11.5 静电放电警告......................................................... 23  
11.6 Glossary................................................................ 23  
12 机械、封装和可订购信息....................................... 23  
6.6 Logic Electrical Characteristics- Digital DC  
Characteristics ........................................................... 6  
6.7 SMBus Digital Switching Characteristics .................. 7  
6.8 Typical Characteristics.............................................. 8  
Detailed Description .............................................. 9  
7.1 Overview ................................................................... 9  
7.2 Functional Block Diagram ......................................... 9  
7
4 修订历史记录  
日期  
修订版本  
注释  
2016 年 12 月  
*
最初发布版本。  
2
Copyright © 2016, Texas Instruments Incorporated  
 
LM73-Q1  
www.ti.com.cn  
ZHCSFV1 –DECEMBER 2016  
5 Pin Configuration and Functions  
DDC Package  
6-Pin (SOT-23)  
Top View  
!55w  
Db5  
1
2
3
6
{a.5!Ç  
ꢀ
[a73  
![9wÇ  
V
DD  
4
{a./[Y  
Pin Functions  
PIN  
TYPE  
EQUIVALENT CIRCUIT  
FUNCTION  
NO.  
NAME  
V
DD  
CMOS  
Logic  
Input  
(three  
levels)  
PIN  
D2  
D3  
2.5k  
Address Select Input: One of three device addresses is selected by  
D1  
1
ADDR  
Snap  
Back  
connecting to ground, left floating, or connecting to VDD  
.
GND  
2
3
GND  
VDD  
Ground  
Power  
Ground  
Supply Voltage  
PIN  
D1  
CMOS  
Logic  
Input  
Snap  
Back  
Serial Clock: SMBus clock signal. Operates up to 400 kHz. Low-pass  
filtered.  
4
5
6
SMBCLK  
GND  
V
DD  
Open-  
Drain  
Output  
PIN  
D2  
D3  
125  
Digital output which goes active whenever the measured temperature  
exceeds a programmable temperature limit.  
D1  
ALERT  
Snap  
Back  
GND  
PIN  
Open-  
Drain  
Input/Outp  
ut  
D1  
Snap  
Back  
Serial Data: SMBus bi-directional data signal used to transfer serial  
data synchronous to the SMBCLK. Low-pass filtered.  
SMBDAT  
GND  
Copyright © 2016, Texas Instruments Incorporated  
3
LM73-Q1  
ZHCSFV1 –DECEMBER 2016  
www.ti.com.cn  
6 Specifications  
6.1 Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)(1)(2)  
MIN  
−0.3  
NOM  
MAX  
V to 6  
6
UNIT  
V
Supply Voltage  
Voltage at SMBCLK and SMBDAT pins  
Voltage at All Other Pins  
Input Current at Any Pin(3)  
Storage Temperature, Tstg  
−0.3 V to V  
−0.3  
V
(VDD + 0.5)  
6
V
±5  
mA  
°C  
−65  
150  
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings  
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended  
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) Soldering process must comply with Texas Instruments' Reflow Temperature Profile specifications. Refer to www.ti.com/packaging..  
Reflow temperature profiles are different for lead-free and non-lead-free packages.  
(3) When the input voltage (VI) at any pin exceeds the power supplies (VI < GND or VI > VDD), the current at that pin should be limited to 5  
mA.  
6.2 ESD Ratings  
VALUE  
±2000  
±1000  
UNIT  
Human-body model (HBM), per AEC Q100-002(1)  
Charged-device model (CDM), per AEC Q100-011  
V(ESD)  
Electrostatic discharge  
V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.  
6.3 Recommended Operating Conditions  
over operating free-air temperature range (unless otherwise noted)  
MIN  
–40  
2.7  
MAX  
UNIT  
LM73-Q1  
125  
5.5  
°C  
V
Supply Voltage Range (VDD  
)
6.4 Thermal Information  
LM73-Q1  
THERMAL METRIC(1)  
DDC (SOT)  
UNIT  
6 PINS  
117  
55  
RθJA  
RθJC(top)  
RθJA  
ψJT  
Junction-to-ambient thermal resistance  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
25  
°C/W  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
1
ψJB  
21  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application  
report.  
4
Copyright © 2016, Texas Instruments Incorporated  
 
LM73-Q1  
www.ti.com.cn  
ZHCSFV1 –DECEMBER 2016  
6.5 Temperature-to-Digital Converter Characteristics  
Unless otherwise noted, these specifications apply for VDD = 2.7 V to 5.5 V. All limits TA = TJ = 25°C, unless otherwise noted.  
TA is the ambient temperature. TJ is the junction temperature.  
PARAMETER  
TEST CONDITIONS  
TA = −40°C to -25°C  
MIN  
–1.85  
–1.65  
–1.45  
–1.65  
-1.8  
TYP  
MAX  
1.85  
1.65  
1.45  
1.65  
1.8  
UNIT  
°C  
TA = −25°C to –10°C  
VDD = 3.3V TA = −10°C to 80°C  
TA = 80°C to 115°C  
°C  
°C  
°C  
TA = 115°C to 125°C  
°C  
TA = −40°C to -25°C  
-2.1  
2.1  
°C  
TA = −25°C to –10°C  
–1.75  
-1.65  
-1.8  
1.75  
1.65  
1.8  
°C  
VDD = 2.7V  
to  
VDD = 4.5V  
(1)  
Accuracy  
TA = −10°C to 80°C  
TA = 80°C to 115°C  
TA = 115°C to 125°C  
TA = −40°C to -25°C  
TA = −25°C to -10°C  
TA = −10°C to 80°C  
TA = 80°C to 115°C  
TA = 115°C to 125°C  
°C  
°C  
-2  
2
°C  
-2.4  
2.4  
°C  
-2.2  
2.2  
°C  
VDD > 4.5V  
to  
VDD = 5.5V  
–1.9  
-1.8  
1.9  
°C  
1.8  
°C  
-2  
2
°C  
11  
0.25  
Bits  
°C/LSB  
Bits  
°C/LSB  
Bits  
°C/LSB  
Bits  
°C/LSB  
RES1 Bit = 0, RES0 Bit = 0  
RES1 Bit = 0, RES0 Bit = 1  
RES1 Bit = 1, RES0 Bit = 0  
RES1 Bit = 1, RES0 Bit = 1  
RES1 Bit = 0, RES0 Bit = 0  
RES1 Bit = 0, RES0 Bit = 1  
RES1 Bit = 1, RES0 Bit = 0  
RES1 Bit = 1, RES0 Bit = 1  
12  
0.125  
13  
Resolution  
0.0625  
14  
0.03125  
10.1  
ms  
ms  
ms  
ms  
µA  
µA  
TA = TJ =TMIN to TMAX  
TA = TJ =TMIN to TMAX  
TA = TJ =TMIN to TMAX  
TA = TJ =TMIN to TMAX  
TA = TJ =TMIN to TMAX  
TA = TJ =TMIN to TMAX  
TA = TJ =TMIN to TMAX  
14  
28  
20.2  
40.4  
80.8  
320  
120  
1.9  
Temperature  
Conversion Time  
(2)  
56  
112  
495  
175  
8
Continuous Conversion Mode,  
SMBus inactive  
Quiescent Current  
Shutdown, bus-idle timers on  
Shutdown, bus-idle timers off  
µA  
V
Power-On Reset  
Threshold  
Measured on VDD input, falling edge TA = TJ =TMIN to TMAX  
0.9  
(1) Local temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the  
internal power dissipation of the LM73-Q1 and the thermal resistance.  
(2) This specification is provided only to indicate how often temperature data is updated. The LM73-Q1 can be read at any time without  
regard to conversion state (and will yield last conversion result).  
Copyright © 2016, Texas Instruments Incorporated  
5
 
LM73-Q1  
ZHCSFV1 –DECEMBER 2016  
www.ti.com.cn  
6.6 Logic Electrical Characteristics- Digital DC Characteristics  
Unless otherwise noted, these specifications apply for VDD = 2.7 V to 5.5 V. All limits TA = TJ = 25°C, unless otherwise noted.  
TA is the ambient temperature. TJ is the junction temperature.  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
SMBDAT, SMBCLK INPUTS  
Logical 1 Input  
Voltage  
VIH  
TA = TJ =TMIN to TMAX  
0.7 × VDD  
V
V
Logical 0 Input  
Voltage  
VIL  
TA = TJ =TMIN to TMAX  
0.3 × VDD  
SMBDAT and  
VIN;HYST SMBCLK Digital  
Input Hysteresis  
0.07 × VDD  
0.01  
V
Logical 1 Input  
Current  
IIH  
VIN = VDD  
VIN = 0 V  
µA  
TA = TJ =TMIN to TMAX  
TA = TJ =TMIN to TMAX  
2
–0.01  
5
Logical 0 Input  
Current  
IIL  
µA  
pF  
–2  
CIN  
Input Capacitance  
SMBDAT, ALERT OUTPUTS  
0.01  
High Level Output  
Current  
IOH  
VOH = VDD  
IOL = 3 mA  
µA  
V
TA = TJ =TMIN to TMAX  
TA = TJ =TMIN to TMAX  
2
SMBus Low Level  
VOL  
0.4  
Output Voltage  
ADDRESS INPUT  
VIH;ADD Address Pin High TA = TJ =TMIN to TMAX  
VDD – 0.100  
V
V
Input Voltage  
RESS  
VIL;ADDR Address Pin Low TA = TJ =TMIN to TMAX  
0.100  
Input Voltage  
ESS  
0.01  
IIH;  
ADDRESS  
Address Pin High  
Input Current  
VIN = VDD  
VIN = 0 V  
µA  
µA  
TA = TJ =TMIN to TMAX  
TA = TJ =TMIN to TMAX  
2
–0.01  
IIL;ADDR Address Pin Low  
ESS  
Input Current  
–2  
6
Copyright © 2016, Texas Instruments Incorporated  
 
LM73-Q1  
www.ti.com.cn  
ZHCSFV1 –DECEMBER 2016  
6.7 SMBus Digital Switching Characteristics  
Unless otherwise noted, these specifications apply for VDD = 2.7 V to 5.5 V, CL (load capacitance) on output lines = 400 pF.  
All limits TA = TJ = 25°C, unless otherwise noted. See Figure 1.  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
No minimum clock  
frequency if Time-  
Out feature is  
disabled.  
fSMB SMBus Clock Frequency  
TA = TJ =TMIN to TMAX  
400  
kHz  
tLOW SMBus Clock Low Time  
tHIGH SMBus Clock High Time  
TA = TJ =TMIN to TMAX  
TA = TJ =TMIN to TMAX  
CL = 400 pF  
300  
300  
ns  
ns  
tF;SMB  
O
(1)  
Output Fall Time  
TA = TJ =TMIN to TMAX  
250  
45  
ns  
IPULL-UP ≤ 3 mA  
SMBDAT and SMBCLK Time  
tTIMEO  
Low for Reset of Serial Interface  
TA = TJ =TMIN to TMAX  
15  
ms  
(2)  
UT  
Data In Setup Time to SMBCLK  
High  
tSU;DAT  
TA = TJ =TMIN to TMAX  
TA = TJ =TMIN to TMAX  
TA = TJ =TMIN to TMAX  
100  
0
ns  
ns  
ns  
tHD;DA Data Hold Time: Data In Stable  
after SMBCLK Low  
TI  
tHD;DA Data Hold Time: Data Out Stable  
30  
after SMBCLK Low  
TO  
Start Condition SMBDAT Low to  
SMBCLK Low (Start condition  
hold before the first clock falling  
edge)  
tHD;STA  
TA = TJ =TMIN to TMAX  
60  
50  
ns  
Stop Condition SMBCLK High to  
SMBDAT Low (Stop Condition  
Setup)  
tSU;ST  
O
TA = TJ =TMIN to TMAX  
TA = TJ =TMIN to TMAX  
ns  
ns  
SMBus Repeated Start-Condition  
tSU;STA Setup Time, SMBCLK High to  
SMBDAT Low  
50  
SMBus Free Time Between Stop  
and Start Conditions  
tBUF  
TA = TJ =TMIN to TMAX  
TA = TJ =TMIN to TMAX  
1.2  
µs  
(3)  
tPOR Power-On Reset Time  
1
ms  
(1) The output fall time is measured from (VIH;MIN + 0.15V) to (VIL;MAX - 0.15V).  
(2) Holding the SMBDAT and/or SMBCLK lines Low for a time interval greater than tTIMEOUT will reset the LM73-Q1's SMBus state machine,  
setting SMBDAT and SMBCLK pins to a high impedance state.  
(3) Represents the time from VDD reaching the power-on-reset level to the LM73-Q1 communications being functional. After an additional  
time equal to one temperature conversion time, valid temperature is available in the Temperature Data Register .  
tLOW  
tR  
tF  
VIH  
VIL  
{a./[Y  
{a.5!Ç  
tHD;STA  
tHD;DAT  
tSU;STA  
tHIGH  
tSU;STO  
tBUF  
tSU;DAT  
VIH  
VI  
t
L
{
{
t
Figure 1. SMBus Communication  
Copyright © 2016, Texas Instruments Incorporated  
7
 
LM73-Q1  
ZHCSFV1 –DECEMBER 2016  
www.ti.com.cn  
6.8 Typical Characteristics  
Figure 2. Operating Current vs. Temperature  
Figure 3. Shutdown Current vs.Temperature  
Figure 4. Typical Output Noise  
8
Copyright © 2016, Texas Instruments Incorporated  
LM73-Q1  
www.ti.com.cn  
ZHCSFV1 –DECEMBER 2016  
7 Detailed Description  
7.1 Overview  
The LM73-Q1 is a digital temperature sensor that senses the temperature of its die using a sigma-delta analog-  
to-digital converter and stores the temperature in the Temperature Register. The LM73-Q1's 2-wire serial  
interface is compatible with SMBus 2.0 and I2C. Please see the SMBus 2.0 specification for a detailed  
description of the differences between the I2C bus and SMBus.  
The temperature resolution is programmable, allowing the host system to select the optimal configuration  
between sensitivity and conversion time. The LM73-Q1 can be placed in shutdown to minimize power  
consumption when temperature data is not required. While in shutdown, a 1-shot conversion mode allows  
system control of the conversion rate for ultimate flexibility.  
7.2 Functional Block Diagram  
2ꢂ7ë to ꢃꢂꢃë  
V
DD  
Çemperꢀture  
{ensor  
11-.it to 14-.it  
5eltꢀ-{igmꢀ  
/ircuitry  
!ꢅ5 /onverter  
[a73  
aꢀnufꢀcturer's  
L5 wegister  
/ontrolꢅ{tꢀtus  
wegister  
/onfigurꢀtion  
wegister  
ꢄointer  
wegister  
ꢀnd  
Çemperꢀture  
wegister  
5ecode [ogic  
THIGH Register  
TLOW Register  
{et-ꢄoint  
/ompꢀrꢀtor  
![9wÇ  
{a.5!Ç  
{a./[Y  
Çꢁo-íire  
{eriꢀl Lnterfꢀce  
!55w  
Db5  
7.3 Feature Description  
The LM73-Q1 features the following registers. See LM73-Q1 Registers for a complete list of the pointer address,  
content, and reset state of each register.  
•
Pointer Register  
Copyright © 2016, Texas Instruments Incorporated  
9
LM73-Q1  
ZHCSFV1 –DECEMBER 2016  
www.ti.com.cn  
Feature Description (continued)  
•
•
•
•
•
•
Temperature Register  
Configuration Register  
THIGH Register  
TLOW Register  
Control/Status Register  
Identification Register  
7.3.1 Power-On Reset  
The power-on reset (POR) state is the point at which the supply voltage rises above the power-on reset  
threshold (specified in the Electrical Characteristics), generating an internal reset. Each of the registers contains  
a defined value upon POR and this data remains there until any of the following occurs:  
•
The first temperature conversion is completed, causing the Temperature Register and various status bits to  
be updated internally, depending on the value of the measured temperature.  
•
•
The master writes different data to any Read/Write (R/W) bits, or  
The LM73-Q1 is powered down.  
7.3.2 One-Shot Conversion  
The LM73-Q1 features a one-shot conversion bit, which is used to initiate a single conversion and comparison  
cycle when the LM73-Q1 is in shutdown mode. While the LM73-Q1 is in shutdown mode, writing a 1 to the One-  
Shot bit in the Configuration Register will cause the LM73-Q1 to perform a single temperature conversion and  
update the Temperature Register and the affected status bits. Operating the LM73-Q1 in this one-shot mode  
allows for extremely low average-power consumption, making it ideal for low-power applications.  
When the One-Shot bit is set, the LM73-Q1 initiates a temperature conversion. After this initiation, but before the  
completion of the conversion and resultant register updates, the LM73-Q1 is in a "one-shot" state. During this  
state, the Data Available (DAV) flag in the Control/Status register is 0 and the Temperature Register contains the  
value 8000h (-256°C). All other registers contain the data that was present before initiating the one-shot  
conversion. After the temperature measurement is complete, the DAV flag will be set to 1 and the temperature  
register will contain the resultant measured temperature.  
7.3.3 Temperature Data Format  
The resolution of the temperature data and the size of the data word are user-selectable through bits RES1 and  
RES0 in the Control/Status Register. By default, the LM73-Q1 temperature stores the measured temperature in  
an 11-bit (10 bits plus sign) word with one least significant bit (LSB) equal to 0.25°C. The maximum word size is  
14 bits (13-bits plus sign) with a resolution of 0.03125 °C/LSB.  
CONTROL BIT  
DATA FORMAT  
RES1  
RES0  
WORD SIZE  
11 bits  
RESOLUTION  
0.25 °C/LSB  
0
0
1
1
0
1
0
1
12 bits  
0.125 °C/LSB  
0.0625 °C/LSB  
0.03125 °C/LSB  
13 bits  
14 bits  
The temperature data is reported in 2's complement format. The word is stored in the 16-bit Temperature  
Register and is left justified in this register. Unused temperature-data bits are always reported as 0.  
Table 1. 11-Bit (10-Bit Plus Sign)  
DIGITAL OUTPUT  
TEMPERATURE  
BINARY  
HEX  
150°C  
25°C  
0100 1011 0000 0000  
0000 1100 1000 0000  
0000 0000 1000 0000  
0000 0000 0010 0000  
4B00h  
0C80h  
0080h  
0020h  
1°C  
0.25°C  
10  
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Table 1. 11-Bit (10-Bit Plus Sign) (continued)  
DIGITAL OUTPUT  
TEMPERATURE  
BINARY  
HEX  
0°C  
−0.25°C  
−1°C  
0000 0000 0000 0000  
1111 1111 1110 0000  
1111 1111 1000 0000  
1111 0011 1000 0000  
1110 1100 0000 0000  
0000h  
FFE0h  
FF80h  
F380h  
EC00h  
−25°C  
−40°C  
Table 2. 12-Bit (11-Bit Plus Sign)  
DIGITAL OUTPUT  
TEMPERATURE  
BINARY  
HEX  
150°C  
25°C  
0100 1011 0000 0000  
0000 1100 1000 0000  
0000 0000 1000 0000  
0000 0000 0001 0000  
0000 0000 0000 0000  
1111 1111 1111 0000  
1111 1111 1000 0000  
1111 0011 1000 0000  
1110 1100 0000 0000  
4B00h  
0C80h  
0080h  
0010h  
0000h  
FFF0h  
FF80h  
F380h  
EC00h  
1°C  
0.125°C  
0°C  
−0.125°C  
−1°C  
−25°C  
−40°C  
Table 3. 13-Bit (12-Bit Plus Sign)  
DIGITAL OUTPUT  
TEMPERATURE  
BINARY  
HEX  
150°C  
25°C  
0100 1011 0000 0000  
0000 1100 1000 0000  
0000 0000 1000 0000  
0000 0000 0000 1000  
0000 0000 0000 0000  
1111 1111 1111 1000  
1111 1111 1000 0000  
1111 0011 1000 0000  
1110 1100 0000 0000  
4B00h  
0C80h  
0080h  
0008h  
0000h  
FFF8h  
FF80h  
F380h  
EC00h  
1°C  
0.0625°C  
0°C  
−0.0625°C  
−1°C  
−25°C  
−40°C  
Table 4. 14-Bit (13-Bit Plus Sign)  
DIGITAL OUTPUT  
TEMPERATURE  
BINARY  
HEX  
150°C  
25°C  
0100 1011 0000 0000  
0000 1100 1000 0000  
0000 0000 1000 0000  
0000 0000 0000 0100  
0000 0000 0000 0000  
1111 1111 1111 1100  
1111 1111 1000 0000  
1111 0011 1000 0000  
1110 1100 0000 0000  
4B00h  
0C80h  
0080h  
0004h  
0000h  
FFFCh  
FF80h  
F380h  
EC00h  
1°C  
0.03125°C  
0°C  
−0.03125°C  
−1°C  
−25°C  
−40°C  
Copyright © 2016, Texas Instruments Incorporated  
11  
LM73-Q1  
ZHCSFV1 –DECEMBER 2016  
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7.3.4 SMBus Interface  
The LM73-Q1 operates as a slave on the SMBus. The SMBDAT line is bidirectional. The SMBCLK line is an  
input only. The LM73-Q1 never drives the SMBCLK line and it does not support clock stretching.  
The LM73-Q1 uses a 7-bit slave address. It is available in two versions. Each version can be configured for one  
of three unique slave addresses, for a total of six unique address.  
PART  
NUMBER  
ADDRESS  
PIN  
DEVICE  
ADDRESS  
Float  
Ground  
VDD  
1001 000  
1001 001  
1001 010  
LM73C0-  
Q1  
Float  
Ground  
VDD  
1001 100  
1001 101  
1001 110  
LM73C1-  
Q1  
The SMBDAT output is an open-drain output and does not have internal pull-ups. A “high” level will not be  
observed on this pin until pull-up current is provided by some external source, typically a pull-up resistor. Choice  
of resistor value depends on many system factors but, in general, the pull-up resistor should be as large as  
possible without effecting the SMBus desired data rate. This will minimize any internal temperature reading  
errors due to internal heating of the LM73-Q1.  
The LM73-Q1 features an integrated low-pass filter on both the SMBCLK and the SMBDAT line. These filters  
increase communications reliability in noisy environments.  
If either the SMBCLK or SMBDAT line is held low for a time greater than tTIMEOUT (see Logic Electrical  
Characteristics for the value of tTIMEOUT), the LM73-Q1 state machine will reset to the SMBus idle state, releasing  
the data line. Once the SMBDAT is released high, the master may initiate an SMBus start.  
7.3.5 ALERT Function  
The ALERT output is an over-temperature indicator. At the end of every temperature conversion, the measured  
temperature is compared to the value in the THIGH Register. If the measured temperature exceeds the value  
stored in THIGH, the ALERT output goes active (see Figure 5). This over-temperature condition will also cause the  
ALRT_STAT bit in the Control/Status Register to change value (this bit mirrors the logic level of the ALERT pin).  
The ALERT pin and the ALRT_STAT bit are cleared when any of the following occur:  
•
•
•
The measured temperature falls below the value stored in the TLOW Register  
A 1 is written to the ALERT Reset bit in the Configuration Register  
The master resets it through an SMBus Alert Response Address (ARA) procedure  
If ALERT has been cleared by the master writing a 1 to the ALERT Reset bit, while the measured temperature  
still exceeds the THIGH setpoint, ALERT will go active again after the completion of the next temperature  
conversion.  
Each temperature reading is associated with a Temperature High (THI) and a Temperature Low (TLOW) flag in  
the Control/Status Register. A digital comparison determines whether that reading is above the THIGH setpoint or  
below the TLOW setpoint. If so, the corresponding flag is set. All digital comparisons to the THIGH, and TLOW values  
are based on an 11-bit temperature comparison. Regardless of the resolution setting of the LM73-Q1, the lower  
three temperature LSBs will not affect the state of the ALERT output, THI flag, and TLOW flag.  
12  
Copyright © 2016, Texas Instruments Incorporated  
LM73-Q1  
www.ti.com.cn  
ZHCSFV1 –DECEMBER 2016  
Measured Temperature  
T
Limit  
Limit  
HIGH  
T
LOW  
pin  
ALERT  
TIME  
Figure 5. ALERT Temperature Response Cleared When Temperature Crosses TLOW  
Reset Bit set to —1“  
ALERT  
Measured Temperature  
T
T
Limit  
Limit  
HIGH  
LOW  
ALERT  
(Active Low)  
One  
Conversion Time  
TIME  
Figure 6. ALERT Temperature Response Cleared by Writing a 1 to the ALERT Reset Bit.  
7.3.6 Communicating With the LM73-Q1  
The data registers in the LM73-Q1 are selected by the Pointer Register. At power-up the Pointer Register is set  
to 00h, the location for the Temperature Register. The Pointer Register latches the last location it was set to.  
Note that all Pointer Register bits are decoded; any incorrect pointer values will not be acknowledged and will not  
be stored in the Pointer Register.  
NOTE  
A write to an invalid pointer address is not allowed. If the master writes an invalid address  
to the Pointer Register, the LM73-Q1 will not acknowledge the address and the Pointer  
Register will continue to contain the last value stored in it.  
A Write to the LM73-Q1 will always include the address byte and the pointer byte.  
A Read from the LM73-Q1 can occur in either of the following ways:  
•
If the location latched in the Pointer Register is correct (that is, the Pointer Register is pre-set prior to the  
read), then the read can simply consist of an address byte, followed by retrieving the data byte. Most of the  
time it is expected that the Pointer Register will point to Temperature Registers because that will be the data  
most frequently read from the LM73-Q1.  
•
If the Pointer Register needs to be set, then an address byte, pointer byte, repeat start, and another address  
byte will accomplish a read.  
The data byte is read out of the LM73-Q1 by the most significant bit first. At the end of a read, the LM73-Q1 can  
accept either an Acknowledge or No Acknowledge bit from the Master. No Acknowledge is typically used as a  
signal to the slave that the Master has read its last byte.  
Copyright © 2016, Texas Instruments Incorporated  
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LM73-Q1  
ZHCSFV1 –DECEMBER 2016  
www.ti.com.cn  
7.3.6.1 Reading from the LM73-Q1  
1
9
1
9
1
9
{a./[Y  
{a.5!Ç  
wꢃí  
1
0
0
1
!2 !1 !0  
51ꢀ 514 513 512 511 510 59 58  
57 56 5ꢀ 54 53 52 51 50  
!ck  
by  
[a73  
!ck  
by  
aꢁster  
ꢂo!ck {top  
by by  
aꢁster aꢁster  
{tꢁrt by  
aꢁster  
Crame 1  
{erial .us !ddress .yte  
Crame 2  
5ata .yte from [ꢀ73  
Crame 3  
5ata .yte from [ꢀ73  
Figure 7. Typical Read from a 2-Byte Register with Preset Pointer  
1
1
9
1
9
{a./[Y  
{a.5!Ç  
wꢃí  
0
0
1
!2 !1 !0  
0
0
0
0
0
ꢄ2 ꢄ1 ꢄ0  
!ck  
by  
!ck  
by  
{tꢁrt by  
aꢁster  
[a73  
[a73  
Crame 1  
{erial .us !ddress .yte  
Crame 2  
ꢂointer .yte  
1
1
9
1
9
1
9
{a./[Y  
(continued)  
{a.5!Ç  
(continued)  
wꢃí  
0
0
1
!2 !1 !0  
51ꢀ 514 513 512 511 510 59 58  
57 56 5ꢀ 54 53 52 51 50  
wepeꢁt  
{tꢁrt by  
aꢁster  
!ck  
by  
[a73  
!ck  
by  
aꢁster  
ꢂo!ck {top  
by  
aꢁster aꢁster  
by  
Crame 3  
{erial .us !ddress .yte  
Crame 4  
5ata .yte from [ꢀ73  
Crame ꢁ  
5ata .yte from [ꢀ73  
Figure 8. Typical Pointer Set Followed by Immediate Read of a 2-Byte Register  
1
1
9
1
9
SMBCLK  
SMBDAT  
R/W  
0
0
1
A2 A1 A0  
D7 D6 D5 D4 D3 D2 D1 D0  
Ack  
by  
LM73  
NoAck Stop  
Start by  
Master  
by  
by  
Master Master  
Frame 1  
Serial Bus Address Byte  
Frame 2  
Data Byte from LM73  
Figure 9. Typical Read from a 1-Byte Register with Preset Pointer  
14  
Copyright © 2016, Texas Instruments Incorporated  
LM73-Q1  
www.ti.com.cn  
ZHCSFV1 –DECEMBER 2016  
1
1
9
1
0
9
{a./[Y  
{a.5!Ç  
wꢃí  
0
0
1
!2 !1 !0  
0
0
0
0
ꢄ2 ꢄ1 ꢄ0  
!ck  
by  
[a73  
!ck  
by  
[a73  
{tꢁrt by  
aꢁster  
Crame 1  
{erial .us !ddress .yte  
Crame 2  
ꢁointer .yte  
1
1
9
1
9
{a./[Y  
(continued)  
{a.5!Ç  
(continued)  
wꢃí  
0
0
1
!2 !1 !0  
57 56 5ꢀ 54 53 52 51 50  
!ck  
by  
[a73  
ꢂo!ck {top  
by  
aꢁster aꢁster  
wepeꢁt  
{tꢁrt by  
aꢁster  
by  
Crame 3  
Crame 4  
{erial .us !ddress .yte  
5ata .yte from [ꢀ73  
Figure 10. Typical Pointer Set Followed by Immediate Read of a 1-Byte Register  
7.3.6.2 Writing to the LM73-Q1  
1
9
1
9
1
9
{a./[Y  
{a.5!Ç  
wꢁí  
1
0
0
1
!2 !1 !0  
0
0
0
0
0
ꢂ2 ꢂ1 ꢂ0  
57 56 5ꢃ 54 53 52 51 50  
{tꢀrt by  
aꢀster  
!ck  
by  
!ck  
by  
!ck  
by  
{top  
by  
[a73  
[a73  
[a73 aꢀster  
Crame 1  
Crame 2  
Crame 3  
{erial .us !ddress .yte  
ꢀointer .yte  
5ata .yte to [ꢁ73  
Figure 11. Typical 1-Byte Write  
1
9
1
9
{a./[Y  
{a.5!Ç  
wꢂí  
1
0
0
1
!2 !1 !0  
0
0
0
0
0
ꢃ2 ꢃ1 ꢃ0  
!ck  
by  
!ck  
by  
{tꢁrt by  
aꢁster  
[a73  
[a73  
Crame 1  
{erial .us !ddress .yte  
Crame 2  
ꢁointer .yte  
1
9
1
9
{a./[Y  
(continued)  
{a.5!Ç  
(continued)  
51ꢀ 514 513 512 511 510 59 58  
57 56 5ꢀ 54 53 52 51 50  
!ck  
by  
!ck  
by  
{top  
by  
[a73  
[a73 aꢁster  
Crame 3  
5ata .yte to [ꢀ73  
Crame 4  
5ata .yte to [ꢀ73  
Figure 12. Typical 2-Byte Write  
7.4 Device Functional Modes  
7.4.1 Shutdown Mode  
Shutdown Mode is enabled by writing a “1” to the Full Power Down Bit, Bit 7 of the Configuration Register, and  
holding it high for at least the specified maximum conversion time at the existing temperature resolution setting.  
(see Temperature Conversion Time specifications under the Temperature-to-Digital Converter Characteristics).  
For example, if the LM73-Q1 is set for 12-bit resolution before shutdown, then Bit 7 of the Configuration register  
must go high and stay high for the specified maximum conversion time for 12-bits resolution.  
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15  
LM73-Q1  
ZHCSFV1 –DECEMBER 2016  
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Device Functional Modes (continued)  
The LM73-Q1 will always finish a temperature conversion and update the temperature registers before shutting  
down.  
Writing a “0” to the Full Power Down Bit restores the LM73-Q1 to normal mode. The user should wait at least the  
specified maximum conversion time, at the existing resolution setting, before accurate data appears in the  
temperature register.  
7.5 Register Map  
7.5.1 LM73-Q1 Registers  
The LM73-Q1's internal registers are selected by the Pointer register. The Pointer register latches the last  
location that it was set to. The pointer register and all internal registers are described below. All registers reset at  
device power up.  
7.5.1.1 Pointer Register  
The diagram below shows the Pointer Register, the six internal registers to which it points, and their associated  
pointer addresses.  
SMBDAT  
Interface  
SMBCLK  
Address  
Data  
Pointer Register  
(selects register  
for communication)  
Temperature  
(Read-Only)  
Pointer = 00000000  
Configuration  
(Read-Write)  
Pointer = 00000001  
THIGH  
(Read-Write)  
Pointer = 00000010  
TLOW  
(Read-Write)  
Pointer = 00000011  
Control/Status  
(Read-Write)  
Pointer = 00000100  
Identification  
(Read-Only)  
Pointer = 00000111  
P7  
P6  
P5  
P4  
P3  
P2  
P1  
Register Select  
P0  
0
0
0
0
0
16  
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ZHCSFV1 –DECEMBER 2016  
Bits  
7:3  
Name  
Description  
Not Used  
Register Select  
Must write zeros only.  
2:0  
Pointer address. Points to desired register.  
See table below.  
P2  
P1  
0
P0  
REGISTER(1)  
Temperature  
Configuration  
THIGH  
0
0
0
0
1
1
0
1
0
1
0
1
0
1
1
TLOW  
0
Control / Status  
Identification  
1
(1) A write to an invalid pointer address is not allowed. If the master  
writes an invalid address to the Pointer Register,  
(a) the LM73-Q1 will not acknowledge the address and  
(b) the Pointer Register will continue to contain the last value stored  
in it.  
7.5.1.2 Temperature Data Register  
Pointer Address 00h (Read Only)  
Reset State: 7FFCh (+255.96875°C)  
One-Shot State: 8000h (-256°C)  
D15  
D14  
D13  
D12  
D11  
D10  
D9  
D8  
SIGN  
128°C  
64°C  
32°C  
16°C  
8°C  
4°C  
2°C  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
1°C  
0.5°C  
0.25°C  
0.125°C  
0.0625°C  
0.03125°C  
reserved  
reserved  
Bits  
Name  
Description  
15:2  
Temperature Data  
Represents the temperature that was measured by the most recent temperature conversion. On  
Power-up, this data is invalid until the Data Available (DAV) bit in the Control/Status register is high  
(after the completion of the first temperature conversion). The resolution is user-programable from 11-  
bit resolution (0.25°C/LSB) through 14-bit resolution (0.03125°C/LSB). The desired resolution is  
programmed with bits 5 and 6 of the Control/Status register.  
1:0  
Not Used  
Return zeros upon read.  
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7.5.1.3 Configuration Register  
Pointer Address 01h (R/W)  
Reset State: 40h  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
PD  
reserved  
ALRT EN  
ALRT POL  
ALRT RST  
ONE SHOT  
reserved  
Bits  
Name  
Description  
7
Full Power Down  
Writing a 1 to this bit and holding it high for at least the specified maximum conversion time, at the existing  
temperature resolution setting, puts the LM73-Q1 in shutdown mode for power conservation.  
Writing a 0 to this bit restores the LM73-Q1 to normal mode. Waiting one specified maximum conversion  
time for the existing resolution setting assures accurate data in the temperature register.  
6
5
reserved  
User must write only a 1 to this bit  
ALERT Enable  
A 0 in this location enables the ALERT output. A 1 disables it. This bit also controls the ALERT Status bit  
(the Control/Status Register, Bit 3) since that bit reflects the state of the Alert pin.  
4
3
2
ALERT Polarity  
ALERT Reset  
One Shot  
When set to 1, the ALERT pin and ALERT Status bit are active-high. When 0, it is active-low.  
Writing a 1 to this bit resets the ALERT pin and the ALERT Status bit. It will always be 0 when read.  
When in shutdown mode (Bit 7 is 1), initiates a single temperature conversion and update of the temperature  
register with new temperature data. Has no effect when in continuous conversion mode (i.e., when Bit 7 is  
0). Always returns a 0 when read.  
1:0  
Reserved  
User must write only a 0 to these bits.  
7.5.1.4 THIGH Upper-Limit Register  
Pointer Address 02h (R/W)  
Reset State: 7FE0h (+255.75°C)  
D15  
D14  
D13  
D12  
D11  
D10  
D9  
D8  
SIGN  
128°C  
64°C  
32°C  
16°C  
8°C  
4°C  
2°C  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
1°C  
0.5°C  
0.25°C  
reserved  
Bits  
Name  
Description  
15:5  
Upper-Limit  
Temperature  
If the measured temperature that is stored in this register exceeds this user-programmable upper  
temperature limit, the ALERT pin will go active and the THIGH flag in the Control/Status register will be  
set to 1. Two's complement format.  
4:0  
Reserved  
Returns zeros upon read. Recommend writing zeros only in these bits.  
7.5.1.5 TLOW Lower-Limit Register  
Pointer Address 03h (R/W)  
Reset State: 8000h (–256°C)  
D15  
D14  
D13  
D12  
D11  
D10  
D9  
D8  
SIGN  
128°C  
64°C  
32°C  
16°C  
8°C  
4°C  
2°C  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
1°C  
0.5°C  
0.25°C  
reserved  
Bits  
Name  
Description  
15:5  
Lower-Limit  
If the measured temperature that is stored in the temperature register falls below this user-  
Temperature  
programmable lower temperature limit, the ALERT pin will be deactivated and the TLOW flag in the  
Control/Status register will be set to 1. Two's complement format.  
4:0  
Reserved  
Returns zeros upon read. Recommend writing zeros only in these bits.  
18  
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7.5.1.6 Control/Status Register  
Pointer Address 04h (R/W)  
Reset State: 08h  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
TLOW  
D0  
TO_DIS  
RES1  
RES0  
reserved  
ALRT_STAT  
THI  
DAV  
BITS NAME  
DESCRIPTION  
7
Time-Out Disable  
Disable the time-out feature on the SMBDAT and SMBCLK lines if set to 1. Setting this bit turns off the  
bus-idle timers, enabling the LM73-Q1 to operate at lowest shutdown current.  
6:5  
Temperature  
Resolution  
Selects one of four user-programmable temperature data resolutions  
00: 0.25°C/LSB, 11-bit word (10 bits plus Sign)  
01: 0.125°C/LSB, 12-bit word (11 bits plus Sign)  
10: 0.0625°C/LSB, 13-bit word (12 bits plus Sign)  
11: 0.03125°C/LSB, 14-bit word (13 bits plus Sign)  
4
3
reserved  
Always returns zero when read. Recommend customer write zero only.  
ALERT Pin Status  
Value is 0 when ALERT output pin is low. Value is 1 when ALERT output pin is high. The ALERT output  
pin is reset under any of the following conditions: (1) Cleared by writing a 1 to the ALERT Reset bit in the  
configuration register, (2) Measured temperature falls below the TLOW limit, or (3) cleared via the ARA  
sequence. Recommend customer write zero only.  
2
1
0
Temperature High Flag Bit is set to 1 when the measured temperature exceeds the THIGH limit stored in the programmable THIGH  
register. Flag is reset to 0 when both of the following conditions are met: (1) measured temperature no  
longer exceeds the programmed THIGH limit and (2) upon reading the Control/Status register. If the  
temperature is not longer above the THIGH limit, this status bit remains set until it is read by the master so  
that the system can check the history of what caused the ALERT output to go active. This bit is not  
cleared after every read if the measured temperature is still above the THIGH limit.  
Temperature Low Flag Bit is set to 1 when the measured temperature falls below the TLOW limit stored in the programmable  
TLOW register. Flag is reset to 0 when both of the following conditions are met: (1) measured temperature  
is no longer below the programmed TLOW limit and (2) upon reading the Control/Status register. If the  
temperature is no longer below the TLOW limit, the status bit remains set until it is read by the master so  
that the system can check the history of what cause the ALERT output to go active. This bit is not cleared  
after every read if temperature is still below TLOW limit.  
Data Available Flag  
This bit is 0 when the LM73-Q1 is in the process of converting a new temperature. It is 1 when the  
conversion is done. After initiating a temperature conversion while operating in the one-shot mode, this  
status bit can be monitored to indicate when the conversion is done. After triggering the one-shot  
conversion, the data in the temperature register is invalid until this bit is high (that is, after completion of  
the conversion). On power-up, the LM73-Q1 is in continuous conversion mode; while in continuous  
conversion mode (the default mode after power-on reset) this bit will always be high. Recommend  
customer write zero only.  
7.5.1.7 Identification Register  
Pointer Address 07h (Read Only)  
Reset State: 0190h  
D15  
D14  
D13  
D12  
D11  
D10  
D9  
D8  
0
0
0
0
0
0
0
1
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
1
0
0
1
0
0
0
0
BITS  
NAME  
DESCRIPTION  
15:8  
Manufacturer  
Identification Byte  
Always returns 01h to uniquely identify the manufacturer as Texas Instruments.  
Always returns 9h to uniquely identify this part as the LM73-Q1 Temperature Sensor.  
Always returns 0h to uniquely identify the revision as level zero.  
7:4  
3:0  
Product Identification  
Nibble  
Die Revision Step  
Nibble  
Copyright © 2016, Texas Instruments Incorporated  
19  
LM73-Q1  
ZHCSFV1 –DECEMBER 2016  
www.ti.com.cn  
8 Application and Implementation  
NOTE  
Information in the following applications sections is not part of the TI component  
specification, and TI does not warrant its accuracy or completeness. TI’s customers are  
responsible for determining suitability of components for their purposes. Customers should  
validate and test their design implementation to confirm system functionality.  
8.1 Application Information  
8.1.1 Thermal Path Considerations  
To get the expected results when measuring temperature with an integrated circuit temperature sensor like the  
LM73-Q1, it is important to understand that the sensor measures its own die temperature. For the LM73-Q1, the  
best thermal path between the die and the outside world is through the LM73-Q1's pins. In the SOT23 package,  
all the pins on the LM73-Q1 will have an equal effect on the die temperature. Because the pins represent a good  
thermal path to the LM73-Q1 die, the LM73-Q1 will provide an accurate measurement of the temperature of the  
printed circuit board on which it is mounted. There is a less efficient thermal path between the plastic package  
and the LM73-Q1 die. If the ambient air temperature is significantly different from the printed circuit board  
temperature, it will have a small effect on the measured temperature.  
8.1.2 Output Considerations: Tight Accuracy, Resolution and Low Noise  
The LM73-Q1 is well suited for applications that require tight temperature measurement accuracy. In many  
applications, the low temperature error can mean better system performance and, by eliminating a system  
calibration step, lower production cost.  
With digital resolution as fine as 0.03125 °C/LSB, the LM73-Q1 senses and reports very small changes in its  
temperature, making it ideal for applications where temperature sensitivity is important. For example, the LM73-  
Q1 enables the system to quickly identify the direction of temperature change, allowing the processor to take  
compensating action before the system reaches a critical temperature.  
The LM73-Q1 has very low output noise, typically 0.015°C rms, which makes it ideal for applications where  
stable thermal compensation is a priority. For example, in a temperature-compensated oscillator application, the  
very small deviation in successive temperature readings translates to a stable frequency output from the  
oscillator.  
8.2 Typical Application  
V
= 2.7V to 5.5V  
DD  
Typical bypass 0.1 mF  
3
1
!ddress (set ꢁs desired for one  
of three ꢁddresses)  
!55w  
ꢀ
Ço hꢁrdꢂꢁre  
shutdoꢂn  
[a73  
![9wÇ  
6
{a.5!Ç  
{a./[Y  
Ço ꢃ from processor  
2-ꢂire interfꢁce  
4
2
Figure 13. Digital Temperature Sensing  
8.2.1 Design Requirements  
The LM73-Q1 requires positive supply voltage of 2.7 V to 5.5 V to be applied between +VDD and GND. For best  
results, bypass capacitors of 100 nF and 10 μF are recommended.  
20  
Copyright © 2016, Texas Instruments Incorporated  
LM73-Q1  
www.ti.com.cn  
ZHCSFV1 –DECEMBER 2016  
Typical Application (continued)  
8.2.2 Detailed Design Procedure  
The temperature resolution is programmable, allowing the host system to select the optimal configuration  
between sensitivity and conversion time. The LM73-Q1 can be placed in shutdown to minimize power  
consumption when temperature data is not required. While in shutdown, a 1-shot conversion mode allows  
system control of the conversion rate for ultimate flexibility.  
8.2.3 Application Curve  
Figure 14. Typical Performance  
Copyright © 2016, Texas Instruments Incorporated  
21  
LM73-Q1  
ZHCSFV1 –DECEMBER 2016  
www.ti.com.cn  
9 Power Supply Recommendations  
In systems where there is a large amount of capacitance on the VDD node, the LM73-Q1 power supply ramp-up  
time can become excessively long. Slow power-supply ramp times may result in abnormal temperature readings.  
A linear power-on-ramp of less than 0.7 V/msec and an exponential ramp with an RC time constant of more than  
1.25 msec is categorized as a slow power-supply ramp. To avoid errors, use the power up sequence described  
below.  
The software reset sequence is as follows:  
1. Allow VDD to reach the specified minimum operating voltage, as specified in the Recommended Operating  
Conditions section.  
2. Write a 1 to the Full Power Down bit, Bit 7 of the Configuration Register, and hold it high for the specified  
maximum conversion time for the initial default of 11-bits resolution. This ensures that a complete reset  
operation has occurred. See the Temperature Conversion Time specifications within the Temperature-to-  
Digital Converter Characteristics for more details.  
3. Write a 0 to the Full Power Down bit to restore the LM73-Q1 to normal mode.  
10 Layout  
10.1 Layout Guidelines  
To achieve the expected results when measuring temperature with an integrated circuit temperature sensor like  
the LM73-Q1, it is important to understand that the sensor measures its own die temperature. For the LM73-Q1,  
the best thermal path between the die and the outside world is through the LM73-Q1's pins. In the SOT-23  
package, all the pins on the LM73-Q1 will have an equal effect on the die temperature. Because the pins  
represent a good thermal path to the LM73-Q1 die, the LM73-Q1 will provide an accurate measurement of the  
temperature of the printed circuit board on which it is mounted.  
10.2 Layout Example  
R1  
V
DD  
SMBDAT  
GND  
LM73  
C1  
R2  
SMBCLK  
Figure 15. PBC Layout  
V
DD  
22  
版权 © 2016, Texas Instruments Incorporated  
LM73-Q1  
www.ti.com.cn  
ZHCSFV1 –DECEMBER 2016  
11 器件和文档支持  
11.1 相关文档ꢀ  
相关文档如下：  
半导体和集成电路 (IC) 封装热度量  
11.2 接收文档更新通知  
如需接收文档更新通知，请访问 www.ti.com.cn 网站上的器件产品文件夹。点击右上角的提醒我 (Alert me) 注册  
后，即可每周定期收到已更改的产品信息。有关更改的详细信息，请查阅已修订文档中包含的修订历史记录。  
11.3 社区资源  
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective  
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of  
Use.  
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration  
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help  
solve problems with fellow engineers.  
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and  
contact information for technical support.  
11.4 商标  
E2E is a trademark of Texas Instruments.  
All other trademarks are the property of their respective owners.  
11.5 静电放电警告  
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损  
伤。  
11.6 Glossary  
SLYZ022 — TI Glossary.  
This glossary lists and explains terms, acronyms, and definitions.  
12 机械、封装和可订购信息  
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对  
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本，请查阅左侧的导航栏。  
版权 © 2016, Texas Instruments Incorporated  
23  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
LM73C0QDDCRQ1  
LM73C1QDDCRQ1  
ACTIVE SOT-23-THIN  
ACTIVE SOT-23-THIN  
DDC  
DDC  
6
6
3000 RoHS & Green  
3000 RoHS & Green  
NIPDAUAG  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 125  
-40 to 125  
730Q  
731Q  
NIPDAUAG  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
Addendum-Page 2  
PACKAGE OUTLINE  
DDC0006A  
SOT-23 - 1.1 max height  
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR  
3.05  
2.55  
1.1  
0.7  
1.75  
1.45  
0.1 C  
B
A
PIN 1  
INDEX AREA  
1
6
4X 0.95  
1.9  
3.05  
2.75  
4
3
0.5  
0.3  
0.1  
6X  
TYP  
0.0  
0.2  
C A B  
C
0 -8 TYP  
0.25  
GAGE PLANE  
SEATING PLANE  
0.20  
0.12  
TYP  
0.6  
0.3  
TYP  
4214841/C 04/2022  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. Reference JEDEC MO-193.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
DDC0006A  
SOT-23 - 1.1 max height  
SMALL OUTLINE TRANSISTOR  
SYMM  
6X (1.1)  
1
6
6X (0.6)  
SYMM  
4X (0.95)  
4
3
(R0.05) TYP  
(2.7)  
LAND PATTERN EXAMPLE  
EXPLOSED METAL SHOWN  
SCALE:15X  
METAL UNDER  
SOLDER MASK  
SOLDER MASK  
OPENING  
SOLDER MASK  
OPENING  
METAL  
EXPOSED METAL  
EXPOSED METAL  
0.07 MIN  
ARROUND  
0.07 MAX  
ARROUND  
NON SOLDER MASK  
DEFINED  
SOLDER MASK  
DEFINED  
SOLDERMASK DETAILS  
4214841/C 04/2022  
NOTES: (continued)  
4. Publication IPC-7351 may have alternate designs.  
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.  
www.ti.com  
EXAMPLE STENCIL DESIGN  
DDC0006A  
SOT-23 - 1.1 max height  
SMALL OUTLINE TRANSISTOR  
SYMM  
6X (1.1)  
1
6
6X (0.6)  
SYMM  
4X(0.95)  
4
3
(R0.05) TYP  
(2.7)  
SOLDER PASTE EXAMPLE  
BASED ON 0.125 THICK STENCIL  
SCALE:15X  
4214841/C 04/2022  
NOTES: (continued)  
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
7. Board assembly site may have different recommendations for stencil design.  
www.ti.com  
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