LM3710XKMMX-232 [TI]
2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO10, MSOP-10;型号: | LM3710XKMMX-232 |
厂家: | TEXAS INSTRUMENTS |
描述: | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO10, MSOP-10 光电二极管 |
文件: | 总19页 (文件大小:736K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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January 2005
LM3710/LM3711
Microprocessor Supervisory Circuits with Power Fail
Input, Low Line Output, Manual Reset and Watchdog
Timer
General Description
Features
n Standard Reset Threshold voltage: 3.08V
n Custom Reset Threshold voltages: For other voltages
between 2.2V and 5.0V in 10mV increments, contact
National Semiconductor Corp.
The LM3710/LM3711 series of microprocessor supervisory
circuits provide the maximum flexibility for monitoring power
supplies and battery controlled functions in systems without
backup batteries. The LM3710/LM3711 series are available
in MSOP-10 and 9-bump micro SMD packages.
n No external components required
Built-in features include the following:
n Manual-Reset input
n RESET (LM3710) or RESET (LM3711) outputs
n Precision supply voltage monitor
n Factory programmable Reset and Watchdog Timeout
Delays
Reset: Reset is asserted during power-up, power-down, and
brownout conditions. RESET is guaranteed down to VCC of
1.0V.
Manual Reset Input: An input that asserts reset when pulled
low.
n Separate Power Fail comparator
n Available in micro SMD package for minimum footprint
Power-Fail Input: A 1.225V threshold detector for power fail
warning, or to monitor a power supply other than VCC
.
n
n
0.5% Reset threshold accuracy at room temperature
2% Reset threshold accuracy over temperature
extremes
Low Line Output: This early power failure warning indicator
goes low when the supply voltage drops to a value which is
2% higher than the reset threshold voltage.
n Reset assertion down to 1V VCC (RESET option only)
n 28 µA VCC supply current
Watchdog Timer: The WDI (Watchdog Input) monitors one of
the µP’s output lines for activity. If no output transition occurs
during the watchdog timeout period, reset is activated.
Applications
n Embedded Controllers and Processors
n Intelligent Instruments
n Automotive Systems
n Critical µP Power Monitoring
Typical Application
20011803
© 2005 National Semiconductor Corporation
DS200118
www.national.com
Connection Diagram
Top View
(looking from the coating side)
micro SMD 9 Bump Package
BPA09
MSOP-10
20011802
20011801
Pin Descriptions
Pin No.
Name
Function
micro
SMD
A1
MSOP
2
MR
Manual-Reset input. When MR is less than VMRT (Manual Reset Threshold)
RESET/RESET is engaged.
B1
C1
1
VCC
Power Supply input.
10
RESET
Reset Logic Output. Pulses low for tRP (Reset Timeout Period) when triggered, and stays
low whenever VCC is below the reset threshold or when MR is below VMRT. It remains low
for tRP after either VCC rises above the reset threshold, or after MR input rises above
VMRT (LM3710 only).
RESET
PFO
Reset Logic Output. RESET is the inverse of RESET (LM3711 only).
Power-Fail Logic Output. When PFI is below VPFT, PFO goes low; otherwise, PFO
remains high.
C2
C3
8
7
LLO
Low-Line Logic Output. Early Power-Fail warning output. Low when VCC falls below VLLOT
(Low-Line Output Threshold). This output can be used to generate an NMI (Non-Maskable
Interrupt) to provide an early warning of imminent power-failure.
Ground reference for all signals.
B3
A3
5
4
GND
WDI
Watchdog Input Transition Monitor: If no transition activity occurs for a period exceeding
tWD (Watchdog Timeout Period), reset is engaged.
A2
B2
3
PFI
NC
Power-Fail Comparator Input. When PFI is less than VPFT (Power-Fail Reset Threshold),
the PFO goes low; otherwise, PFO remains high.
6, 9
No Connect. Test input used at factory only. Leave floating.
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2
Block Diagram
20011805
3
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Ordering Information
20011804
*For other voltages between 2.2V and 5.0V, please contact National Semiconductor sales office.
LM3710/LM3711
Package
Reset
Timeout
Period
Watchdog
Timeout
Period
Package
Marking
Part Number
Output
micro
MSOP
SMD
LM3710XKBP-232
LM3710XKBPX-232
LM3710XKBP-463
LM3710XKBPX-463
LM3710XKMM-232
LM3710XKMMX-232
LM3710XKMM-463
LM3710XKMMX-463
LM3710XNMM-450
LM3710XNMMX-450
LM3710XNMM-470
LM3710XNMMX-470
LM3710XQBP-308
LM3710XQBPX-308
LM3710YQMM-232
LM3710YQMMX-232
LM3711XKBP-232
LM3711XKBPX-232
LM3711XKBP-463
LM3711XKBPX-463
LM3711XKMM-232
LM3711XKMMX-232
LM3711XKMM-463
LM3711XKMMX-463
LM3710XQMM-308
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
open-drain
open-drain
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
28ms
28ms
28ms
28ms
28ms
28ms
28ms
28ms
1.4ms
1.4ms
1.4ms
1.4ms
200ms
200ms
200ms
200ms
28ms
28ms
28ms
28ms
28ms
28ms
28ms
28ms
200ms
102ms
102ms
102ms
102ms
102ms
102ms
102ms
102ms
1600ms
1600ms
1600ms
1600ms
1600ms
1600ms
1600ms
1600ms
102ms
102ms
102ms
102ms
102ms
102ms
102ms
102ms
1600ms
x
x
x
x
%%I19
%%I19
%%I21
%%I21
R72B
R72B
R74B
R74B
R84B
R84B
R83B
R83B
%%IA
%%IA
R77B
R77B
%%I20
%%I20
%%I22
%%I22
R73B
R73B
R75B
R75B
R37B
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
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4
Ordering Information (Continued)
LM3710/LM3711 (Continued)
Package
Reset
Timeout
Period
Watchdog
Timeout
Period
Package
Marking
Part Number
Output
micro
MSOP
SMD
LM3710XQMMX-308
LM3711XQBP-308
LM3711XQBPX-308
LM3711XQMM-308
LM3711XQMMX-308
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
200ms
200ms
200ms
200ms
200ms
1600ms
1600ms
1600ms
1600ms
1600ms
x
R37B
%%IB
%%IB
R38B
R38B
x
x
x
x
%% is the datecode and will vary with time.
Table Of Functions
Part
Number
Active
Low
Reset
x
Active
High
Reset
Output
(X = totem-pole)
(Y = open-drain)
Reset
Timeout
Period
Watchdog
Timeout
Period
Manual
Reset
Power Fail
Comparator
Low
Line
Output
x
LM3710
LM3711
X, Y*
X
Customized
Customized
Customized
Customized
x
x
x
x
x
x
* = available upon request. Contact National
5
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Power Dissipation
(Note 3)
Operating Ratings (Note 1)
Temperature Range
−40˚C ≤ TJ ≤ 85˚C
Supply Voltage (VCC
All Other Inputs
)
−0.3V to 6.0V
−0.3V to VCC + 0.3V
ESD Ratings (Note 2)
Human Body Model
Machine Model
1.5kV
150V
LM3710/LM3711 Series Electrical Characteristics
Limits in the standard typeface are for TJ = 25˚C and limits in boldface type apply over full operating range. Unless otherwise
specified: VCC = +2.2V to 5.5V.
Symbol
POWER SUPPLY
VCC Operating Voltage
Parameter
Conditions
Min
Typ
Max
Units
LM3710
LM3711
1.0
1.2
5.5
5.5
50
V
Range: VCC
ICC
VCC Supply
Current
All inputs = VCC; all outputs floating
28
µA
RESET THRESHOLD
VRST
Reset Threshold
VCC falling
−0.5
−2
+0.5
+2
VRST
%
VCC falling: TA = 0˚C to 70˚C
−1.5
+1.5
VRSTH
tRP
Reset Threshold
Hysteresis
0.0032•VRST
mV
Reset Timeout
Period
Reset Timeout Period = E, J, N, S
Reset Timeout Period = F, K, P, T
Reset Timeout Period = G, L, Q, U
Reset Timeout Period = H, M, R, V
VCCfalling at 1mV/µs
1
20
140
1120
1.4
28
2
40
280
2240
ms
µs
200
1600
20
tRD
VCCto Reset
Delay
RESET (LM3711)
VOL RESET
>
VCC 2.25V, ISINK = 900µA
0.3
0.3
0.4
>
VCC 2.7V, ISINK = 1.2mA
V
>
VCC 4.5V, ISINK = 3.2mA
>
VOH
RESET
VCC 1.2V, ISOURCE = 50µA
0.8 VCC
0.8 VCC
>
VCC 1.8V, ISOURCE = 150µA
>
VCC 2.25V, ISOURCE = 300µA
0.8 VCC
V
>
VCC 2.7V, ISOURCE = 500µA
0.8 VCC
>
VCC 4.5V, ISOURCE = 800µA
VCC − 1.5V
ILKG
Output Leakage
Current
VRESET = 5.5V
1.0
µA
RESET (LM3710)
VOL RESET
>
VCC 1.0V, ISINK = 50µA
0.3
0.3
0.3
0.3
0.4
>
VCC 1.2V, ISINK = 100µA
>
VCC 2.25V, ISINK = 900µA
>
VCC 2.7V, ISINK = 1.2mA
V
>
VCC 4.5V, ISINK = 3.2mA
>
VOH
RESET
VCC 2.25V, ISOURCE = 300µA
0.8 VCC
0.8 VCC
>
VCC 2.7V, ISOURCE = 500µA
>
VCC 4.5V, ISOURCE = 800µA
VCC − 1.5V
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6
LM3710/LM3711 Series Electrical Characteristics (Continued)
Limits in the standard typeface are for TJ = 25˚C and limits in boldface type apply over full operating range. Unless otherwise
specified: VCC = +2.2V to 5.5V.
Symbol
WDI
Parameter
Conditions
Min
−1
Typ
Max
+1
Units
WDI
Watchdog Input
Current
µA
WDIT
tWD
Watchdog Input
Threshold
0.2•VCC
1.225
0.8•VCC
V
Watchdog
Watchdog Timeout Period = E, F, G, H
Watchdog Timeout Period = J, K, L, M
Watchdog Timeout Period = N, P, Q, R
Watchdog Timeout Period = S, T, U, V
4.3
71
1120
17900
6.2
102
9.3
153
2400
38400
Timeout Period
ms
1600
25600
PFI/MR
VPFT
PFI Input
Threshold
MR Input
Threshold
1.200
2.0
1.225
1.250
0.8
V
VMRT
MR, Low
V
MR, High
VPFTH
VMRTH
IPFI
/
PFI/MR Threshold
Hysteresis
PFI/MR falling: VCC = VRST MAX to 5.5V
0.0032•VRST
mV
Input Current
(PFI only)
−75
35
75
75
nA
kΩ
µS
µS
RMR
tMD
MR Pull-up
Resistance
MR to Reset
Delay
56
12
tMR
PFO, LLO
VOL
MR Pulse Width
25
>
PFO, LLO Output
Voltage
VCC 2.25V, ISINK = 900µA
0.3
0.3
0.4
>
VCC 2.7V, ISINK = 1.2mA
>
VCC 4.5V, ISINK = 3.2mA
V
V
>
VOH
VCC 2.25V, ISOURCE = 300µA
0.8 VCC
0.8 VCC
>
VCC 2.7V, ISOURCE = 500µA
>
VCC 4.5V, ISOURCE = 800µA
VCC − 1.5V
LLO OUTPUT
VLLOT
LLO Output
1.01•VRST
1.02•VRST
1.03•VRST
Threshold
(VLLO − VRST, VCC
falling)
VLLOTH
Low-Line
0.0032•VRST
mV
µs
Comparator
Hysteresis
tCD
Low-Line
VCC falling at 1mV/µs
20
Comparator Delay
7
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LM3710/LM3711 Series Electrical Characteristics (Continued)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device
is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the
listed conditions.
Note 2: The Human Body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200pF capacitor discharged
directly into each pin.
Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, T (MAX), the junction-to-ambient thermal resistance, θ
,
J-A
J
and the ambient temperature, T . The maximum allowable power dissipation at any ambient temperture is calculated using:
A
Where the value of θ
for the MSOP-10 package is 195˚C/W in a typical PC board mounting and the micro SMD package is 220˚C/W.
J-A
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8
Typical Performance Characteristics
Supply Current vs Supply Voltage
3.3V Supply Current vs Temperature
20011811
20011815
Normalized Reset Threshold Voltage vs Temperature
Reset Timeout Period vs VCC
20011812
20011832
Max. Transient Duration vs Reset Comparator Overdrive
(VCC = 3.3V)
Reset Timeout Period vs Temperature
20011810
20011816
9
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Typical Performance Characteristics (Continued)
Watchdog Timeout Period vs Temperature
(tWD programmed as 6.2ms)
Low-Line Comparator Propagation Delay vs Temperature
20011814
20011813
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10
The voltage threshold is set by R1 and R2 and is calculated
as follows:
Circuit Information
RESET OUTPUT
The Reset input of a µP initializes the device into a known
state. The LM3710/LM3711 microprocessor supervisory cir-
cuits assert a forced reset output to prevent code execution
errors during power-up, power-down, and brownout condi-
tions.
Note this comparator is completely separate from the rest of
the circuitry, and may be employed for other functions as
needed.
>
RESET is guaranteed valid for VCC
1V. Once VCC ex-
ceeds the reset threshold, an internal timer maintains the
output for the reset timeout period. After this interval, reset
goes high. The LM3710 offers an active-low RESET; The
LM3711 offers an active-high RESET.
LOW-LINE OUTPUT (LLO)
The low-line output comparator is typically used to provide a
non-maskable interrupt to a µP when VCC begins falling. LLO
monitors VCC and goes low when VCC falls below VLLOT
Any time VCC drops below the reset threshold (such as
during a brownout), the reset activates. When VCC again
rises above the reset threshold, the internal timer starts.
Reset holds until VCC exceeds the reset threshold for longer
than the reset timeout period. After this time, reset releases.
(typically 1.02 • VRST) with hysteresis of 0.0032 • VRST
.
WATCHDOG TIMER INPUT (WDI)
The watchdog timer input monitors one of the microproces-
sor’s output lines for activity. Each time a transition occurs on
this monitored line, the watchdog counter is reset. However,
if no transition occurs and the timeout period is reached, the
LM3710/LM3711 assumes that the microprocessor has
locked up and the reset output is activated.
The Manual Reset input (MR) will initiate a forced reset also.
See the Manual Reset Input section.
RESET THRESHOLD
The LM3710/LM3711 family is available with a reset voltage
of 3.08V. Other reset thresholds in the 2.20V to 5.0V range,
in steps of 10 mV, are available; contact National Semicon-
ductor for details.
WDI is a high impedance input.
SPECIAL PRECAUTIONS FOR THE MICRO SMD
PACKAGE
As with most integrated circuits, the LM3710 and LM3711
are sensitive to exposure from visible and infrared (IR) light
radiation. Unlike a plastic encapsulated IC, the micro SMD
package has very limited shielding from light, and some
sensitivity to light reflected from the surface of the PC board
or long wavelength IR entering the die from the side may be
experienced. This light could have an unpredictable affect on
the electrical performance of the IC. Care should be taken to
shield the device from direct exposure to bright visible or IR
light during operation.
MANUAL RESET INPUT (MR)
Many µP-based products require a manual reset capability,
allowing the operator to initiate a reset. The MR input is fully
debounced and provides an internal 56 kΩ pull-up. When the
MR input is pulled below VMRT (1.225V) for more than 25 µs,
reset is asserted after a typical delay of 12 µs. Reset remains
active as long as MR is held low, and releases after the reset
timeout period expires after MR rises above VMRT. Use MR
with digital logic to assert or to daisy chain supervisory
circuits. It may be used as another low-line comparator by
adding a buffer.
MICRO SMD MOUNTING
The micro SMD package requires specific mounting tech-
niques which are detailed in National Semiconductor Appli-
cation Note AN-1112. Referring to the section Surface
Mount Technology (SMT) Assembly Considerations, it
should be noted that the pad style which must be used with
the 9-pin package is the NSMD (non-solder mask defined)
type.
POWER-FAIL COMPARATOR (PFI/PFO)
The PFI is compared to a 1.225V internal reference, VPFT. If
PFI is less than VPFT, the Power Fail Output PFO drops low.
The power-fail comparator signals a falling power supply,
and is driven typically by an external voltage divider that
senses either the unregulated supply or another system
supply voltage. The voltage divider generally is chosen so
the voltage at PFI drops below VPFT several milliseconds
before the main supply voltage drops below the reset thresh-
old, providing advanced warning of a brownout.
For best results during assembly, alignment ordinals on the
PC board may be used to facilitate placement of the micro
SMD device.
11
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Timing Diagrams
20011828
FIGURE 1. LM3710/LM3711 Reset Time with MR and WDI
20011829
FIGURE 2. LLO Output
20011830
FIGURE 3. PFI Comparator Timing Diagram
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12
Typical Application Circuits
20011818
FIGURE 4. Monitoring Two Critical Supplies And Dataline
20011819
FIGURE 5. Monitoring Two Supplies plus Manual Reset And Dataline
13
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Typical Application Circuits (Continued)
20011820
FIGURE 6. Monitoring Dual Supplies plus External Fault Input And Dataline
20011821
Note: MR input with its 1.225V nominal threshold, may monitor an additional supply voltage. An internal 56 kΩ pull-up resistor is
included on this input.
FIGURE 7. Microprocessor Supervisor with Early Warning Detector
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14
Typical Application Circuits (Continued)
20011840
FIGURE 8. LM3710 Long Period oscillator
15
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Physical Dimensions inches (millimeters)
unless otherwise noted
10 Lead MSOP Package
NS Package Number MUB10A
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16
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
NOTES: UNLESS OTHERWISE SPECIFIED
1. EPOXY COATING
2. 63Sn/37Pb EUTECTIC BUMP
3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD.
4. PIN 1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED COUNTER
CLOCKWISE.
5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS
PACKAGE HEIGHT.
6.NO JEDEC REGISTRATION AS OF AUG.1999.
9 bump micro SMD Package
NS Package Number BPA09FFB
The dimensions of X1, X2 and X3 are given below
X1 = 1.412mm
X2 = 1.412mm
X3 = 0.850mm
17
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Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform when
properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result
in a significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
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Substances’’ as defined in CSP-9-111S2.
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