LM2984T/NOPB [TI]

1-CHANNEL POWER SUPPLY SUPPORT CKT, PZFM11;
LM2984T/NOPB
型号: LM2984T/NOPB
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
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1-CHANNEL POWER SUPPLY SUPPORT CKT, PZFM11

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LM2984  
www.ti.com  
SNVS098C APRIL 1998REVISED MARCH 2013  
LM2984 Microprocessor Power Supply System  
Check for Samples: LM2984  
1
FEATURES  
DESCRIPTION  
The LM2984 positive voltage regulator features three  
independent and tracking outputs capable of  
delivering the power for logic circuits, peripheral  
2
Three Low Dropout Tracking Regulators  
Output Current in Excess of 500 mA  
Fully Specified for 40°C to +125°C Operation  
Low Quiescent Current Standby Regulator  
Microprocessor Malfunction RESET Flag  
Delayed RESET on Power-Up  
sensors and standby memory in  
a
typical  
microprocessor system. The LM2984 includes  
circuitry which monitors both its own high-current  
output and also an external μP. If any error conditions  
are sensed in either, a reset error flag is set and  
maintained until the malfunction terminates. Since  
these functions are included in the same package  
with the three regulators, a great saving in board  
space can be realized in the typical microprocessor  
system. The LM2984 also features very low dropout  
voltages on each of its three regulator outputs (0.6V  
at the rated output current). Furthermore, the  
quiescent current can be reduced to 1 mA in the  
standby mode.  
Accurate pretrimmed 5V outputs  
Reverse Battery Protection  
Overvoltage Protection  
Reverse Transient Protection  
Short Circuit Protection  
Internal Thermal Overload Protection  
ON/OFF Switch for High Current Outputs  
P+ Product Enhancement Tested  
Designed also for vehicular applications, the LM2984  
and all regulated circuitry are protected from reverse  
battery installations or 2-battery jumps. Familiar  
regulator features such as short circuit and thermal  
overload protection are also provided. Fixed outputs  
of 5V are available in the plastic TO-220 power  
package.  
Typical Application Circuit  
COUT must be at least 10 μF to maintain stability. May be increased without bound to maintain regulation during  
transients. Locate as close as possible to the regulator. This capacitor must be rated over the same operating  
temperature range as the regulator. The equivalent series resistance (ESR) of this capacitor is critical; see curves.  
Figure 1. Package Number NDJ0011B  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 1998–2013, Texas Instruments Incorporated  
LM2984  
SNVS098C APRIL 1998REVISED MARCH 2013  
www.ti.com  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
(1)(2)  
Absolute Maximum Ratings  
Input Voltage  
Survival Voltage (<100 ms)  
Operational Voltage  
60V  
26V  
Internal Power Dissipation  
Operating Temperature Range (TA)  
Internally Limited  
40°C to +125°C  
Maximum Junction Temperature  
(3)  
150°C  
Storage Temperature Range  
Lead Temperature  
65°C to +150°C  
(Soldering, 10 sec.)  
230°C  
2000V  
(4)  
ESD Susceptability  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not  
apply when operating the device beyond its specified operating ratings.  
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and  
specifications.  
(3) Thermal resistance without a heatsink for junction-to-case temperature is 3°C/W. Thermal resistance case-to-ambient is 40°C/W.  
(4) Human body model, 100 pF capacitor discharged through a 1500Ω resistor.  
Electrical Characteristics  
VIN = 14V, IOUT = 5 mA, COUT = 10 μF, unless otherwise indicated. Boldface type refers to limits over the entire operating  
(1)  
temperature range, 40°C TA +125°C, all other limits are for TA = Tj = 25°C  
.
Parameter  
Conditions  
Typical  
Limit  
Units  
(2)  
VOUT (Pin 11)  
Output Voltage  
5 mA IO 500 mA  
5.00  
4.85/4.75  
5.15/5.25  
25/25  
Vmin  
Vmax  
6V VIN 26V  
9V VIN 16V  
7V VIN 26V  
5 mA IOUT 500 mA  
250 mAdc and 10 mArms  
fo = 120 Hz  
Line Regulation  
2
5
mVmax  
mVmax  
mVmax  
mΩ  
50/50  
Load Regulation  
12  
24  
50/50  
Output Impedance  
,
Quiescent Current  
IOUT = 500 mA  
38  
14  
100/100  
50/50  
mAmax  
mAmax  
μV  
IOUT = 250 mA  
Output Noise Voltage  
Long Term Stability  
Ripple Rejection  
10 Hz–100 kHz, IOUT = 100 mA  
100  
20  
mV/1000 hr  
dBmin  
Vmax  
fo = 120 Hz  
70  
60/50  
0.80/1.1  
0.50/0.70  
0.75/0.60  
26/26  
Dropout Voltage  
IOUT = 500 mA  
IOUT = 250 mA  
0.53  
0.28  
0.92  
32  
Vmax  
Current Limit  
Amin  
Maximum Operational  
Input Voltage  
Continuous DC  
Vmin  
Maximum Line Transient  
Reverse Polarity  
Input Voltage DC  
V
OUT 6V, ROUT = 100Ω, T 100 ms  
OUT ≥ −0.6V, ROUT = 100Ω  
65  
60/60  
Vmin  
Vmin  
V
30  
15/15  
Reverse Polarity Input  
Voltage Transient  
T 100 ms, ROUT = 100Ω  
55  
35/35  
Vmin  
(1) To ensure constant junction temperature, low duty cycle pulse testing is used.  
(2) Tested Limits are ensured and 100% production tested.  
2
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Electrical Characteristics (continued)  
VIN = 14V, IOUT = 5 mA, COUT = 10 μF, unless otherwise indicated. Boldface type refers to limits over the entire operating  
temperature range, 40°C TA +125°C, all other limits are for TA = Tj = 25°C (1)  
.
Parameter  
Conditions  
Typical  
Limit  
Units  
(2)  
Vbuffer (Pin 10)  
Output Voltage  
5 mA IO 100 mA  
5.00  
4.85/4.75  
5.15/5.25  
25/25  
Vmin  
Vmax  
6V VIN 26V  
9V VIN 16V  
7V VIN 26V  
5 mA Ibuf 100 mA  
50 mAdc and 10 mArms  
fO = 120 Hz  
Line Regulation  
2
5
mVmax  
mVmax  
mVmax  
mΩ  
50/50  
Load Regulation  
15  
200  
50/50  
Output Impedance  
,
Quiescent Current  
Output Noise Voltage  
Long Term Stability  
Ripple Rejection  
Dropout Voltage  
Current Limit  
Ibuf = 100 mA  
8.0  
100  
20  
15/15  
mAmax  
μV  
10 Hz–100 kHz, IOUT = 100 mA  
mV/1000 hr  
dBmin  
fo = 120 Hz  
70  
60/50  
0.50/0.80  
0.15/0.15  
26/26  
Ibuf = 100 mA  
0.35  
0.23  
32  
Vmax  
Amin  
Maximum Operational  
Input Voltage  
Continuous DC  
Vmin  
Maximum Line  
V
buf 6V, Rbuf = 100Ω,  
T 100 ms  
buf ≥ −0.6V, Rbuf = 100Ω  
65  
60/60  
Vmin  
Vmin  
Vmin  
Transient  
Reverse Polarity  
Input Voltage DC  
Reverse Polarity Input  
Voltage Transient  
Vstandby (Pin 9)  
Output Voltage  
V
30  
55  
15/15  
35/35  
T 100 ms, Rbuf = 100Ω  
1 mA IO 7.5 mA  
6V VIN 26V  
5.00  
4.85/4.75  
5.15/5.25  
25/25  
Vmin  
Vmax  
Line Regulation  
9V VIN 16V  
2
5
mVmax  
mVmax  
mVmax  
Ω
7V VIN 26V  
50/50  
Load Regulation  
Output Impedance  
Quiescent Current  
0.5 mA IOUT 7.5 mA  
5 mAdc and 1 mArms, fo = 120 Hz  
Istby = 7.5 mA  
6
50/50  
0.9  
1.2  
0.9  
100  
20  
2.0/4.0  
1.5/4.0  
mAmax  
mAmax  
μV  
Istby = 2 mA  
Output Noise Voltage  
Long Term Stability  
Ripple Rejection  
10 Hz–100 kHz, Istby = 1 mA  
mV/1000 hr  
dBmin  
Vmax  
fo = 120 Hz  
Istby = 1 mA  
Istby = 7.5 mA  
70  
60/50  
0.50/0.60  
0.60/0.70  
12/12  
Dropout Voltage  
0.26  
0.38  
15  
Vmax  
Current Limit  
mAmin  
Vmin  
Maximum Operational  
Input Voltage  
4.5V Vstby 6V,  
Rstby = 1000Ω  
65  
60/60  
Maximum Line  
Transient  
V
stby 6V, T 100 ms,  
Rstby = 1000Ω  
stby ≥ −0.6V,  
Rstby = 1000Ω  
65  
60/60  
Vmin  
Reverse Polarity  
Input Voltage DC  
V
30  
15/15  
Vmin  
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Electrical Characteristics (continued)  
VIN = 14V, IOUT = 5 mA, COUT = 10 μF, unless otherwise indicated. Boldface type refers to limits over the entire operating  
temperature range, 40°C TA +125°C, all other limits are for TA = Tj = 25°C (1)  
.
Parameter  
Conditions  
Typical  
Limit  
Units  
(2)  
Reverse Polarity Input  
Voltage Transient  
Tracking and Isolation  
Tracking  
T 100 ms, Rstby = 1000Ω  
55  
35/35  
Vmin  
I
OUT 500 mA, Ibuf = 5 mA,  
stby 7.5 mA  
±30  
±30  
±100/±100  
±100/±100  
±100/±100  
mVmax  
mVmax  
mVmax  
VOUT–Vstby  
I
Tracking  
IOUT = 5 mA, Ibuf 100 mA,  
Vbuf–Vstby  
Istby 7.5 mA  
Tracking  
IOUT 500 mA, Ibuf 100 mA,  
±30  
VOUT–Vbuf  
Istby = 1 mA  
(3)  
Isolation  
ROUT = 1Ω, Ibuf 100 mA  
5.00  
5.00  
5.00  
5.00  
4.50/4.50  
5.50/5.50  
4.50/4.50  
5.50/5.50  
4.50/4.50  
5.50/5.50  
4.50/4.50  
5.50/5.50  
Vmin  
Vmax  
Vmin  
Vmax  
Vmin  
Vmax  
Vmin  
Vmax  
Vbuf from VOUT  
(3)  
Isolation  
ROUT = 1Ω, Istby 7.5 mA  
Rbuf = 1Ω, IOUT 500 mA  
Rbuf = 1Ω, Istby 7.5 mA  
Vstby from VOUT  
(3)  
Isolation  
VOUT from Vbuf  
(3)  
Isolation  
Vstby from Vbuf  
Computer Monitor/Reset Functions  
Ireset Low  
Vreset Low  
Rt voltage  
VIN = 4V, Vrst = 0.4V  
5
2/0.50  
0.40/0.40  
1.15/0.75  
1.30/2.00  
45/17.0  
mAmin  
Vmax  
VIN = 4V, Irst = 1 mA  
(Pin 2)  
0.10  
1.22  
1.22  
50  
Vmin  
Vmax  
Power On Reset  
Delay  
VμPmon = 5V  
msmin  
msmax  
mVmin  
mVmax  
mVmin  
mVmax  
μAmax  
(Tdly = 1.2 Rt Ct)  
(4)  
50  
55/80.0  
ΔVOUT Low  
350  
225/175  
500/550  
225/175  
750/800  
1/5.0  
Reset Threshold  
ΔVOUT High  
(4)  
600  
Reset Threshold  
Reset Output  
Leakage  
VμPmon = 5V, Vrst = 12V  
0.01  
μPmon Input Current (Pin 4)  
VμPmon = 2.4V  
VμPmon = 0.4V  
7.5  
0.01  
1.22  
1.22  
50  
25/25  
10/15  
μAmax  
μAmax  
Vmin  
μPmon Input  
0.80/0.80  
2.00/2.00  
45/30  
Threshold Voltage  
μP Monitor Reset  
Oscillator Period  
μP Monitor Reset  
Oscillator Pulse Width  
Minimum μP Monitor  
Input Pulse Width  
Vmax  
VμPmon = 0V  
msmin  
msmax  
msmin  
msmax  
μs  
(Twindow = 0.82 RtCmon  
)
50  
55/70  
VμPmon = 0V  
1.0  
1.0  
2
0.7/0.4  
1.3/2.10  
(RESETpw = 2000 Cmon  
(5)  
)
(3) Isolation refers to the ability of the specified output to remain within the tested limits when the other output is shorted to ground.  
(4) Internal comparators detect when the main regulator output (VOUT) changes from the measured output voltage (with VIN = 14V) by the  
specified amount, ΔVOUT High or ΔVOUT Low, and set the Reset Error Flag low. The Reset Error Flag is held low until VOUT returns to  
regulation. The Reset Error Flag is then allowed to go high again after a delay set by Rtand Ct. (see Application Hints section).  
(5) This parameter is a measure of how short a pulse can be detected at the μP Monitor Input. This parameter is primarily influenced by the  
value of Cmon. (See Application Hints Section.)  
4
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Electrical Characteristics (continued)  
VIN = 14V, IOUT = 5 mA, COUT = 10 μF, unless otherwise indicated. Boldface type refers to limits over the entire operating  
temperature range, 40°C TA +125°C, all other limits are for TA = Tj = 25°C (1)  
.
Parameter  
Conditions  
Typical  
Limit  
Units  
(2)  
Reset Fall Time  
Rrst = 10k, Vrst = 5V, Crst 10 pF  
Rrst = 10k, Vrst = 5V, Crst 10 pF  
VON = 2.4V  
0.20  
0.60  
7.5  
1.00/1.00  
1.00/1.50  
25/25  
μsmax  
μsmax  
μAmax  
μAmax  
Vmin  
Reset Rise Time  
On/Off Switch Input  
Current (Pin 8)  
VON = 0.4V  
0.01  
1.22  
1.22  
10/10  
On/Off Switch Input  
Threshold Voltage  
0.80/0.80  
2.00/2.00  
Vmax  
BLOCK DIAGRAM  
Pin Descriptions  
Pin No.  
Pin Name  
Comments  
1
2
VIN  
Positive supply input voltage  
Rt  
Sets internal timing currents  
Sets power-up reset delay timing  
Microcomputer monitor input  
Sets μC monitor timing  
3
Ct  
4
μPmon  
Cmon  
5
6
Ground  
Reset  
Regulator ground  
7
Reset error flag output  
8
ON/OFF  
Vstandby  
Vbuffer  
Enables/disables high current regulators  
Standby regulator output (7.5 mA)  
Buffer regulator output (100 mA)  
Main regulator output (500 mA)  
9
10  
11  
VOUT  
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External Components  
Component  
Typical Value  
1 μF  
Component Range  
0.47 μF–10 μF  
24k–510k  
Comments  
Required if device is located far from power supply filter.  
Sets internal timing currents.  
CIN  
Rt  
130k  
Ct  
0.33 μF  
0.01 μF  
10k  
0.033 μF–3.3 μF  
0.001 μF–0.1 μF  
1k–100k  
Sets power-up reset delay.  
Ctc  
Rtc  
Establishes time constant of AC coupled computer monitor.  
Establishes time constant of AC coupled computer monitor. (See Application Hints  
section.)  
Cmon  
Rrst  
Cstby  
Cbuf  
0.47 μF  
10k  
0.047 μF–4.7 μF  
5k–100k  
Sets time window for computer monitor. Also determines period and pulse width of  
computer malfunction reset. (See Application Hints section.)  
Load for open collector reset output. Determined by computer reset input  
requirements.  
10 μF  
10 μF  
10 μF  
10 μF–no bound  
10 μF–no bound  
10 μF–no bound  
A 10 μF is required for stability but larger values can be used to maintain  
regulation during transient conditions.  
A 10 μF is required for stability but larger values can be used to maintain  
regulation during transient conditions.  
COUT  
A 10 μF is required for stability but larger values can be used to maintain  
regulation during transient conditions.  
Typical Circuit Waveforms  
6
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Connection Diagram  
Figure 2. Package Number NDJ0011B  
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Typical Performance Characteristics  
Dropout Voltage (VOUT  
)
Dropout Voltage (Vbuf)  
Figure 3.  
Figure 4.  
Dropout Voltage (Vstby  
)
Dropout Voltage (VOUT)  
Figure 5.  
Figure 6.  
Dropout Voltage (Vbuf  
)
Dropout Voltage (Vstby)  
Figure 7.  
Figure 8.  
8
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Typical Performance Characteristics (continued)  
Peak Output Current (VOUT  
)
Peak Output Current (Vbuf)  
Figure 9.  
Figure 10.  
Peak Output Current (Vstby  
)
Quiescent Current (VOUT)  
Figure 11.  
Figure 12.  
Quiescent Current (Vbuf  
)
Quiescent Current (Vstby)  
Figure 13.  
Figure 14.  
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Typical Performance Characteristics (continued)  
Quiescent Current (VOUT  
)
Quiescent Current (Vbuf)  
Figure 15.  
Figure 16.  
Quiescent Current (Vstby  
)
Quiescent Current (VOUT)  
Figure 17.  
Figure 18.  
Quiescent Current (Vbuf  
)
Quiescent Current (Vstby)  
Figure 19.  
Figure 20.  
10  
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Typical Performance Characteristics (continued)  
Output Voltage (VOUT  
)
Output Voltage (Vbuf)  
Figure 21.  
Figure 22.  
Output Voltage (Vstby  
)
Low Voltage Behavior (VOUT)  
Figure 23.  
Figure 24.  
Low Voltage Behavior (Vbuf  
)
Low Voltage Behavior (Vstby)  
Figure 25.  
Figure 26.  
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Typical Performance Characteristics (continued)  
Line Transient  
Response (VOUT  
Line Transient  
Response (Vbuf)  
)
Figure 27.  
Figure 28.  
Line Transient  
Response (Vstby  
Load Transient  
Response (VOUT)  
)
Figure 29.  
Figure 30.  
Load Transient  
Load Transient  
Response (Vstby)  
Response (Vbuf  
)
Figure 31.  
Figure 32.  
12  
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Typical Performance Characteristics (continued)  
Output Impedance (VOUT  
)
Output Impedance (Vbuf)  
Figure 33.  
Output Impedance (Vstby  
Figure 34.  
Ripple Rejection (VOUT  
)
)
Figure 35.  
Ripple Rejection (Vbuf  
Figure 36.  
Ripple Rejection (Vstby  
)
)
Figure 37.  
Figure 38.  
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Typical Performance Characteristics (continued)  
Device Dissipation vs  
Ambient Temperature  
Output Voltage  
Figure 39.  
Figure 40.  
Output Capacitor ESR  
(Standby Output, Pin 9)  
Output Capacitor ESR  
(Buffer Output, Pin 10)  
Figure 41.  
Figure 42.  
Output Capacitor ESR  
(Main Output, Pin 11)  
Figure 43.  
14  
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APPLICATION HINTS  
OUTPUT CAPACITORS  
The LM2984 output capacitors are required for stability. Without them, the regulator outputs will oscillate,  
sometimes by many volts. Though the 10 μF shown are the minimum recommended values, actual size and type  
may vary depending upon the application load and temperature range. Capacitor effective series resistance  
(ESR) also affects the IC stability. Since ESR varies from one brand to the next, some bench work may be  
required to determine the minimum capacitor value to use in production. Worst case is usually determined at the  
minimum ambient temperature and the maximum load expected.  
Output capacitors can be increased in size to any desired value above the minimum. One possible purpose of  
this would be to maintain the output voltages during brief conditions of negative input transients that might be  
characteristic of a particular system.  
Capacitors must also be rated at all ambient temperatures expected in the system. Many aluminum type  
electrolytics will freeze at temperatures less than 30°C, reducing their effective capacitance to zero. To maintain  
regulator stability down to 40°C, capacitors rated at that temperature (such as tantalums) must be used.  
Each output must be terminated by a capacitor, even if it is not used.  
STANDBY OUTPUT  
The standby output is intended for use in systems requiring standby memory circuits. While the high current  
regulator outputs are controlled with the ON/OFF pin described later, the standby output remains on under all  
conditions as long as sufficient input voltage is supplied to the IC. Thus, memory and other circuits powered by  
this output remain unaffected by positive line transients, thermal shutdown, etc.  
The standby regulator circuit is designed so that the quiescent current to the IC is very low (<1.5 mA) when the  
other regulator outputs are off.  
The capacitor on the output of this regulator can be increased without bound. This will help maintain the output  
voltage during negative input transients and will also help to reduce the noise on all three outputs. Because the  
other two track the standby output: therefore any noise reduction here will also reduce the other two noise  
voltages.  
BUFFER OUTPUT  
The buffer output is designed to drive peripheral sensor circuitry in a μP system. It will track the standby and  
main regulator within a few millivolts in normal operation. Therefore, a peripheral sensor can be powered off this  
supply and have the same operating voltage as the μP system. This is important if a ratiometric sensor system is  
being used.  
The buffer output can be short circuited while the other two outputs are in normal operation. This protects the μP  
system from disruption of power when a sensor wire, etc. is temporarily shorted to ground, i.e. only the sensor  
signal would be interrupted, while the μP and memory circuits would remain operational.  
The buffer output is similar to the main output in that it is controlled by the ON/OFF switch in order to save power  
in the standby mode. It is also fault protected against overvoltage and thermal overload. If the input voltage rises  
above approximately 30V (e.g. load dump), this output will automatically shut down. This protects the internal  
circuitry and enables the IC to survive higher voltage transients than would otherwise be expected. Thermal  
shutdown is necessary since this output is one of the dominant sources of power dissipation in the IC.  
MAIN OUTPUT  
The main output is designed to power relatively large loads, i.e. approximately 500 mA. It is therefore also  
protected against overvoltage and thermal overload.  
This output will track the other two within a few millivolts in normal operation. It can therefore be used as a  
reference voltage for any signal derived from circuitry powered off the standby or buffer outputs. This is important  
in a ratiometric sensor system or any system requiring accurate matching of power supply voltages.  
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ON/OFF SWITCH  
The ON/OFF switch controls the main output and the buffer output. The threshold voltage is compatible with  
most logic families and has about 20 mV of hysteresis to insure “clean” switching from the standby mode to the  
active mode and vice versa. This pin can be tied to the input voltage through a 10 kΩ resistor if the regulator is to  
be powered continuously.  
POWER DOWN OVERRIDE  
Another possible approach is to use a diode in series with the ON/OFF signal and another in series with the main  
output in order to maintain power for some period of time after the ON/OFF signal has been removed (see  
Figure 44). When the ON/OFF switch is initially pulled high through diode D1, the main output will turn on and  
supply power through diode D2 to the ON/OFF switch effectively latching the main output. An open collector  
transistor Q1 is connected to the ON/OFF pin along with the two diodes and forces the regulators off after a  
period of time determined by the μP. In this way, the μP can override a power down command and store data, do  
housekeeping, etc. before reverting back to the standby mode.  
Figure 44. Power Down Override  
RESET OUTPUT  
This output is an open collector NPN transistor which is forced low whenever an error condition is present at the  
main output or when a μP error is sensed (see μP MONITOR RESET section). If the main output voltage drops  
by 350 mV or rises out of regulation by 600 mV typically, the RESET output is forced low and held low for a  
period of time set by two external components, Rt and Ct. There is a slight amount of hysteresis in these two  
threshold voltages so that the RESET output has a fast rise and fall time compatible with the requirements of  
most μP RESET inputs.  
DELAYED RESET  
Resistor Rt and capacitor Ct set the period of time that the RESET output is held low after a main output error  
condition has been sensed. The delay is given by the formula:  
Tdly = 1.2 RtCt (seconds)  
(1)  
The delayed RESET will be initiated any time the main output is out of regulation, i.e. during power-up, short  
circuit, overvoltage, low line, thermal shutdown or power-down. The μP is therefore RESET whenever the output  
voltage is out of regulation. (It is important to note that a RESET is only initiated when the main output is in error.  
The buffer and standby outputs are not directly monitored for error conditions.)  
μP MONITOR RESET  
There are two distinct and independent error monitoring systems in the LM2984. The one described above  
monitors the main regulator output and initiates a delayed RESET whenever this output is in error. The other  
error monitoring system is the μP watchdog. These two systems are OR'd together internally and both force the  
RESET output low when either type of error occurs.  
This watchdog circuitry continuously monitors a pin on the μP that generates a positive going pulse during  
normal operation. The period of this pulse is typically on the order of milliseconds and the pulse width is typically  
on the order of 10's of microseconds. If this pulse ever disappears, the watchdog circuitry will time out and a  
RESET low will be sent to the μP. The time out period is determined by two external components, Rt and Cmon  
,
according to the formula:  
Twindow = 0.82 RtCmon (seconds)  
(2)  
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The width of the RESET pulse is set by Cmon and an internal resistor according to the following:  
RESETpw = 2000 Cmon (seconds)  
(3)  
A square wave signal can also be monitored for errors by filtering the Cmon input such that only the positive  
edges of the signal are detected. Figure 45 is a schematic diagram of a typical circuit used to differentiate the  
input signal. Resistor Rtc and capacitor Ctc pass only the rising edge of the square wave and create a short  
positive pulse suitable for the μP monitor input. If the incoming signal continues in a high state or in a low state  
for too long a period of time, a RESET low will be generated.  
Figure 45. Monitoring Square Wave μP Signals  
The threshold voltage and input characteristics of this pin are compatible with nearly all logic families.  
There is a limit on the width of a pulse that can be reliably detected by the watchdog circuit. This is due to the  
output resistance of the transistor which discharges Cmon when a high state is detected at the input. The  
minimum detectable pulse width can be determined by the following formula:  
PWmin = 20 Cmon (seconds)  
(4)  
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Equivalent Schematic Diagram  
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REVISION HISTORY  
Changes from Revision B (March 2013) to Revision C  
Page  
Changed layout of National Data Sheet to TI format .......................................................................................................... 18  
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PACKAGE OPTION ADDENDUM  
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11-Apr-2013  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Top-Side Markings  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4)  
LM2984T  
ACTIVE  
TO-220  
NDJ  
11  
20  
TBD  
Call TI  
Call TI  
-40 to 125  
LM2984T  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4)  
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a  
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Addendum-Page 1  
MECHANICAL DATA  
NDJ0011B  
TA11B (Rev B)  
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