LM2903BRQPWRQ1 [TI]
汽车类双路差分商用比较器 | PW | 8 | -40 to 125;型号: | LM2903BRQPWRQ1 |
厂家: | TEXAS INSTRUMENTS |
描述: | 汽车类双路差分商用比较器 | PW | 8 | -40 to 125 比较器 |
文件: | 总38页 (文件大小:3293K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LM2903-Q1, LM2903B-Q1
SLCS141J – MAY 2003 – REVISED NOVEMBER 2020
LM2903-Q1 and LM2903B-Q1 Automotive Dual Comparators
Features
Description
•
•
Qualified for automotive applications
The LM2903B-Q1 device is the next generation
version of the industry-standard LM2903-Q1
comparator family. This next generation family
provides outstanding value for cost-sensitive
applications, with features including lower offset
voltage, higher supply voltage capability, lower supply
current, lower input bias current, lower propagation
delay, and improved 2kV ESD performance with drop-
in replacement convenience.
AEC-Q100 qualified with the following results:
– Device temperature grade 0: –40°C to 150°C
ambient operating temperature range
(LM2903E-Q1)
– Device temperature grade 1: –40°C to 125°C
ambient operating temperature range
– Device HBM ESD classification level H1C
– Device CDM ESD classification level C4B
Improved 2 kV HBM ESD for "B" device
Single supply or dual supplies
Low supply-current independent of
supply voltage 200 uA Typ Per
comparator ("B" Versions)
Low input bias current 3.5 nA Typ ("B" device)
Low input offset current 0.5 nA Typ ("B" device)
Low input offset voltage ±0.37 mV Typ ("B" device)
Common-mode input voltage range includes
ground
All devices consist of two independent voltage
comparators that are designed to operate over a wide
range of voltages. Operation from dual supplies also
is possible as long as the difference between the two
supplies is within 2 V to 36 V, and VCC is at least 1.5
V more positive than the input common-mode voltage.
The outputs can be connected to other open-collector
outputs.
•
•
•
•
•
•
•
The LM2903-Q1 and LM2903B-Q1 are qualified for
the AEC-Q100 Grade 1 temperature range of -40°C to
+125°C. The LM2903E-Q1 is Qualified for the Grade
0 extended temperature range of -40°C to +150°C.
•
Differential input voltage range equal to maximum-
rated supply voltage ±36 V
Output compatible with TTL, MOS, and CMOS
Functional Safety-Capable
– Documentation available to aid functional safety
system design
Device Information (1)
•
•
PART NUMBER
PACKAGE
BODY SIZE (NOM)
4.90 mm × 3.91 mm
3.00 mm × 4.40 mm
3.00 mm x 3.00 mm
2.00 mm x 2.00 mm
1.60 mm × 2.90 mm
4.90 mm × 3.91 mm
3.00 mm × 4.40 mm
3.00 mm x 3.00 mm
3.00 mm × 4.40 mm
SOIC (8)
TSSOP (8)
VSSOP(8)
WSON (8)
SOT-23 (8)
SOIC (8)
LM2903B-Q1
Applications
•
Automotive
– HEV/EV and power train
– Infotainment and cluster
– Body control module
Industrial
LM2903-Q1
TSSOP (8)
VSSOP(8)
TSSOP (8)
•
•
LM2903E-Q1
Appliances
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Family Comparison Table
LM2903-Q1
"A" Devices "AV" Devices
LM2903-Q1
Specification
LM2903B-Q1
LM2903-Q1
LM2903E-Q1
Units
Specified Supply Votlage
Total Supply Current (5 V to VS max)
Temperature Range
2 to 36
0.6 to 0.8
−40 to 125
2k / 1k
± 4
2 to 30
1 to 2.5
−40 to 125
1k / 750
± 15
2 to 30
1 to 2.5
−40 to 125
1k / 750
± 4
2 to 32
1 to 2.5
−40 to 125
1k / 750
± 4
2 to 30
1 to 2.5
-40 to 150
1k / 750
± 15
V
mA
°C
ESD (HBM / CDM)
V
Offset Voltage (max over temp)
Input Bias Current (typ / max)
Response Time (typ)
mV
nA
3.5 / 25
1
25 / 250
1.3
25 / 250
1.3
25 / 250
1.3
25 / 250
1.3
µsec
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM2903-Q1, LM2903B-Q1
SLCS141J – MAY 2003 – REVISED NOVEMBER 2020
www.ti.com
Table of Contents
Features...............................................................................1
Applications........................................................................1
Description..........................................................................1
1 Revision History.............................................................. 2
2 Pin Configuration and Functions...................................3
2.1 Pin Functions.............................................................. 3
3 Specifications.................................................................. 4
3.1 Absolute Maximum Ratings, LM2903-Q1 and
LM2903E-Q1.................................................................4
3.2 Absolute Maximum Ratings, LM2903B-Q1.................4
3.3 ESD Ratings, LM2903-Q1 and LM2903E-Q1.............4
3.4 ESD Ratings, LM2903B-Q1........................................4
3.5 Recommended Operating Conditions,
LM2903B-Q1.................................................................5
3.6 Recommended Operating Conditions, LM2903-Q1....5
3.7 Recommended Operating Conditions,
LM2903E-Q1.................................................................5
3.8 Thermal Information, LM2903-Q1 and
LM2903E-Q1.................................................................5
3.9 Thermal Information, LM2903B-Q1............................ 5
3.10 Electrical Characteristics LM2903B - Q1 ................. 6
3.11 Switching Characteristics LM2903B - Q1 .................6
3.12 Electrical Characteristics, LM2903-Q1 and
3.14 Typical Characteristics, LM2903-Q1 and
LM2903E-Q1 Only.........................................................8
3.15 Typical Characteristics, LM2903B-Q1 Only.............. 9
4 Detailed Description......................................................15
4.1 Overview...................................................................15
4.2 Functional Block Diagram.........................................15
4.3 Feature Description...................................................15
4.4 Device Functional Modes..........................................15
5 Application and Implementation..................................16
5.1 Application Information............................................. 16
5.2 Typical Application.................................................... 16
6 Power Supply Recommendations................................18
7 Layout.............................................................................18
7.1 Layout Guidelines..................................................... 18
7.2 Layout Example........................................................ 18
8 Device and Documentation Support............................18
8.1 Documentation Support............................................ 18
8.2 Receiving Notification of Documentation Updates....18
8.3 Support Resources................................................... 18
8.4 Trademarks...............................................................18
8.5 Electrostatic Discharge Caution................................19
8.6 Glossary....................................................................19
9 Mechanical, Packaging, and Orderable Information..20
LM2903E-Q1.................................................................7
3.13 Switching Characteristics, LM2903-Q1 and
LM2903E-Q1.................................................................7
1 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision I (June 2020) to Revision J (November 2020)
Page
•
•
•
Changed LM2903B-Q1 Minimum Recommmended Supply Voltage to 2V throughout the datasheet............... 1
Added Operating Virtual Temp to Abs Max Table for both versions................................................................... 4
Updated Supply Voltage vs Supply Current graph for 2V...................................................................................4
Changes from Revision H (January 2020) to Revision I (June 2020)
Page
•
•
•
•
Added Functional Safety text and links...............................................................................................................1
Added VSSOP package to Device Info list for "B"..............................................................................................1
Added DGK to "B" Thermal Table.......................................................................................................................5
Added text to Apps Overview section for ESD................................................................................................. 15
Changes from Revision G (November 2018) to Revision H (January 2020)
Page
•
•
•
•
Added LM2903B-Q1 to datasheet...................................................................................................................... 1
Added Device Information table. ........................................................................................................................1
Added "B" device graphs ...................................................................................................................................9
Changed incorrect input text in Feature Description in Apps Section...............................................................15
Changes from Revision F (May 2018) to Revision G (November 2018)
Page
Changed previous Q1 graphs to match new format .......................................................................................... 8
Added LM2903E-Q1 specific graphs..................................................................................................................8
•
•
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SLCS141J – MAY 2003 – REVISED NOVEMBER 2020
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2 Pin Configuration and Functions
1
2
3
4
1OUT
V
CC
8
7
6
5
1IN−
1IN+
GND
2OUT
2IN−
2IN+
Figure 2-1. D, DGK, DDF OR PW PACKAGE
Top View
8
V+
1OUT
1
2
Exposed
Thermal
Die Pad
on
1INœ
7
6
2OUT
2INœ
1IN+
GND
3
4
Underside
5
2IN+
Connect thermal pad directly to GND pin.
Figure 2-2. DSG Package
8-Pin WSON With Exposed Pad
Top View
2.1 Pin Functions
PIN
SOIC, VSSOP,
PDIP, SO, DDF and
TSSOP
I/O
DESCRIPTION
NAME
DSG
1OUT
1IN–
1IN+
GND
2IN+
2IN-
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
Output
Input
Input
—
Output pin of comparator 1
Negative input pin of comparator 1
Positive input pin of comparator 1
Ground
Input
Input
Output
—
Positive input pin of comparator 2
Negative input pin of comparator 2
Output pin of comparator 2
Positive Supply
2OUT
VCC
Thermal
Pad
—
PAD
—
Connect directly to GND pin
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SLCS141J – MAY 2003 – REVISED NOVEMBER 2020
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3 Specifications
3.1 Absolute Maximum Ratings, LM2903-Q1 and LM2903E-Q1
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
V
VCC
VCC
VID
VI
Supply voltage(2)
36
Supply voltage, LM2903E-Q1 Only(2)
Differential input voltage(3)
Input voltage range (either input)
Output voltage
32
V
–36
36
36
V
−0.3
V
VO
36
V
IO
Output current
20
mA
°C
s
TJ
Operating virtual-junction temperature
Duration of output short-circuit to ground
150
TSCG
Unlimited
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to GND.
(3) Differential voltages are at IN+ with respect to IN−.
3.2 Absolute Maximum Ratings, LM2903B-Q1
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
38
UNIT
V
Supply voltage: VS = (V+) – (V–)
-0.3
(2)
Differential input voltage : VID
±38
V
Input pins (IN+, IN–)
-0.3
-0.3
38
V
Current into input pins (IN+, IN–)
Output pin (OUT)
-50
mA
V
38
Output sink current
25
mA
°C
s
Operating virtual-junction temperature
Output short-circuit duration(3)
150
Unlimited
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) Differential voltages are at IN+ with respect to IN-
(3) Short circuits from outputs to V+ can cause excessive heating and eventual destruction.
3.3 ESD Ratings, LM2903-Q1 and LM2903E-Q1
MIN
MAX UNIT
Tstg
Storage temperature range
Human body model (HBM), per AEC Q100-002(1)
LM2903-Q1 Only
All pins
–65
150
°C
-1000 1000
V(ESD)
Electrostatic discharge
V
Charged device model (CDM), per AEC Q100-011
-750
750
(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
3.4 ESD Ratings, LM2903B-Q1
MIN
–65
MAX
UNIT
Tstg
Storage temperature range
150
°C
Human body model (HBM), per AEC Q100-002(1)
-2000 2000
-1000 1000
Electrostatic
discharge
V(ESD)
V
Charged device model (CDM), per AEC Q100-011
All pins
(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
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3.5 Recommended Operating Conditions, LM2903B-Q1
over operating free-air temperature range (unless otherwise noted)
MIN
2
MAX
36
UNIT
V
Supply voltage: VS = (V+) – (V–)
Ambient temperature, TA, LM2903B
Input voltage range, VIVR
–40
–0.1
125
°C
V
(V+) – 2
3.6 Recommended Operating Conditions, LM2903-Q1
over operating free-air temperature range (unless otherwise noted)
MIN
2
MAX
30
UNIT
V
VCC (non-V devices)
VCC (V devices)
2
32
V
TJ
Junction Temperature
-40
125
°C
3.7 Recommended Operating Conditions, LM2903E-Q1
over operating free-air temperature range (unless otherwise noted)
MIN
2
MAX
30
UNIT
V
VCC
TJ
Junction Temperature
-40
150
°C
3.8 Thermal Information, LM2903-Q1 and LM2903E-Q1
LM2903E-Q1
LM2903-Q1
PW
THERMAL METRIC(1)
DGK
(VSSOP)
PW
(TSSOP)
D
UNIT
(TSSOP)
(SOIC)
8 PINS
8 PINS
199.4
120.8
90.2
8 PINS
186.6
79.6
8 PINS
126.0
74.2
RθJA
Junction-to-ambient thermal resistance
178.9
70.7
RθJC(top) Junction-to-case (top) thermal resistance
RθJB
ψJT
Junction-to-board thermal resistance
108.9
11.9
116.5
17.7
66.4
°C/W
Junction-to-top characterization parameter
Junction-to-board characterization parameter
21.5
25.4
ψJB
107.3
119.1
114.9
65.9
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
3.9 Thermal Information, LM2903B-Q1
LM2903B-Q1
D
DGK
(VSSOP)
PW
(TSSOP)
DSG
(WSON)
DDF
(SOT-23)
THERMAL METRIC(1)
UNIT
(SOIC)
8 PINS
148.5
90.2
91.8
38.5
91.1
-
8 PINS
193.7
82.9
115.5
20.8
113.9
-
8 PINS
200.6
89.6
131.3
22.1
129.6
-
8 PINS
96.9
8 PINS
197.9
119.2
115.4
19.4
RθJA
Junction-to-ambient thermal resistance
RθJC(top) Junction-to-case (top) thermal resistance
119.0
63.1
RθJB
ψJT
Junction-to-board thermal resistance
°C/W
Junction-to-top characterization parameter
Junction-to-board characterization parameter
12.4
ψJB
63.0
113.7
-
RθJC(bot) Junction-to-case (bottom) thermal resistance
38.7
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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3.10 Electrical Characteristics LM2903B - Q1
VS = 5 V, VCM = (V–) ; TA = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
–2.5
–4
TYP
MAX
UNIT
mV
mV
mV
mV
nA
nA
nA
nA
V
VS = 5 to 36V
±0.37
2.5
VIO
VIO
IB
Input offset voltage
VS = 5 to 36V, TA = –40°C to +125°C
VS = 5 to 36V
4
–3.5
–5
±0.37
–3.5
±0.5
3.5
Input offset voltage, DGK
package only
VS = 5 to 36V, TA = –40°C to +125°C
5
–25
Input bias current
TA = –40°C to +125°C
–50
–10
–25
10
IOS
Input offset current
Common mode range(1)
TA = –40°C to +125°C
VS = 3 to 36V
25
(V–)
(V–)
(V+) – 1.5
(V+) – 2.0
VCM
VS = 3 to 36V, TA = –40°C to +125°C
V
Large signal differential
voltage amplification
VS = 15V, VO = 1.4V to 11.4V;
RL ≥ 15k to (V+)
AVD
50
200
110
V/mV
mV
ISINK ≤ 4mA, VID = -1V
400
550
Low level output Voltage
{swing from (V–)}
VOL
ISINK ≤ 4mA, VID = -1V
TA = –40°C to +125°C
mV
(V+) = VO = 5 V; VID = 1V
0.1
0.3
21
20
50
nA
nA
mA
µA
µA
High-level output leakage
current
IOH-LKG
IOL
(V+) = VO = 36V; VID = 1V
VOL = 1.5V; VID = -1V; VS = 5V
VS = 5 V, no load
Low level output current
6
400
550
600
800
Quiescent current (all
comparators)
IQ
VS = 36 V, no load, TA = –40°C to +125°C
(1) The voltage at any input should not be allowed to go negative by more than 0.3 V. The upper end of the input voltage range is VCC
−
1.5 V for one input, and the other input can exceed the VCC level; the comparator provides a proper output state. Either or both inputs
can go to 36 V without damage.
3.11 Switching Characteristics LM2903B - Q1
VS = 5V, VO_PULLUP = 5V, VCM = VS/2, CL = 15pF, RL = 5.1k Ohm, TA = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Propagation delay time, high-
to-low; TTL input signal (1)
tresponse
TTL input with Vref = 1.4V
300
ns
Propagation delay time, high-
tresponse
to-low; Small scale input signal Input overdrive = 5mV, Input step = 100mV
1000
ns
(1)
(1) High-to-low and low-to-high refers to the transition at the input.
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3.12 Electrical Characteristics, LM2903-Q1 and LM2903E-Q1
at specified free-air temperature, VCC = 5 V (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP MAX
UNIT
25°C
2
1
5
7
15
2
Non-A devices
A-suffix devices
VO = 1.4 V,
Full range
25°C
VIO Input offset voltage
VIC = VIC(min)
,
mV
VCC = 5 V to MAX(2)
Full range
25°C
4
50
200
IIO
Input offset current
Input bias current
VO = 1.4 V
VO = 1.4 V
nA
nA
V
Full range
25°C
−25 −250
−500
IIB
Full range
25°C
0 to VCC−1.5
0 to VCC−2
Common-mode input
voltage range(3)
VICR
Full range
Large-signal
VCC = 15 V,
AVD differential-voltage
amplification
VO = 1.4 V to 11.4 V,
RL ≥ 15 kΩ to VCC
25°C
25
100
V/mV
VOH = 5 V
25°C
Full range
25°C
0.1
50
1
nA
µA
High-level output
current
IOH
VID = 1 V
VOH = VCC MAX(2)
150
400
700
Low-level output
voltage
VOL
IOL = 4 mA,
VOL = 1.5 V,
RL = ∞
VID = −1 V
VID = −1 V
mV
mA
mA
Full range
Low-level output
current
IOL
25°C
6
VCC = 5 V
25°C
0.8
1
ICC Supply current
VCC = MAX(2)
Full range
2.5
(1) Full range (MIN or MAX) for LM2903-Q1 is −40°C to 125°C and −40°C to 150°C for the LM2903E-Q1 . All characteristics are
measured with zero common-mode input voltage, unless otherwise specified.
(2) VCC MAX = 30 V for non-V devices and 32 V for V-suffix devices.
(3) The voltage at either input or common-mode should not be allowed to go negative by more than 0.3 V. The upper end of the common-
mode voltage range is VCC+ − 1.5 V for the inverting input (−), and the non-inverting input (+) can exceed the VCC level; the
comparator provides a proper output state. Either or both inputs can go to 30 V (32V for V-suffix devices) without damage.
3.13 Switching Characteristics, LM2903-Q1 and LM2903E-Q1
VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
100-mV input step with 5-mV overdrive
TTL-level input step
TYP
1.3
UNIT
RL connected to 5 V through 5.1 kΩ,
CL = 15 pF(1) (2)
Response time
µs
0.3
(1) CL includes probe and jig capacitance.
(2) The response time specified is the interval between the input step function and the instant when the output crosses 1.4 V.
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3.14 Typical Characteristics, LM2903-Q1 and LM2903E-Q1 Only
1
0.8
0.6
0.4
0.2
0
1
0.8
0.6
0.4
0.2
0
-40C
0C
25C
85C
125C
-40C
25C
125C
150C
0
10
20
VCC (V)
30
40
0
10
20
VCC (V)
30
40
Figure 3-1. Supply Current vs. Supply Voltage
Figure 3-2. Supply Current vs. Supply Voltage LM2903E-Q1
Only
70
70
-40C
0C
25C
85C
125C
-40C
25C
85C
125C
150C
60
50
40
30
20
10
0
60
50
40
30
20
10
0
0
10
20
VCC (V)
30
40
0
10
20
VCC (V)
30
40
lm29
Figure 3-4. Input Bias Current vs. Supply Voltage LM2903E-Q1
Only
Figure 3-3. Input Bias Current vs. Supply Voltage
10
10
125C
150C
125C
25C
-40C
1
85C
25C
0C
1
0.1
-40C
0.1
0.01
0.01
0.001
0.001
0.01
0.1 1
Ouptut Sink Current, IO(mA)
10
100
0.01
0.1
1
Output Sinking Current , IO(mA)
10
100
Figure 3-5. Output Low Voltage vs. Output Current
Figure 3-6. Output Low Voltage vs. Output Current LM2903E-Q1
Only
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3.15 Typical Characteristics, LM2903B-Q1 Only
TA = 25°C, VS = 5 V, RPULLUP = 5.1k, CL = 15 pF, VCM = 0 V, VUNDERDRIVE = 100 mV, VOVERDRIVE = 100 mV unless otherwise
noted.
500
460
420
380
340
300
260
220
180
140
100
-40°C
0°C
25°C
85°C
125°C
VS=3V
-0.5 -0.25
0
0.25 0.5 0.75 1
Input Voltage (V)
1.25 1.5 1.75
2
Figure 3-8. Total Supply Current vs. Input Voltage at 3V
Figure 3-7. Total Supply Current vs. Supply Voltage
500
460
420
380
340
300
260
500
460
420
380
340
300
260
220
180
140
100
220
180
140
100
-40°C
0°C
25°C
85°C
125°C
-40°C
0°C
25°C
85°C
125°C
VS=3.3V
VS=5V
-0.5 -0.25
0
0.25 0.5 0.75 1
Input Voltage (V)
1.25 1.5 1.75
2
-0.5
0
0.5
1
1.5
Input Voltage (V)
2
2.5
3
3.5
4
Figure 3-9. Total Supply Current vs. Input Voltage at 3.3V
Figure 3-10. Total Supply Current vs. Input Voltage at 5V
500
460
420
380
340
300
260
550
510
470
430
390
350
310
220
270
-40°C
0°C
25°C
85°C
125°C
-40°C
0°C
25°C
85°C
125°C
180
230
140
190
VS=12V
VS=36V
100
150
-1
0
1
2
3
4
5
6
Input Voltage (V)
7
8
9
10 11
0
3
6
9
12 15 18 21 24 27 30 33 36
Input Voltage (V)
Figure 3-11. Total Supply Current vs. Input Voltage at 12V
Figure 3-12. Total Supply Current vs. Input Voltage at 36V
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3.15 Typical Characteristics, LM2903B-Q1 Only (continued)
TA = 25°C, VS = 5 V, RPULLUP = 5.1k, CL = 15 pF, VCM = 0 V, VUNDERDRIVE = 100 mV, VOVERDRIVE = 100 mV unless otherwise
noted.
2
1.5
1
2
1.5
1
0.5
0
0.5
0
-0.5
-1
-0.5
-1
-1.5
-2
VS = 3V
63 Channels
-1.5
-2
VS = 5V
62 Channels
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
Figure 3-13. Input Offset Voltage vs. Temperature at 3V
Figure 3-14. Input Offset Voltage vs. Temperature at 5V
2
2
1.5
1
1.5
1
0.5
0
0.5
0
-0.5
-1
-0.5
-1
-1.5
-2
VS = 12V
62 Channels
-1.5
-2
VS = 36V
62 Channels
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
Figure 3-15. Input Offset Voltage vs. Temperature at 12V
Figure 3-16. Input Offset Voltage vs. Temperature at 36
2
2
1.5
1
1.5
1
0.5
0
0.5
0
-0.5
-1
-0.5
-1
-1.5
-2
TA = -40°C
62 Channels
-1.5
-2
TA = 25°C
62 Channels
3
6
9
12 15 18 21 24 27 30 33 36
Supply Voltage (V)
3
6
9
12 15 18 21 24 27 30 33 36
Supply Voltage (V)
Figure 3-17. Input Offset Voltage vs. Supply Voltage at -40°C
Figure 3-18. Input Offset Voltage vs. Supply Voltage at 25°C
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3.15 Typical Characteristics, LM2903B-Q1 Only (continued)
TA = 25°C, VS = 5 V, RPULLUP = 5.1k, CL = 15 pF, VCM = 0 V, VUNDERDRIVE = 100 mV, VOVERDRIVE = 100 mV unless otherwise
noted.
2
1.5
1
2
1.5
1
0.5
0
0.5
0
-0.5
-1
-0.5
-1
TA = 125èC
62 Channels
-1.5
-2
TA = 85°C
62 Channels
-1.5
-2
3
6
9
12 15 18 21 24 27 30 33 36
Supply Voltage (V)
3
6
9
12 15 18 21 24 27 30 33 36
Supply Voltage (V)
Figure 3-19. Input Offset Voltage vs. Supply Voltage at 85°C
Figure 3-20. Input Offset Voltage vs. Supply Voltage at 125°C
0
0
125°C
85°C
VCM=0V
VS=5V
-0.5
-0.5
25°C
0°C
-40°C
-1
-1.5
-2
-1
-1.5
-2
-2.5
-3
-2.5
-3
125°C
85°C
25°C
0°C
-3.5
-4
-3.5
-4
-4.5
-5
-4.5
-5
-40°C
-0.5
0
0.5
1
1.5
2
Input Voltage (V)
2.5
3
3.5
3
6
9
12 15 18 21 24 27 30 33 36
Supply Voltage (V)
Figure 3-22. Input Bias Current vs. Input Voltage at 5V
Figure 3-21. Input Bias Current vs. Supply Voltage
0
1
VS=12V
-0.5
VS=36V
0.5
0
-1
-1.5
-2
-0.5
-1
-1.5
-2
-2.5
-3
-2.5
-3
125°C
-3.5
-4
125°C
85°C
25°C
0°C
85°C
25°C
0°C
-3.5
-4
-4.5
-5
-4.5
-5
-40°C
-40°C
-0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5
Input Voltage (V)
0
4
8
12
16 20
Input Voltage (V)
24
28
32
36
Figure 3-23. Input Bias Current vs. Input Voltage at 12V
Figure 3-24. Input Bias Current vs. Input Voltage at 36V
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3.15 Typical Characteristics, LM2903B-Q1 Only (continued)
TA = 25°C, VS = 5 V, RPULLUP = 5.1k, CL = 15 pF, VCM = 0 V, VUNDERDRIVE = 100 mV, VOVERDRIVE = 100 mV unless otherwise
noted.
10
1
10
1
VS = 3V
VS = 5V
100m
10m
1m
100m
10m
1m
125°C
85°C
25°C
0°C
125°C
85°C
25°C
0°C
-40°C
-40°C
10m
100m
1m
Output Sinking Current (A)
10m
100m
10m
100m
1m
Output Sinking Current (A)
10m
100m
Figure 3-25. Output Low Voltage vs. Output Sinking Current at
3V
Figure 3-26. Output Low Voltage vs. Output Sinking Current at
5V
10
10
VS = 12V
VS = 36V
1
1
100m
100m
125°C
125°C
10m
1m
10m
1m
85°C
25°C
0°C
85°C
25°C
0°C
-40°C
-40°C
10m
100m
1m
Output Sinking Current (A)
10m
100m
10m
100m
1m
Output Sinking Current (A)
10m
100m
Figure 3-27. Output Low Voltage vs. Output Sinking Current at
12V
Figure 3-28. Output Low Voltage vs.Output Sinking Current at
36V
100
100
50 Output set high
VOUT = VS
20
50 Output set high
VOUT = VS
20
10
5
10
5
2
1
2
1
0.5
0.5
0.2
0.1
0.2
0.1
0.05
0.05
0.02
0.01
0.02
0.01
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
Figure 3-29. Output High Leakage Current vs.Temperature at 5V
Figure 3-30. Output High Leakage Current vs. Temperature at
36V
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3.15 Typical Characteristics, LM2903B-Q1 Only (continued)
TA = 25°C, VS = 5 V, RPULLUP = 5.1k, CL = 15 pF, VCM = 0 V, VUNDERDRIVE = 100 mV, VOVERDRIVE = 100 mV unless otherwise
noted.
1000
900
800
700
600
500
400
300
200
100
0
1000
900
800
700
600
500
400
300
200
100
0
125°C
85°C
25°C
-40°C
125°C
85°C
25°C
-40°C
VS = 5V
VS = 5V
VCM = 0V
CL = 15pF
RP = 5.1k
VCM = 0V
CL = 15pF
RP = 5.1k
5
10
100
Input Overdrive (mV)
1000
5
10
100
Input Overdrive (mV)
1000
Figure 3-31. High to Low Propagation Delay vs. Input Overdrive Figure 3-32. Low to High Propagation Delay vs. Input Overdrive
Voltage, 5V Voltage, 5V
1000
900
800
700
600
500
400
300
200
100
0
1000
900
800
700
600
500
400
300
200
100
0
125°C
85°C
25°C
-40°C
125°C
85°C
25°C
-40°C
VS = 12V
VCM = 0V
CL = 15pF
RP = 5.1k
VS = 12V
VCM = 0V
CL = 15pF
RP = 5.1k
5
10
100
Input Overdrive (mV)
1000
5
10
100
Input Overdrive (mV)
1000
Figure 3-33. High to Low Propagation Delay vs. Input Overdrive Figure 3-34. Low to High Propagation Delay vs. Input Overdrive
Voltage, 12V Voltage, 12V
1000
900
800
700
600
500
400
300
200
100
0
1000
900
800
700
600
500
400
300
200
100
0
125°C
85°C
25°C
-40°C
125°C
85°C
25°C
-40°C
VS = 36V
VCM = 0V
CL = 15pF
RP = 5.1k
VS = 36V
VCM = 0V
CL = 15pF
RP = 5.1k
5
10
100
Input Overdrive (mV)
1000
5
10
100
Input Overdrive (mV)
1000
Figure 3-35. High to Low Propagation Delay vs. Input Overdrive Figure 3-36. Low to High Propagation Delay vs. Input Overdrive
Voltage, 36V
Voltage, 36V
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3.15 Typical Characteristics, LM2903B-Q1 Only (continued)
TA = 25°C, VS = 5 V, RPULLUP = 5.1k, CL = 15 pF, VCM = 0 V, VUNDERDRIVE = 100 mV, VOVERDRIVE = 100 mV unless otherwise
noted.
6
5
6
5
VREF = VCC/2
VREF = VCC/2
4
4
20mV Overdrive
20mV Overdrive
3
3
100mV
Overdrive
5mV
Overdrive
2
2
5mV Overdrive
100mV
Overdrive
1
1
0
0
-1
-1
-0.1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Time (ms)
1
1.1
-0.1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Time (ms)
1
1.1
Figure 3-37. Response Time for Various Overdrives, High-to-
Low Transition
Figure 3-38. Response Time for Various Overdrives, Low-to-
High Transition
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4 Detailed Description
4.1 Overview
The LM2903-Q1 family is a dual comparator with the ability to operate up to 36 V on the supply pin. This
standard device has proven ubiquity and versatility across a wide range of applications. This is due to it's very
wide supply voltages range (2 V to 36 V), low Iq and fast response.
This device is AEC-Q100 qualified and can operate over a wide temperature range of –40°C to 125°C (LM2903-
Q1 and LM2903B-Q1) or –40°C to 150°C (LM2903E-Q1).
The open-drain output allows the user to configure the output's logic low voltage (VOL) and can be utilized to
enable the comparator to be used in AND functionality.
The "B" versions add dedicated ESD protections on all the pins for improved ESD performance as well as
improved negative input voltage handling. Please see Application Note SNOAA35 for more information
4.2 Functional Block Diagram
V
CC
80-µA
Current Regulator
80 µA
10 µA
60 µA
10 µA
COMPONENT COUNT
Epi-FET
Diodes
1
2
2
Resistors
IN+
IN−
OUT
Transistors 30
GND
Figure 4-1. Schematic (Each Comparator)
4.3 Feature Description
LM2903-Q1 family consists of a PNP darlington pair input, allowing the device to operate with very high gain and
fast response with minimal input bias current. The input Darlington pair creates a limit on the input common
mode voltage capability, allowing LM2903-Q1 to accurately function from ground to VCC–1.5V differential input.
This is enables much head room for modern day supplies of 3.3 V and 5.0 V.
The output consists of an open drain NPN (pull-down or low side) transistor. The output NPN will sink current
when the negative input voltage is higher than the positive input voltage and the offset voltage. The VOL is
resistive and will scale with the output current. Please see Figure 3-3 in the Section 3.14 section for VOL values
with respect to the output current.
4.4 Device Functional Modes
4.4.1 Voltage Comparison
The LM2903-Q1 family operates solely as a voltage comparator, comparing the differential voltage between the
positive and negative pins and outputting a logic low or high impedance (logic high with pull-up) based on the
input differential polarity.
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5 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
5.1 Application Information
LM2903-Q1 will typically be used to compare a single signal to a reference or two signals against each other.
Many users take advantage of the open drain output to drive the comparison logic output to a logic voltage level
to an MCU or logic device. The wide supply range and high voltage capability makes LM2903Q1 optimal for level
shifting to a higher or lower voltage.
5.2 Typical Application
VLOGIC
Rpullup
VLOGIC
Rpullup
VSUP
VSUP
Vin
Vin+
Vin-
+
½ LM2903
+
½ LM2903
Vref
CL
CL
Figure 5-1. Single-ended and Differential Comparator Configurations
5.2.1 Design Requirements
For this design example, use the parameters listed in Table 5-1 as the input parameters.
Table 5-1. Design Parameters
DESIGN PARAMETER
Input Voltage Range
Supply Voltage
EXAMPLE VALUE
0 V to Vsup-1.5 V
2 V to 36 V
2 V to 36 V
1 µA to 20 mA
100 mV
Logic Supply Voltage
Output Current (RPULLUP
Input Overdrive Voltage
Reference Voltage
)
2.5 V
Load Capacitance (CL)
15 pF
5.2.2 Detailed Design Procedure
When using LM2903-Q1 family in a general comparator application, determine the following:
•
•
•
•
Input Voltage Range
Minimum Overdrive Voltage
Output and Drive Current
Response Time
5.2.2.1 Input Voltage Range
When choosing the input voltage range, the input common mode voltage range (V ICR) must be taken in to
account. If temperature operation is above or below 25°C the VICR can range from 0 V to VCC– 2.0 V. This limits
the input voltage range to as high as VCC– 2.0 V and as low as 0 V. Operation outside of this range can yield
incorrect comparisons.
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Below is a list of input voltage situation and their outcomes:
1. When both IN- and IN+ are both within the common mode range:
a. If IN- is higher than IN+ and the offset voltage, the output is low and the output transistor is sinking current
b. If IN- is lower than IN+ and the offset voltage, the output is high impedance and the output transistor is not
conducting
2. When IN- is higher than common mode and IN+ is within common mode, the output is low and the output
transistor is sinking current
3. When IN+ is higher than common mode and IN- is within common mode, the output is high impedance and
the output transistor is not conducting
4. When IN- and IN+ are both higher than common mode, the output is low and the output transistor is sinking
current
5.2.2.2 Minimum Overdrive Voltage
Overdrive Voltage is the differential voltage produced between the positive and negative inputs of the
comparator over the offset voltage (VIO). In order to make an accurate comparison the Overdrive Voltage (VOD
)
should be higher than the input offset voltage (VIO). Overdrive voltage can also determine the response time of
the comparator, with the response time decreasing with increasing overdrive. Figure 5-2 and Figure 5-3 show
positive and negative response times with respect to overdrive voltage.
5.2.2.3 Output and Drive Current
Output current is determined by the load/pull-up resistance and logic/pull-up voltage. The output current will
produce a output low voltage (VOL) from the comparator. In which VOL is proportional to the output current. Use
Figure 3-5 to determine VOL based on the output current.
The output current can also effect the transient response. More will be explained in the next section.
5.2.2.4 Response Time
The transient response can be determined by the load capacitance (CL), load/pull-up resistance (RPULLUP) and
equivalent collector-emitter resistance (RCE).
•
•
The positive response time (τp) is approximately τP ~ RPULLUP × CL
The negative response time (τN) is approximately τN ~ RCE × CL
– RCE can be determine by taking the slope of Figure 3-5 in it's linear region at the desired temperature, or
by dividing the VOL by Iout
5.2.3 Application Curves
The following curves were generated with 5 V on VCC and VLogic, RPULLUP = 5.1 kΩ, and 50 pF scope probe.
6
5
6
5
4
4
3
3
5mV OD
2
2
5mV OD
1
1
20mV OD
20mV OD
100mV OD
0
0
100mV OD
2.25
œ1
-0.25
œ1
0.25
0.75
1.25
1.75
œ0.25 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00
Time (usec)
Time (usec)
C004
C006
Figure 5-2. Response Time for Various Overdrives Figure 5-3. Response Time for Various Overdrives
(Positive Transition)
(Negative Transition)
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6 Power Supply Recommendations
For fast response and comparison applications with noisy or AC inputs, it is recommended to use a bypass
capacitor on the supply pin to reject any variation on the supply voltage. This variation can eat into the
comparator's input common mode range and create an inaccurate comparison.
7 Layout
7.1 Layout Guidelines
For accurate comparator applications without hysteresis it is important maintain a stable power supply with
minimized noise and glitches, which can affect the high level input common mode voltage range. In order to
achieve this, it is best to add a bypass capacitor between the supply voltage and ground. This should be
implemented on the positive power supply and negative supply (if available). If a negative supply is not being
used, do not put a capacitor between the IC's GND pin and system ground.
7.2 Layout Example
Ground
Bypass
Capacitor
0.1mF
Positive Supply
1
2
3
4
1OUT
1INÞ
1IN+
GND
8
7
6
5
V
CC
2OUT
2INÞ
2IN+
Negative Supply or Ground
Only needed
for dual power
supplies
0.1mF
Ground
Figure 7-1. LM2903Q1 Layout Example
8 Device and Documentation Support
8.1 Documentation Support
8.1.1 Related Documentation
LM2903B-Q1 Functional Safety FIT Rate, FMD and Pin FMA - SLCA005
Application Design Guidelines for LM339, LM393, TL331 Family Comparators - SNOAA35
Analog Engineers Circuit Cookbook: Amplifiers (See Comparators section) - SLYY137
8.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
8.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
8.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
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8.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
8.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
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9 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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24-Nov-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LM2903AVQDRG4Q1
LM2903AVQDRQ1
ACTIVE
SOIC
SOIC
D
D
8
8
8
8
2500
2500
2000
2000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
2903AVQ
ACTIVE
ACTIVE
ACTIVE
Green (RoHS
& no Sb/Br)
NIPDAU
NIPDAU
NIPDAU
2903AVQ
2903AVQ
2903AVQ
LM2903AVQPWRG4Q1
LM2903AVQPWRQ1
TSSOP
TSSOP
PW
PW
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
LM2903BQDDFRQ1
LM2903BQDGKRQ1
LM2903BQDRQ1
PREVIEW SOT-23-THIN
DDF
DGK
D
8
8
8
3000
2500
2500
TBD
TBD
Call TI
Call TI
Call TI
Call TI
-40 to 125
-40 to 125
-40 to 125
PREVIEW
ACTIVE
VSSOP
SOIC
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
2903BQ
2903BQ
LM2903BQPWRQ1
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
LM2903BWDSGRQ1
LM2903EPWRQ1
PREVIEW
ACTIVE
WSON
TSSOP
DSG
PW
8
8
3000
2000
TBD
Call TI
Call TI
-40 to 125
-40 to 150
Green (RoHS
& no Sb/Br)
NIPDAU
Level-2-260C-1 YEAR
2903Q0
KACQ
LM2903QDGKRQ1
LM2903QDRG4Q1
LM2903QDRQ1
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
VSSOP
SOIC
DGK
D
8
8
8
8
8
8
8
8
2500
2500
2500
2000
2000
2500
2500
2000
Green (RoHS
& no Sb/Br)
NIPDAUAG
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Green (RoHS
& no Sb/Br)
2903Q1
2903Q1
2903Q1
2903Q1
2903VQ1
2903VQ1
2903VQ
SOIC
D
Green (RoHS
& no Sb/Br)
LM2903QPWRG4Q1
LM2903QPWRQ1
LM2903VQDRG4Q1
LM2903VQDRQ1
TSSOP
TSSOP
SOIC
PW
PW
D
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
SOIC
D
Green (RoHS
& no Sb/Br)
LM2903VQPWRG4Q1
TSSOP
PW
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
24-Nov-2020
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LM2903VQPWRQ1
ACTIVE
TSSOP
WSON
PW
8
2000
Green (RoHS
& no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
-40 to 125
2903VQ
PLM2903BWDSGRQ1
PM2903BQDDFRQ1
PM2903BQDGKRQ1
ACTIVE
DSG
DDF
DGK
8
8
8
3000
3000
2500
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
-40 to 125
-40 to 125
-40 to 125
ACTIVE SOT-23-THIN
ACTIVE VSSOP
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
24-Nov-2020
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM2903-Q1, LM2903B-Q1 :
Catalog: LM2903, LM2903B
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Oct-2020
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM2903AVQDRQ1
SOIC
D
PW
PW
D
8
8
8
8
8
8
8
8
8
8
8
2500
2000
2000
2500
2000
2000
2500
2000
2000
2000
2000
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
12.5
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
6.4
7.0
7.0
6.4
7.0
7.0
5.3
7.0
7.0
7.0
7.0
5.2
3.6
3.6
5.2
3.6
3.6
3.4
3.6
3.6
3.6
3.6
2.1
1.6
1.6
2.1
1.6
1.6
1.4
1.6
1.6
1.6
1.6
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
LM2903AVQPWRG4Q1 TSSOP
LM2903AVQPWRQ1
LM2903BQDRQ1
TSSOP
SOIC
LM2903BQPWRQ1
LM2903EPWRQ1
TSSOP
TSSOP
VSSOP
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
DGK
PW
PW
PW
PW
LM2903QDGKRQ1
LM2903QPWRG4Q1
LM2903QPWRQ1
LM2903VQPWRG4Q1
LM2903VQPWRQ1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Oct-2020
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM2903AVQDRQ1
LM2903AVQPWRG4Q1
LM2903AVQPWRQ1
LM2903BQDRQ1
SOIC
D
PW
PW
D
8
8
8
8
8
8
8
8
8
8
8
2500
2000
2000
2500
2000
2000
2500
2000
2000
2000
2000
340.5
367.0
853.0
340.5
853.0
853.0
366.0
853.0
853.0
367.0
853.0
338.1
367.0
449.0
338.1
449.0
449.0
364.0
449.0
449.0
367.0
449.0
20.6
35.0
35.0
20.6
35.0
35.0
50.0
35.0
35.0
35.0
35.0
TSSOP
TSSOP
SOIC
LM2903BQPWRQ1
LM2903EPWRQ1
TSSOP
TSSOP
VSSOP
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
DGK
PW
PW
PW
PW
LM2903QDGKRQ1
LM2903QPWRG4Q1
LM2903QPWRQ1
LM2903VQPWRG4Q1
LM2903VQPWRQ1
Pack Materials-Page 2
PACKAGE OUTLINE
DDF0008A
SOT-23 - 1.1 mm max height
S
C
A
L
E
4
.
0
0
0
PLASTIC SMALL OUTLINE
C
2.95
2.65
SEATING PLANE
TYP
PIN 1 ID
AREA
0.1 C
A
6X 0.65
8
1
2.95
2.85
NOTE 3
2X
1.95
4
5
0.4
0.2
8X
0.1
C A
B
1.65
1.55
B
1.1 MAX
0.20
0.08
TYP
SEE DETAIL A
0.25
GAGE PLANE
0.1
0.0
0 - 8
0.6
0.3
DETAIL A
TYPICAL
4222047/B 11/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
www.ti.com
EXAMPLE BOARD LAYOUT
DDF0008A
SOT-23 - 1.1 mm max height
PLASTIC SMALL OUTLINE
8X (1.05)
SYMM
1
8
8X (0.45)
SYMM
6X (0.65)
5
4
(R0.05)
TYP
(2.6)
LAND PATTERN EXAMPLE
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4222047/B 11/2015
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DDF0008A
SOT-23 - 1.1 mm max height
PLASTIC SMALL OUTLINE
8X (1.05)
SYMM
(R0.05) TYP
8
1
8X (0.45)
SYMM
6X (0.65)
5
4
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4222047/B 11/2015
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.189-.197
[4.81-5.00]
NOTE 3
.150
[3.81]
4X (0 -15 )
4
5
8X .012-.020
[0.31-0.51]
B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.010 [0.25]
C A B
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 - 8
.016-.050
[0.41-1.27]
DETAIL A
TYPICAL
(.041)
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED
METAL
EXPOSED
METAL
.0028 MAX
[0.07]
.0028 MIN
[0.07]
ALL AROUND
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
GENERIC PACKAGE VIEW
DSG 8
2 x 2, 0.5 mm pitch
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4224783/A
www.ti.com
PACKAGE OUTLINE
PW0008A
TSSOP - 1.2 mm max height
S
C
A
L
E
2
.
8
0
0
SMALL OUTLINE PACKAGE
C
6.6
6.2
SEATING PLANE
TYP
PIN 1 ID
AREA
A
0.1 C
6X 0.65
8
5
1
3.1
2.9
NOTE 3
2X
1.95
4
0.30
0.19
8X
4.5
4.3
1.2 MAX
B
0.1
C A
B
NOTE 4
(0.15) TYP
SEE DETAIL A
0.25
GAGE PLANE
0.15
0.05
0.75
0.50
0 - 8
DETAIL A
TYPICAL
4221848/A 02/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0008A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
8X (1.5)
SYMM
8X (0.45)
(R0.05)
1
4
TYP
8
SYMM
6X (0.65)
5
(5.8)
LAND PATTERN EXAMPLE
SCALE:10X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4221848/A 02/2015
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0008A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
8X (1.5)
SYMM
(R0.05) TYP
8X (0.45)
1
4
8
SYMM
6X (0.65)
5
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:10X
4221848/A 02/2015
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
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AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
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