LM2759SD/NOPB [TI]

具有 I2C 兼容接口、1A 开关电容器 LED 闪光灯驱动器 | DQB | 12 | -30 to 85;
LM2759SD/NOPB
型号: LM2759SD/NOPB
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

具有 I2C 兼容接口、1A 开关电容器 LED 闪光灯驱动器 | DQB | 12 | -30 to 85

开关 驱动 闪光灯 电容器 驱动器
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LM2759  
www.ti.com  
SNVS577D JUNE 2008REVISED MAY 2013  
LM2759 1A Switched Capacitor Flash LED Driver with I2C Compatible Interface  
Check for Samples: LM2759  
1
FEATURES  
APPLICATIONS  
2
Up to 1A Output Current  
Solution Area < 22 mm2  
No Inductor Required  
90% Peak Efficiency  
Camera Flash in Cellular Phones  
DESCRIPTION  
LM2759 is an integrated low-noise, high-current  
switched capacitor DC/DC converter with a regulated  
current source. The device requires only four small  
ceramic capacitors making the total solution area less  
than 22 mm2 and the height less than 1 mm. The  
LM2759 is capable of driving loads up to 1A from a  
single-cell Li-Ion battery. Maximum efficiency is  
achieved over the input voltage range by actively  
selecting the proper gain based on the LED forward  
voltage and current requirements.  
Adaptive 1x, 1.5x and 2x Gains for Maximum  
Efficiency  
Load Disconnect in Shutdown  
Accurate Input Current Control During Gain  
Transitions  
Flash Time-Out  
TX Input Pin Ensures Synchronization with RF  
Power Amplifier Pulse  
The LED current can be programmed up to 1A via an  
I2C-compatible interface, along with eight selectable  
Flash Time-Out durations. One high-current Flash  
LED can be driven either in a high-power Flash mode  
or a low-power Torch mode. The Strobe pin allows  
the flash to be toggled via a Flash enable signal from  
a camera module. The TX input pin limits the Flash  
LED current to the Torch current level during a RF  
PA pulse, to reduce high loads on the battery.  
Internal soft-start circuitry limits the amount of inrush  
current during start-up.  
Torch, Flash, and Indicator Modes  
External Flash Enable via Strobe Input Pin  
Strobe Input Disable via I2C  
Programmable Flash Pulse Duration, and  
Torch and Flash Currents via I2C-Compatible  
Interface  
1MHz Constant Frequency Operation  
Low Profile 12–Pin WSON (3mm x 3mm x  
0.8mm)  
LM2759 is offered in a small 12-pin thermally  
enhanced WSON package.  
Typical Application Circuit  
I
= Up to 1A  
LED  
V
= 3.0V - 5.5V  
IN  
V
V
IN  
OUT  
C +  
1
2.2 µF  
C
4.7 µF  
OUT  
C
IN  
D
1
2.2 µF  
2.2 µF  
C
1
C -  
1
I
SINK  
C +  
2
LM2759  
C
2
C -  
2
Strobe  
TX  
SDA  
SCL  
GND  
TDK: 2.2 µF œ C1608X5R1C225  
4.7 µF œ C2012X5R1C475  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2008–2013, Texas Instruments Incorporated  
LM2759  
SNVS577D JUNE 2008REVISED MAY 2013  
www.ti.com  
Connection Diagram  
1
2
3
4
5
6
12  
11  
10  
9
12  
11  
10  
9
1
2
3
4
5
6
8
8
7
7
Die-Attach Pad: GND  
Die-Attach Pad: GND  
Top View  
Bottom View  
Figure 1. 12-Pin WSON Package  
3mm x 3mm x 0.8mm  
Package Number DQB0012A  
PIN DESCRIPTIONS  
Pin  
10  
3
Name  
VIN  
Description  
Input voltage connection.  
VOUT  
C1  
Charge pump regulated output.  
12  
11  
2
C1+  
Flying capacitor connections.  
C2+  
1
C2−  
4
GND  
ISINK  
SDA  
Strobe  
Ground connection.  
6
Regulated current sink input.  
Serial data I/O pin.  
8
7
Manual flash enable pin. Flash will remain on for the duration that the Strobe pin is held high or  
when the Flash Timeout occurs, whichever comes first.  
5
9
TX  
Transmission pulse Flash interrupt pin. High = RF PA pulse active, LED current reduced to Torch  
level, Low = RF PA pulse off, LED at full programmed current level.  
SCL  
Serial clock pin.  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
2
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SNVS577D JUNE 2008REVISED MAY 2013  
Absolute Maximum Ratings(1)(2)(3)  
VIN pin: Voltage to GND  
-0.3V to 6.0V  
Strobe, TX, SDA, SCL, ISINK pins: Voltage to GND  
-0.3V to (VIN + 0.3V)  
w/ 6.0V max  
Continuous Power Dissipation(4)  
Internally Limited  
150°C  
Junction Temperature (TJ-MAX  
Storage Temperature Range  
)
-65°C to 150°C  
(5)  
Maximum Lead Temp. (Soldering)  
ESD Rating  
Human Body Model(6)  
2.5KV  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under  
which operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For ensured performance limits  
and associated test conditions, see the Electrical Characteristics tables.  
(2) All voltages are with respect to the potential to the GND pin.  
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and  
specifications.  
(4) Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=150°C (typ.) and  
disengages at TJ = 120°C (typ.).  
(5) For detailed soldering specifications and information, please refer to Texas Instruments Application Note AN-1187 (SNOA401).  
(6) The Human body model is a 100 pF capacitor discharged through a 1.5 kresistor into each pin. (MIL-STD-883 3015.7)  
Operating Ratings(1)(2)  
Input Voltage Range  
2.7V to 5.5V  
2.0V to 4.0V  
LED Voltage Range  
Junction Temperature Range (TJ)  
Ambient Temperature Range (TA)(3)  
-30°C to +125°C  
-30°C to +85°C  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under  
which operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For ensured performance limits  
and associated test conditions, see the Electrical Characteristics tables.  
(2) All voltages are with respect to the potential to the GND pin.  
(3) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may  
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operation junction temperature (TJ-MAX-OP  
125ºC), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the  
part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP - (θJA × PD-MAX).  
=
Thermal Information  
Junction-to-Ambient Thermal Resistance, (θJA),  
(1)  
36.7°C/W  
(1) Junction-to-ambient thermal resistance (θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set  
forth in the JEDEC standard JESD51-7. The test board is a 4–layer FR-4 board measuring 102 mm x 76 mm x 1.6 mm with a 2x1 array  
of thermal vias. The ground plane on the board is 50 mm x 50 mm. Thickness of copper layers are 53µm/35µm/35µm/53µm  
(1.5oz/1oz/1oz/1.5oz). Ambient temperature in simulation is 22°C, still air. Power dissipation is 1W.The value of θJA of this product in the  
WSON package could fall in a range as wide as 30ºC/W to 150ºC/W (if not wider), depending on PWB material, layout, and  
environmental conditions. In applications where high maximum power dissipation exists (high VIN, high IOUT), special care must be paid  
to thermal dissipation issues. For more information on these topics, please refer to Application Note AN-1187 (SNOA401): and the  
Power Efficiency and Power Dissipation section of this datasheet.  
Copyright © 2008–2013, Texas Instruments Incorporated  
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Electrical Characteristics(1)(2)  
Limits in standard typeface are for TJ = 25°C. Limits in boldface type apply over the full operating junction temperature range  
(-30°C TJ +125 °C). Unless otherwise noted, specifications apply to the LM2759 Typical Application Circuit (pg.1) with VIN  
= 3.6V, VTX = 0V, VSTROBE = 0V, CIN = C1 = C2 = 2.2 µF, COUT = 4.7 µF.(3)  
Symbol  
ILED  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
LED Current Sink Accuracy Flash Mode  
198  
220  
242  
mA  
ADDR xB0 = 0x02  
10%  
+10%  
IFLASH  
VGDX  
VOUT  
Max Flash Output Current  
Flash Mode  
ADDR xB0 = 0x0F  
1
A
Gain Transition Voltage  
Threshold on ISINK  
ILED = 500mA  
(VISINK falling)  
350  
mV  
(4)  
Output Voltage  
1x Mode, IOUT = 0 mA (VIN >VOUT  
1.5x Mode, IOUT = 0 mA  
)
4.7  
4.7  
4.9  
4.9  
5.4  
V
2x Mode, IOUT = 0 mA  
5.1  
ROUT  
x1 Mode Output Impedance IOUT = 200mA, VIN = 3.3V  
0.33  
1.9  
1.5x Mode Output  
Impedance  
IOUT = 500mA, VIN = 3.3V  
x2 Mode Output Impedance  
Switching Frequency  
Input Logic High  
2.25  
1
FSW  
VIH  
VIL  
2.7V VIN 5.5V  
0.7  
1.3  
MHz  
V
Pins: TX, Strobe  
1.26  
Input Logic Low  
Pins: TX, Strobe  
0.7  
0.9  
4.0  
7.0  
9.7  
V
IOUT = 0 mA, 1x Mode  
IOUT = 0 mA, 1.5x Mode  
IOUT = 0 mA, 2x Mode  
0.6  
3.4  
5.9  
5.8  
IQ  
Quiescent Current  
Shutdown Current  
mA  
µA  
ISD  
Device Disabled  
2.7V VIN 5.5V  
I2C Compatible Interface Voltage Specifications (SCL, SDA)  
VIL  
Input Logic Low “0”  
Input Logic High “1'  
Output Logic Low “0”  
2.7V VIN 5.5V  
2.7V VIN 5.5V  
ILOAD = 3 mA  
0.72  
300  
V
V
VIH  
VOL  
1.25  
mV  
I2C Compatible Interface Timing Voltage Specifications (SCL, SDA)(5)  
t1  
t2  
SCL (Clock Period)  
2.5  
µs  
ns  
Data in Setup Time to SCL  
High  
100  
t3  
t4  
t5  
Data Out Stable After SCL  
Low  
0
ns  
ns  
ns  
SDA Low Setup Time to  
SCL Low (Start)  
100  
100  
SDA High Hold Time After  
SCL High (Stop)  
(1) All voltages are with respect to the potential to the GND pin.  
(2) Min and Max limits are specified by design, test, or statistical analysis. Typical (Typ) numbers are not ensured, but do represent the  
most likely norm. Unless otherwise specified, conditions for Typ specifications are: VIN = 3.6V and TA = 25°C.  
(3) CIN, COUT, C1, C2: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.  
(4) For input voltage below the regulation target during the gain of 1x, the output voltage will typically be equal to the input voltage.  
(5) SCL and SDA should be glitch-free in order for proper brightness control to be realized.  
4
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Block Diagram  
4.7 µF  
C
OUT  
FLASH  
LED  
D
MODULE  
V
OUT  
Gain  
Control  
V
IN  
Thermal  
Shutdown  
V
REF  
2.2 µF  
C
IN  
FLASH  
Timeout  
C1+  
V
REG  
OUT  
GND  
Current  
Control  
2.2 µF  
C1-  
STROBE  
TX  
1x,1.5x,  
2x  
Charge  
Pump  
C2+  
2.2 µF  
2
Power  
on Reset  
I C Control  
Logic  
C2-  
LM2759  
SDA  
SCL  
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Typical Performance Characteristics  
Unless otherwise specified: TA = 25°C, VIN = 3.6V, CIN = C1 = C2 = 2.2µF, COUT = 4.7µF. Capacitors are low-ESR multi-layer  
ceramic capacitors (MLCC's). Luxeon PWF3 Flash LED.  
Efficiency  
Input Current  
vs  
vs  
VIN  
VIN  
Figure 2.  
Figure 3.  
Quiescent Current  
vs  
VIN, Gain = 1X  
Quiescent Current  
vs  
VIN, Gain = 2X  
Figure 4.  
Figure 5.  
ILED  
vs  
VISINK  
Shutdown Current  
vs  
VIN  
Figure 6.  
Figure 7.  
6
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Typical Performance Characteristics (continued)  
Unless otherwise specified: TA = 25°C, VIN = 3.6V, CIN = C1 = C2 = 2.2µF, COUT = 4.7µF. Capacitors are low-ESR multi-layer  
ceramic capacitors (MLCC's). Luxeon PWF3 Flash LED.  
Oscillator Frequency  
vs  
VIN  
Torch Code Levels  
Figure 8.  
Figure 9.  
Flash Code Levels  
Shutdown to Torch Mode, 100mA  
CH1: SDA; Scale: 2V/Div, DC Coupled  
CH2: VOUT; Scale: 2V/Div, DC Coupled  
CH3: IIN; Scale: 100mA/Div, DC Coupled  
CH4: ILED; Scale: 100mA/Div, DC Coupled  
Time scale: 400µs/Div  
Figure 10.  
Figure 11.  
Shutdown to Flash Mode, 1A  
Torch to Flash Mode, 100mA to 1A  
CH1: SDA; Scale: 2V/Div, DC Coupled  
CH2: VOUT; Scale: 2V/Div, DC Coupled  
CH3: IIN; Scale: 1A/Div, DC Coupled  
CH4: ILED; Scale: 1A/Div, DC Coupled  
CH1: SDA; Scale: 2V/Div, DC Coupled  
CH2: VOUT; Scale: 2V/Div, DC Coupled  
CH3: IIN; Scale: 1A/Div, DC Coupled  
CH4: ILED; Scale: 1A/Div, DC Coupled  
Time scale: 1ms/Div  
Time scale: 1ms/Div  
Figure 12.  
Figure 13.  
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Typical Performance Characteristics (continued)  
Unless otherwise specified: TA = 25°C, VIN = 3.6V, CIN = C1 = C2 = 2.2µF, COUT = 4.7µF. Capacitors are low-ESR multi-layer  
ceramic capacitors (MLCC's). Luxeon PWF3 Flash LED.  
Flash Timeout, Timeout Code (x03) = 325ms  
Torch Level (x0F) = 180mA, Flash Level (x05) = 410mA  
CH1(bottom): IIN; Scale: 200mA/Div, DC Coupled  
CH2(middle): SDA; Scale: 2V/Div, DC Coupled  
CH3(top): VOUT; Scale: 2V/Div, DC Coupled  
Time scale: 100ms/Div  
Figure 14.  
8
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APPLICATION INFORMATION  
CIRCUIT DESCRIPTION  
The LM2759 is an adaptive CMOS charge pump with gains of 1x, 1.5x, and 2x, optimized for driving Flash LEDs  
in camera phones and other portable applications. It provides a constant current of up to 1A (typ.) for Flash mode  
and 180 mA (typ.) for Torch mode.  
The LM2759 has selectable modes including Flash, Torch, Indicator and Shutdown. Flash mode for the LM2759  
can also be enabled via the Strobe input pin. The LED is driven from VOUT and connected to the current sink.  
The LED drive current and operating modes are programmed via an I2C compatible interface. The LM2759  
adaptively selects the next highest gain mode when needed to maintain the programmed LED current level.  
To prevent a high battery load condition during a simultaneous RF PA transmission and Flash event, LM2759  
has a Flash interrupt pin (TX) to reduce the LED current to the programmed Torch current level for the duration  
of the RF PA transmission pulse.  
CHARGE PUMP AND GAIN TRANSITIONS  
The input to the 1x, 1.5x, 2x charge pump is connected to the VIN pin, and the loosely regulated output of the  
charge pump is connected to the VOUT pin. In 1x mode, as long as the input voltage is less than 4.7V (typ.), the  
output voltage is approximately equal to the input voltage. When the input voltage is over 4.7V (typ.) the output  
voltage is regulated to 4.7V (typ.). In 1.5x mode, the output voltage is regulated to 4.7V (typ.) over entire input  
voltage range. For the gain of 2x, the output voltage is regulated to 5.1V (typ.). When under load, the voltage at  
VOUT can be less than the target regulation voltage while the charge pump is still in closed loop operation. This is  
due to the load regulation topology of the LM2759.  
The charge pump’s gain is selected according to the headroom voltage across the current sink of LM2759. When  
the headroom voltage VGDX (at the LED cathode) drops below 350 mV (typ.) the charge pump gain transitions to  
the next available higher gain mode. Once the charge pump transitions to a higher gain, it will remain at that gain  
for as long as the device remains enabled. Shutting down and then re-enabling the device resets the gain mode  
to the minimum gain required to maintain the load.  
SOFT START  
The LM2759 contains internal soft-start circuitry to limit inrush currents when the part is enabled. Soft start is  
implemented internally with a controlled turn-on of the internal voltage reference.  
CURRENT LIMIT PROTECTION  
The LM2759 charge pump contains current limit protection circuitry that protects the device during VOUT fault  
conditions where excessive current is drawn. Output current is limited to 1.4A typically.  
LOGIC CONTROL PINS  
LM2759 has two asynchronous logic pins, Strobe and TX. These logic inputs function according to the table  
below:  
TX  
STROBE  
FUNCTION  
0
0
Current I2C programmed state (Off, Torch,  
Flash, Indicator)  
1
0
Current I2C programmed state (Off, Torch,  
Flash, Indicator). If Flash is enabled via I2C  
and TX is logic High, the LED current will be  
at the programmed Torch level.  
0
1
1
1
Flash Mode (Total LED "ON" Duration limited  
by Flash Timeout)  
Torch Mode (Total LED "ON" Duration limited  
by Flash Timeout)  
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I2C COMPATIBLE INTERFACE  
START AND STOP CONDITIONS  
START and STOP conditions classify the beginning and the end of the I2C session. A START condition is  
defined as SDA signal transitioning from HIGH to LOW while SCL line is HIGH. A STOP condition is defined as  
the SDA transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and  
STOP conditions. The I2C bus is considered to be busy after a START condition and free after a STOP condition.  
During data transmission, the I2C master can generate repeated START conditions. First START and repeated  
START conditions are equivalent, function-wise.  
SDA  
SCL  
S
P
S
STOP condition  
TART condition  
Figure 15. Start and Stop Conditions  
DATA VALIDITY  
The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, state of  
the data line can only be changed when SCL is LOW.  
SCL  
SDA  
data  
change  
allowed  
data  
change  
allowed  
data  
valid  
data  
change  
allowed  
data  
valid  
Figure 16. Data Validity Diagram  
A pull-up resistor between the controller's VIO line and SDA must be greater than [(VIO-VOL) / 3.5mA] to meet  
the VOL requirement on SDA. Using a larger pull-up resistor results in lower switching current with slower edges,  
while using a smaller pull-up results in higher switching currents with faster edges.  
TRANSFERING DATA  
Every byte put on the SDA line must be eight bits long, with the most significant bit (MSB) transferred first. Each  
byte of data has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated by the  
master. The master releases the SDA line (HIGH) during the acknowledge clock pulse. The LM2759 pulls down  
the SDA line during the 9th clock pulse, signifying an acknowledge. The LM2759 generates an acknowledge  
after each byte is received.  
After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an  
eighth bit which is a data direction bit (R/W). The LM2759 address is 53h. For the eighth bit, a “0” indicates a  
WRITE and a “1” indicates a READ. The second byte selects the register to which the data will be written. The  
third byte contains data to write to the selected register.  
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ack from slave  
ack from slave  
ack from slave  
start msb Chip Address lsb  
w
ack  
msb Register Add lsb  
ack  
msb DATA lsb  
ack stop  
SCL  
SDA  
start  
Id = 53h  
w
ack  
addr = 10h  
ack  
data h‘03 (Flash)  
ack stop  
w = write (SDA = "0")  
r = read (SDA = "1")  
ack = acknowledge (SDA pulled down by either master or slave)  
id = chip address, 53h for LM2759  
Figure 17. Write Cycle  
I2C COMPATIBLE CHIP ADDRESS  
The chip address for LM2759 is 1010011, or 53h.  
MSB  
LSB  
ADR5  
bit6  
ADR6  
bit7  
ADR4  
bit5  
ADR3  
bit4  
ADR2  
bit3  
ADR1  
bit2  
ADR0  
bit1  
R/W  
bit0  
0
0
1  
0
1  
1
1
2
I C SLAVE address (chip address)  
INTERNAL REGISTERS  
General Purpose  
Register Address: 0x10  
MSB  
LSB  
1
1
1
1
G4  
G2  
G1  
G0  
bit7  
bit6  
bit5  
bit4  
bit3  
bit2  
bit1  
bit0  
Torch Current  
Register Address: 0xA0  
MSB  
LSB  
1
1
1
1
A3  
A2  
A1  
A0  
bit7  
bit6  
bit5  
bit4  
bit3  
bit2  
bit1  
bit0  
Flash Current  
Register Address: 0xB0  
MSB  
LSB  
1
1
1
1
B3  
B2  
B1  
B0  
bit7  
bit6  
bit5  
bit4  
bit3  
bit2  
bit1  
bit0  
Flash Timeout Duration  
Register Address: 0xC0  
MSB  
LSB  
1
1
1
1
1
C2  
C1  
C0  
bit7  
bit6  
bit5  
bit4  
bit3  
bit2  
bit1  
bit0  
Power On Value  
(lowest 4 bits)  
Register  
Internal Hex Address  
General Purpose Register  
Flash Current Register  
Torch Current Register  
10h  
B0h  
A0h  
0000  
1010  
0111  
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Power On Value  
(lowest 4 bits)  
Register  
Internal Hex Address  
Flash Timeout Duration Register  
C0h  
1011  
GENERAL PURPOSE REGISTER AND STROBE INHIBIT FUNCTION  
The general purpose register (x10) is used set the mode of operation for the LM2759. The selectable operating  
modes using the lower 4 bits in the general purpose register are listed in the table below.  
The Strobe Input Pin can be disabled via I2C to ignore external signals into this pin when desired. This function is  
implemented through bit 3 of the General Purpose Register (See table below). In the default state, input signals  
on the Strobe Input are enabled. (Bit3 = “0”, inputs into the Strobe Pin are not inhibited).  
Table 1. General Purpose Register (Reg x10)  
Bit3  
X
Bit2  
X
Bit1  
X
Bit0  
0
Mode  
Shutdown  
X
0
0
1
Torch  
X
X
1
1
Flash  
X
1
0
1
Indicator (Lowest Torch Level)  
Inhibit Inputs into the Strobe Pin  
1
X
X
X
SETTING LED CURRENT  
The current through the LED is set by programming the appropriate register with the desired current level code  
for Flash and Torch. The time that Flash mode is active is dependent on the lesser of the duration that it is set to  
"ON" (via I2C or the Strobe pin), or the duration of the Flash Timeout. Use the tables below to select the desired  
current level.  
Using the part in conditions where the junction temperature might rise above the rated maximum requires that  
the operating ranges and/or conditions be de-rated. The printed circuit board also must be carefully laid out to  
account for high thermal dissipation in the part.  
Table 2. Flash Current Table (Reg xB0)  
CODE (Hex)  
FLASH CURRENT (mA)  
00  
01  
02  
03  
04  
05  
06  
07  
08  
09  
0A  
0B  
0C  
0D  
0E  
0F  
80  
150  
220  
280  
350  
410  
470  
530  
590  
650  
710  
770  
830  
890  
950  
1010  
12  
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Table 3. Torch Current Table (Reg xA0)  
CODE (Hex)  
TORCH CURRENT (mA)  
00  
01  
02  
03  
04  
05  
06  
07  
08  
09  
0A  
0B  
0C  
0D  
0E  
0F  
15  
30  
40  
50  
65  
80  
90  
100  
110  
120  
130  
140  
150  
160  
170  
180  
FLASH TIME-OUT FEATURE  
Time-out Protection Circuitry disables the current sink when either the Strobe pin is held at logic high or the  
Flash mode is enabled via the I2C compatible interface longer than the programmed timeout duration. This  
prevents the device from self-heating due to the high power dissipation during Flash conditions. During the time-  
out condition, voltage will still be present on VOUT but the current sink will be shut off, resulting in no current  
through the Flash LED. When the device goes into a time-out condition, disabling and then re-enabling the  
device will reset the time-out. Use the table below to set the desired Flash timeout duration.  
Table 4. Flash Timeout Duration (Reg xC0)  
CODE (Hex)  
TIME (ms)  
60  
00  
01  
02  
03  
04  
05  
06  
07  
125  
250  
375  
500  
625  
750  
1100  
CAPACITOR SELECTION  
The LM2759 requires 4 external capacitors for proper operation. Surface-mount multi-layer ceramic capacitors  
are recommended. These capacitors are small, inexpensive and have very low equivalent series resistance (ESR  
<20 mtyp.). Tantalum capacitors, OS-CON capacitors, and aluminum electrolytic capacitors are not  
recommended for use with the LM2759 due to their high ESR, as compared to ceramic capacitors. For most  
applications, ceramic capacitors with X7R or X5R temperature characteristic are preferred for use with the  
LM2759. These capacitors have tight capacitance tolerance (as good as ±10%) and hold their value over  
temperature (X7R: ±15% over -55°C to 125°C; X5R: ±15% over -55°C to 85°C). Capacitors with Y5V or Z5U  
temperature characteristic are generally not recommended for use with the LM2759. Capacitors with these  
temperature characteristics typically have wide capacitance tolerance (+80%, -20%) and vary significantly over  
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temperature (Y5V: +22%, -82% over -30°C to +85°C range; Z5U: +22%, -56% over +10°C to +85°C range).  
Under some conditions, a nominal 1 μF Y5V or Z5U capacitor could have a capacitance of only 0.1 μF. Such  
detrimental deviation is likely to cause Y5V and Z5U capacitors to fail to meet the minimum capacitance  
requirements of the LM2759. The voltage rating of the output capacitor should be 6.3V or more. For example, a  
6.3V 0603 4.7 μF output capacitor (TDK C1608X5R0J475) is acceptable for use with the LM2759, as long as the  
capacitance on the output does not fall below a minimum of 3μF in the intended application. All other capacitors  
should have a voltage rating at or above the maximum input voltage of the application and should have a  
minimum capacitance of 1 μF.  
Table 5. Suggested Capacitors and Suppliers  
MFG Part No.  
4.7 µF for COUT  
Type  
MFG  
Voltage Rating  
Case Size Inch (mm)  
C1608X5R0J475  
JMK107BJ475  
Ceramic X5R  
Ceramic X5R  
TDK  
6.3V  
6.3V  
0603 (1608)  
0603 (1608)  
Taiyo-Yuden  
2.2 µF for C1, C2, CIN  
C1608X5R0J225  
JMK107BJ225  
Ceramic X5R  
Ceramic X5R  
TDK  
6.3V  
6.3V  
0603 (1608)  
0603 (1608)  
Taiyo-Yuden  
POWER EFFICIENCY  
Efficiency of LED drivers is commonly taken to be the ratio of power consumed by the LED (PLED) to the power  
drawn at the input of the part (PIN). With a 1x, 1.5x, 2x charge pump, the input current is equal to the charge  
pump gain times the output current (total LED current). The efficiency of the LM2759 can be predicted as follows:  
PLED = VLED × ILED  
PIN = VIN × IIN  
(1)  
(2)  
(3)  
(4)  
PIN = VIN × (Gain × ILED + IQ)  
E = (PLED ÷ PIN)  
For a simple approximation, the current consumed by internal circuitry (IQ) can be neglected, and the resulting  
efficiency will become:  
E = VLED ÷ (VIN × Gain)  
(5)  
Neglecting IQ will result in a slightly higher efficiency prediction, but this impact will be negligible due to the value  
of IQ being very low compared to the typical Torch and Flash current levels (100mA - 1A). It is also worth noting  
that efficiency as defined here is in part dependent on LED voltage. Variation in LED voltage does not affect  
power consumed by the circuit and typically does not relate to the brightness of the LED. For an advanced  
analysis, it is recommended that power consumed by the circuit (VIN x IIN) be evaluated rather than power  
efficiency.  
THERMAL PROTECTION  
Internal thermal protection circuitry disables the LM2759 when the junction temperature exceeds 150°C (typ.).  
This feature protects the device from being damaged by high die temperatures that might otherwise result from  
excessive power dissipation. The device will recover and operate normally when the junction temperature falls  
below 120°C (typ.). It is important that the board layout provide good thermal conduction to keep the junction  
temperature within the specified operating ratings.  
POWER DISSIPATION  
The power dissipation (PDISSIPATION) and junction temperature (TJ) can be approximated with the equations  
below. PIN is the power generated by the 1x, 1.5x, 2x charge pump, PLED is the power consumed by the LED, TA  
is the ambient temperature, and θJA is the junction-to-ambient thermal resistance for the 12 pin WSON package.  
VIN is the input voltage to the LM2759, VLED is the nominal LED forward voltage, and ILED is the programmed  
LED current.  
PDISSIPATION = PIN - PLED  
(6)  
(7)  
(8)  
= (Gain × VIN × ILED) (VLED × ILED  
)
TJ = TA + (PDISSIPATION × θJA)  
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The junction temperature rating takes precedence over the ambient temperature rating. The LM2759 may be  
operated outside the ambient temperature rating, so long as the junction temperature of the device does not  
exceed the maximum operating rating of 105°C. The maximum ambient temperature rating must be derated in  
applications where high power dissipation and/or poor thermal resistance causes the junction temperature to  
exceed 105°C.  
MAXIMUM OUTPUT CURRENT  
The maximum LED current that can be used for a particular application depends on the rated forward voltage of  
the LED used, the input voltage range of the application, and the Gain mode of the LM2759’s charge pump. The  
following equation can be used to approximate the relationship between the maximum LED current, the LED  
forward voltage, the minimum input voltage, and the charge pump gain:  
(VIN_MIN x Gain) > (VF + VHR) + (ILED x ROUT_GAIN  
)
(9)  
VHR or the voltage required across the current sink to remain in regulation can be approximated by (ILED x KHR),  
where KHR is 0.8 mV/mA (typ). ROUT_GAIN is the output impedance of the charge pump according to its gain  
mode. When using the equation above, keep in mind that the (VF + VHR) portion of the equation can not be  
greater than the nominal output regulation voltage for a particular gain. In other words, when making calculations  
for an application where the term (VF + VHR) is higher than a particular gain’s regulation voltage, the next higher  
gain level must be used for the calculation.  
Example: VF = 4V @ 1A, Charge Pump in the Gain of 2x with a ROUT of 2.25(typ.)  
VIN_MIN > [(4V + 0.8V) + (1A x 2.25) ] ÷ 2  
VIN_MIN > 3.53V (typ.)  
The maximum power dissipation in the LM2759 must also be taken into account when selecting the conditions  
for an application, such that the junction temperature of the device never exceeds its rated maximum. The input  
voltage range, operating temperature range, and/or current level of the application may have to be adjusted to  
keep the LM2759 within normal operating ratings.  
BOARD LAYOUT CONSIDERATIONS  
PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance  
of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss  
in the traces. These can send erroneous signals to the DC-DC converter IC, resulting in poor regulation or  
instability. Poor layout can also result in re-flow problems leading to poor solder joints between the WSON  
package and board pads. Poor solder joints can result in erratic or degraded performance.  
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REVISION HISTORY  
Changes from Revision C (May 2013) to Revision D  
Page  
Changed layout of National Data Sheet to TI format .......................................................................................................... 15  
16  
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PACKAGE OPTION ADDENDUM  
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10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
LM2759SD/NOPB  
LM2759SDX/NOPB  
ACTIVE  
ACTIVE  
WSON  
WSON  
DQB  
DQB  
12  
12  
1000 RoHS & Green  
4500 RoHS & Green  
SN  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
-30 to 85  
-30 to 85  
L2759  
L2759  
SN  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
9-Aug-2022  
TAPE AND REEL INFORMATION  
REEL DIMENSIONS  
TAPE DIMENSIONS  
K0  
P1  
W
B0  
Reel  
Diameter  
Cavity  
A0  
A0 Dimension designed to accommodate the component width  
B0 Dimension designed to accommodate the component length  
K0 Dimension designed to accommodate the component thickness  
Overall width of the carrier tape  
W
P1 Pitch between successive cavity centers  
Reel Width (W1)  
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE  
Sprocket Holes  
Q1 Q2  
Q3 Q4  
Q1 Q2  
Q3 Q4  
User Direction of Feed  
Pocket Quadrants  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LM2759SD/NOPB  
LM2759SDX/NOPB  
WSON  
WSON  
DQB  
DQB  
12  
12  
1000  
4500  
178.0  
330.0  
12.4  
12.4  
3.3  
3.3  
3.3  
3.3  
1.0  
1.0  
8.0  
8.0  
12.0  
12.0  
Q1  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
9-Aug-2022  
TAPE AND REEL BOX DIMENSIONS  
Width (mm)  
H
W
L
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
LM2759SD/NOPB  
LM2759SDX/NOPB  
WSON  
WSON  
DQB  
DQB  
12  
12  
1000  
4500  
208.0  
356.0  
191.0  
356.0  
35.0  
35.0  
Pack Materials-Page 2  
MECHANICAL DATA  
DQB0012A  
SDF12A (Rev B)  
www.ti.com  
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