LM2755TMX/NOPB [TI]
采用微型 SMD 封装、具有 I2C 兼容接口的电荷泵 LED 控制器 | YFQ | 18 | -30 to 85;型号: | LM2755TMX/NOPB |
厂家: | TEXAS INSTRUMENTS |
描述: | 采用微型 SMD 封装、具有 I2C 兼容接口的电荷泵 LED 控制器 | YFQ | 18 | -30 to 85 驱动 控制器 泵 接口集成电路 |
文件: | 总22页 (文件大小:607K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LM2755
www.ti.com
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
LM2755 Charge Pump LED Controller with I2C-Compatible Interface in DSBGA Package
Check for Samples: LM2755
1
FEATURES
DESCRIPTION
The LM2755 is a charge-pump-based, constant
current LED driver capable of driving 3 LEDs with a
total output current up to 90mA. The diode current
waveforms of each LED can be trapezoidal with
timing and level parameters (rise time, fall time, high
level, low level, delay, high time, low time)
programmed via an I2C-compatible interface. The 32
brightness levels found on the LM2755 are
exponentially spaced (as opposed to linearly spaced)
to better match the response of the human eye to
changing brightness levels.
2
•
90% Peak Efficiency
•
•
Total solution size < 13mm2
No Inductor Required: Only 4 Inexpensive
Ceramic Caps
•
•
•
3 Independently Controlled Constant Current
Outputs
Programmable Trapezoidal Dimming
Waveform on Each Output
Programmable Timing Control Via Internal
Registers and External Clock Synchronization
Input
The device requires only four small and low-cost
ceramic capacitors. The LM2755 provides excellent
efficiency without the use of an inductor by operating
the charge pump in a gain of 3/2 or in a gain of 1.
Maximum efficiency is achieved over the input
voltage range by actively selecting the proper gain
based on the LED forward voltage requirements.
•
•
32 Exponential Dimming Steps with 800:1
Dimming Ratio
Programmable Brightness Control via I2C-
Compatible Interface
•
•
•
Hardware Enable Pin
The pre-regulation scheme used by the LM2755 is
optimized to ensure low conducted noise on the
input. An internal soft-start circuitry eliminates high
inrush current at start-up. The LM2755 consumes
3µA (typ.) of supply current in shut-down.
Wide Input Voltage Range: 2.7V to 5.5V
Tiny 18-bump Thin DSBGA : 1.8mm x 1.6mm x
0.6mm
APPLICATIONS
The LM2755 is available in Texas Instruments' tiny
18-bump thin DSBGA package.
•
•
•
•
Indicator LEDs
Keypad LED Backlight
Display LED Backlight
Fun-light LEDs
TYPICAL APPLICATION CIRCUIT
0.47 mF
0.47 mF
3.1 mm
C2
C
OUT
C1- C1+ C2- C2+
V
P
OUT
IN
C1
1 mF
1 mF
C
IN
ADR
VIO
SCL
SDIO
SYNC
LM2755
SCL
R
SET
SDIO
D1
D2
D3
HWEN
VIO
Dx Pins
SYNC
HWEN
I
SET
GND ADDR
Capacitors:
TDK C1005X5R1A105M and C1005X5R1A474M ,
or 1 mF and 0.47 mF single capacitor equivalent
12.5 kW
Figure 1. Typical Application Circuit
Figure 2. Minimum Solution Size
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2013, Texas Instruments Incorporated
LM2755
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
www.ti.com
Connection Diagram
7
6
5
4
3
2
1
7
6
5
4
3
2
1
A
B
C
D
E
E
D
C
B
A
Top View
Bottom View
Figure 3. 18-Bump Thin DSBGA Package
1.615mm × 1.807mm × 0.6mm
(See Package Number YFQ0018AAA)
PIN DESCRIPTIONS
Pin #s
A1
A3
A5
A7
B2
B4
B6
C1
C3
C5
C7
D2
D4
D6
E1
E3
E5
E7
Pin Names
ID1
Pin Descriptions
LED Driver 1
ID2
LED Driver 2
ID3
LED Driver 3
SYNC
ISET
HWEN
SDIO
VIN
External clock synchronization input
LED Driver Current Set Pin
Hardware EN Pin. Low '0' = RESET, High '1' = Normal Operation
Serial data Input/Output pin
Input Voltage Connection
GND
VIO
Ground Connection.
Serial Bus Voltage Level Input
Serial Clock Pin
SCL
POUT
C2-
Charge Pump Output
Flying Capacitor Connect
GND
C1+
Ground connection
Flying Capacitor Connect
C2+
Flying Capacitor Connect
C1-
Flying Capacitor Connect
ADDR
Chip Address Select Input. VIN = 0x67. Ground = 0x18.
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
2
Submit Documentation Feedback
Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM2755
LM2755
www.ti.com
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
(1)(2)(3)
ABSOLUTE MAXIMUM RATINGS
VIN pin voltage
−0.3V to 6.0V
SCL, SDIO, VIO,
−0.3V to (VIN+0.3V)
ADDR, SYNC pin voltages
w/ 6.0V max
IDx Pin Voltages
−0.3V to (VPOUT+0.3V)
w/ 6.0V max
Continuous Power Dissipation
Internally Limited
(4)
Junction Temperature (TJ-MAX
Storage Temperature Range
)
150°C
−65°C to +150°C
(5)
Maximum Lead Temperature (Soldering)
ESD Rating(6)
Human Body Model
2.5kV
(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is ensured. Operating Ratings do not imply verified performance limits. For verified performance limits and
associated test conditions, see the Electrical Characteristics tables.
(2) All voltages are with respect to the potential at the GND pin.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(4) Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 160°C (typ.) and
disengages at TJ = 155°C (typ.).
(5) For detailed soldering specifications and information, please refer to STET Application Note 1112: DSBGA Wafer Level Chip Scale
Package (AN-1112 SNVA009).
(6) The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. (MIL-STD-883 3015.7)
(1)(2)
OPERATING RATINGS
Input Voltage Range
2.7V to 5.5V
−30°C to 105°C
−30°C to +85°C
Junction Temperature (TJ) Range
Ambient Temperature (TA) Range(3)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is ensured. Operating Ratings do not imply verified performance limits. For verified performance limits and
associated test conditions, see the Electrical Characteristics tables.
(2) All voltages are with respect to the potential at the GND pin.
(3) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP
=
105°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the
part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
THERMAL PROPERTIES
Junction-to-Ambient Thermal
Resistance (θJA), YFQ0018 Package
56°C/W
(1)
(1) Junction-to-ambient thermal resistance is highly dependent on application and board layout. In applications where high maximum power
dissipation exists, special care must be paid to thermal dissipation issues in board design. For more information, please refer to Texas
Instruments STET Application Note 1112: DSBGA Wafer Level Chip Scale Package (AN-1112 SNVA009).
Copyright © 2007–2013, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Links: LM2755
LM2755
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
www.ti.com
(1)(2)
ELECTRICAL CHARACTERISTICS
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: VIN = 3.6V; VD1 = 0.4V; VD2 = 0.4V; VD3 = 0.4V; RSET = 12.5kΩ; D1, D2, and D3 = Fullscale
Current; EN1, EN2, and EN3 Bits = “1”; CLK bit = '0'; C1 = C2 = 0.47µF, CIN = COUT = 1µF; Specifications related to output
(3)
current(s) and current setting pins (IDx and ISET) apply to D1, D2 and D3.
Symbol
Parameter
Output Current Regulation
Output Current Matching
Condition
Min
Typ
20.7
1
Max
22.7
Units
mA
%
IDx
3.0V ≤ VIN ≤ 5.5V
3.0V ≤ VIN ≤ 5.5V
Gain = 3/2
18.7
(4)
IMATCH
IQ
Quiescent Supply Current
1.0
1.3
9.5
mA
D1-3 = OPEN, RSET = OPEN
3.0V ≤ VIN ≤ 5.5V
ISD
Shutdown Supply Current
ISET Pin Voltage
5
µA
V
EN1 = EN2 = EN3 = 0
VSET
3.0V ≤ VIN ≤ 5.5V
1.25
200
Output Current to Current Set
Ratio
(5)
IDX / ISET
VDxTH
VDx 1x to 3/2x Gain Transition
Threshold
VD1 and/or VD2 and/or VD3Falling
350
200
mV
mV
Current Source Headroom
IDx = 95% ×IDx (nom.)
(IDx (nom) ≈ 20mA)
Gain = 3/2
VHR
Voltage Requirement
(6)
fSW
Switching Frequency
Start-up Time
0.975
1.25
300
1.525
MHz
µs
tSTART
POUT = 90% steady state
Internal Diode Current PWM
Frequency
fPWM
20
kHz
Maximum External Sync
Frequency
fSYNC
1.0
MHz
Reset
0
0.5
VHWEN
HWEN Voltage Thresholds
2.7V ≤ VIN ≤ 5.5V
V
Normal Operation
1.23
VIN
I2C-Compatible Interface Voltage Specifications (SCL, SDIO, VIO)
(7)
VIO
Serial Bus Voltage Level
2.7V ≤ VIN ≤ 5.5V
1.44
0
VIN
V
V
0.35 ×
VIO
VIL
Input Logic Low "0"
2.7V ≤ VIN ≤ 5.5V, VIO = 3.0V
2.7V ≤ VIN ≤ 5.5V, VIO = 3.0V
0.65 ×
VIO
VIH
Input Logic High "1"
Output Logic Low "0"
VIO
V
VOL
ILOAD = 3mA
400
mV
(8)
I2C-Compatible Interface Timing Specifications (SCL, SDIO, VIO)
t1
t2
t3
SCL (Clock Period)
2.5
100
0
µs
ns
ns
Data In Setup Time to SCL High
Data Out stable After SCL Low
SDIO Low Setup Time to SCL
Low (Start)
t4
100
ns
(1) All voltages are with respect to the potential at the GND pin.
(2) Min and Max limits are ensured by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the most likely
norm.
(3) CIN, CPOUT, C1, and C2 : Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.
(4) For the current sinks on a part, the following are determined: the maximum sink current in the group (MAX), the minimum sink current in
the group (MIN), and the average sink current of the group (AVG). Two matching numbers are calculated: (MAX-AVG)/AVG and (AVG-
MIN)/AVG. The larger number of the two (worst case) is considered the matching figure. The typical specification provided is the most
likely norm of the matching figure for all parts
(5) The maximum total output current for the LM2755 should be limited to 90mA. The total output current can be split among any of the
three banks (ID1 = ID2 = ID3 = 30mA Max.). Under maximum output current conditions, special attention must be given to input voltage
and LED forward voltage to ensure proper current regulation. See MAXIMUM OUTPUT CURRENT, MAXIMUM LED VOLTAGE,
MINIMUM INPUT VOLTAGE of the datasheet for more information.
(6) For each IDx output pin, headroom voltage is the voltage across the internal current sink connected to that pin. For VHR = VOUT -VDxx. If
headroom voltage requirement is not met, LED current regulation will be compromised.
(7) SCL and SDIO signals are referenced to VIO and GND for minimum VIO voltage testing.
(8) SCL and SDIO should be glitch-free in order for proper brightness control to be realized.
4
Submit Documentation Feedback
Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM2755
LM2755
www.ti.com
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
ELECTRICAL CHARACTERISTICS (1)(2) (continued)
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: VIN = 3.6V; VD1 = 0.4V; VD2 = 0.4V; VD3 = 0.4V; RSET = 12.5kΩ; D1, D2, and D3 = Fullscale
Current; EN1, EN2, and EN3 Bits = “1”; CLK bit = '0'; C1 = C2 = 0.47µF, CIN = COUT = 1µF; Specifications related to output
current(s) and current setting pins (IDx and ISET) apply to D1, D2 and D3. (3)
Symbol
Parameter
Condition
Min
Typ
Max
Units
SDIO High Hold Time After SCL
High (Stop)
t5
100
ns
Figure 4. I2C Timing Diagram
Copyright © 2007–2013, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Links: LM2755
LM2755
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise specified: TA = 25°C; VIN = 3.6V; VHWEN = VIN; VD1 = VD2 = VD3 = 3.6V; RSET = 12.5kΩ; C1=C2= 0.47µF, CIN
=
CVOUT = 1µF; ENA = ENB = ENC = '1'.
LED Drive Efficiency
vs
Diode Current
vs
Input Voltage
Input Voltage
90
22
V
= 3.4V
LED
T
A
= +25°C
21
80
20
70
19
T
= +85°C
60
A
18
I
= 20 mA, V
LED
= 3.4V
4.4
LED
50
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
(V)
2.7
3.3
3.8
4.9
5.5
V
(V)
V
IN
IN
Figure 5.
Figure 6.
Current Matching
vs
Input Voltage
3 LEDs
Diode Current
vs
Brightness Code
25.0
22.00
21.00
20.00
19.00
18.00
V
= 3.4V
LED
ID3
20.0
15.0
ID2
10.0
5.0
VLED = 3.4V
0.0
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
0
6
12
19
25
31
BRC
VIN (V)
Figure 7.
Figure 8.
Quiescent Current
Shutdown Current
vs
Input Voltage
vs
Input Voltage
5
8
VLED = 3.3V
TA = +85°C
TA = +25°C
4
6
4
2
0
3
2
1
0
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
VIN (V)
VIN (V)
Figure 9.
Figure 10.
6
Submit Documentation Feedback
Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM2755
LM2755
www.ti.com
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Unless otherwise specified: TA = 25°C; VIN = 3.6V; VHWEN = VIN; VD1 = VD2 = VD3 = 3.6V; RSET = 12.5kΩ; C1=C2= 0.47µF, CIN
CVOUT = 1µF; ENA = ENB = ENC = '1'.
=
Square Wave Pattern with Delays
Triangle Wave Pattern
Ch1: V
Ch1: V
OUT
OUT
Ch2: I
Ch3: I
Ch4: I
Ch2: I
Ch3: I
Ch4: I
D1
D1
D2
D3
D2
D3
Time: 2 msec./div
Time: 10 msec./div
Ch1: 5V/div Ch2: 10 mA/div
Ch1: 5V/div
Ch2: 10 mA/div
Ch3: 10 mA/div Ch4: 10 mA/div
Ch3: 10 mA/div Ch4: 10 mA/div
Figure 11.
Figure 12.
Trapezoid Wave Pattern
Slow Ramp-Up / Fast Ramp-Down Wave Pattern
Ch1: V
Ch1: V
OUT
OUT
Ch2: I
Ch3: I
Ch4: I
Ch2: I
Ch3: I
Ch4: I
D1
D1
D2
D3
D2
D3
Time: 10 msec./div
Time: 10 msec./div
Ch1: 5V/div Ch2: 10 mA/div
Ch1: 5V/div
Ch2: 10 mA/div
Ch3: 10 mA/div Ch4: 10 mA/div
Ch3: 10 mA/div Ch4: 10 mA/div
Figure 13.
Figure 14.
Fast Ramp-Up / Slow Ramp-Down Wave Pattern
Ch1: V
OUT
Ch2: I
Ch3: I
Ch4: I
D1
D2
D3
Ch1: 5V/div Ch2: 10 mA/div
Ch3: 10 mA/div Ch4: 10 mA/div
Figure 15.
Copyright © 2007–2013, Texas Instruments Incorporated
Submit Documentation Feedback
7
Product Folder Links: LM2755
LM2755
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
www.ti.com
BLOCK DIAGRAM
VIN
C1+
C1-
C2+
C2-
VREF
LM2755
ADDR
SYNC
VIO
P
OUT
ADAPTIVE CHARGE PUMP
(1x and 3/2x MODES)
OSC
I2C INTERFACE /
CONTROLLER LOGIC /
REGISTERS
SCL
V
MONITOR
LED
SDIO
D1
D2
D3
HWEN
D3 CONTROL
I
SET
MAX
CURRENT
SET
D2 CONTROL
D1 CONTROL
GND
D1
D2
D3
GND
Figure 16. Block Diagram
8
Submit Documentation Feedback
Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM2755
LM2755
www.ti.com
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
CIRCUIT COMPONENTS
CHARGE PUMP
The input to the 3/2× - 1x charge pump is connected to the VIN pin, and the regulated output of the charge pump
is connected to the POUT pin. The recommended input voltage range of the LM2755 is 3.0V to 5.5V. The device’s
regulated charge pump has both open loop and closed loop modes of operation. When the device is in open
loop, the voltage at VOUT is equal to the gain times the voltage at the input. When the device is in closed loop,
the voltage at VOUT is regulated to 4.6V (typ.). The charge pump gain transitions are actively selected to maintain
regulation based on LED forward voltage and load requirements. This allows the charge pump to stay in the
most efficient gain (1x) over as much of the input voltage range as possible, reducing the power consumed from
the battery.
LED FORWARD VOLTAGE MONITORING
The LM2755 has the ability to switch converter gains (1x or 3/2x) based on the forward voltage of the LED load.
This ability to switch gains maximizes efficiency for a given load. Forward voltage monitoring occurs on all diode
pins. At higher input voltages, the LM2755 will operate in pass mode, allowing the POUT voltage to track the input
voltage. As the input voltage drops, the voltage on the Dx pins will also drop (VDX = VPOUT – VLEDx). Once any of
the active Dx pins reaches a voltage approximately equal to 350mV, the charge pump will then switch to the gain
of 3/2x. This switch-over ensures that the current through the LEDs never becomes pinched off due to a lack of
headroom on the current sources.
Only active Dx pins will be monitored. For example, if only D1 is enabled, the LEDs connected to D2 and D3 will
not affect the gain transition point. If all Dx pins are enabled, all diodes will be monitored, and the gain transition
will be based upon the diode with the highest forward voltage.
HWEN PIN
The LM2755 has a hardware enable/reset pin (HWEN) that allows the device to be disabled by an external
controller without requiring an I2C write command. Under normal operation, the HWEN pin should be held high
(logic '1') to prevent an unwanted reset. When the HWEN is driven low (logic '0'), all internal control registers
reset to the default states and the part becomes disabled. Please see Electrical Characteristics for required
voltage thresholds.
SYNC PIN
The SYNC pin allows the LM2755 to use an external clock to generate the timing within. This allows the
LM2755's current-sinks to pulse-width modulate (PWM) and transition at a user controlled frequency. The PWM
frequency and the step-time increment can be set by feeding a clock signal into the SYNC pin and enabling bit 6
in the General Purpose register (See Electrical Characteristics for more details.). The maximum frequency
allowed to ensure current level accuracy is 1MHz. This external clock is divided down by 32x to create the
minimum time-step and PWM frequency. For a 1MHz external clock, the PWM frequency becomes 31.25KHz,
and the minimum step time becomes 32µseconds. If not used, it is recommended that the SYNC pin be tied to
ground.
ADDR PIN
The ADDR pin allows the user to choose between two different I2C chip addresses for the LM2755. Tying the
ADDR pin high sets the chip address to hex 67 (0x67 or 67h), while tying the ADDR pin low sets the chip
address to hex 18 (0x18 or 18h). This feature allows multiple LM2755's to be used within a system in addition to
providing flexibility in the event another chip in the system has a chip address similar to the default LM2755
address (0x18).
I2C-Compatible Interface
DATA VALIDITY
The data on SDIO line must be stable during the HIGH period of the clock signal (SCL). In other words, state of
the data line can only be changed when CLK is LOW.
Copyright © 2007–2013, Texas Instruments Incorporated
Submit Documentation Feedback
9
Product Folder Links: LM2755
LM2755
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
www.ti.com
SCL
SDIO
data
change
allowed
data
change
allowed
data
valid
data
change
allowed
data
valid
Figure 17. Data Validity Diagram
A pull-up resistor between VIO and SDIO must be greater than [(VIO-VOL) / 3mA] to meet the VOL requirement
on SDIO. Using a larger pull-up resistor results in lower switching current with slower edges, while using a
smaller pull-up results in higher switching currents with faster edges.
START AND STOP CONDITIONS
START and STOP conditions classify the beginning and the end of the I2C session. A START condition is
defined as SDIO signal transitioning from HIGH to LOW while SCL line is HIGH. A STOP condition is defined as
the SDIO transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and
STOP conditions. The I2C bus is considered to be busy after a START condition and free after a STOP condition.
During data transmission, the I2C master can generate repeated START conditions. First START and repeated
START conditions are equivalent, function-wise. The data on SDIO line must be stable during the HIGH period of
the clock signal (SCL). In other words, the state of the data line can only be changed when CLK is LOW.
SDIO
SCL
S
P
S
STOP condition
TART condition
Figure 18. Start and Stop Conditions
TRANSFERRING DATA
Every byte put on the SDIO line must be eight bits long, with the most significant bit (MSB) being transferred first.
Each byte of data has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated
by the master. The master releases the SDIO line (HIGH) during the acknowledge clock pulse. The LM2755 pulls
down the SDIO line during the 9th clock pulse, signifying an acknowledge. The LM2755 generates an
acknowledge after each byte has been received.
After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an
eighth bit which is a data direction bit (R/W). The LM2755 address is 18h is ADDR if tied low and 67h if ADDR is
tied high . For the eighth bit, a “0” indicates a WRITE and a “1” indicates a READ. The second byte selects the
register to which the data will be written. The third byte contains data to write to the selected register.
10
Submit Documentation Feedback
Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM2755
LM2755
www.ti.com
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
ack from slave
ack from slave
ack from slave
start msb Chip Address lsb
w
ack
msb Register Add lsb
ack
msb
DATA
lsb
ack stop
SCL
SDIO
start
Id = 18h
w
ack
addr = 10h
ack
address h‘07 data
ack stop
w = write (SDIO = "0")
r = read (SDIO = "1")
ack = acknowledge (SDIO pulled down by either master or slave)
rs = repeated start
id = chip address, 18h if ADDR = '0' or 67h if ADDR = '1' for LM2755
Figure 19. Write Cycle
I2C-COMPATIBLE CHIP ADDRESS
The chip address for LM2755 is 0011000 (0x18) when ADDR = '0' or 1100111(0x67) when ADDR = '1'.
I
t
t
fall
LED
rise
high
t
delay
t
low
low
t
t
t
fall-total
rise-total
high
time
Figure 20. Dimming Waveform
Internal Registers
Table 1. Internal Registers of LM2755
Register Name
Internal Hex Address
Power On Value
0000 0000
General Purpose
x10
x20
xA9
xA8
xA1
xA5
xA3
xA4
xA2
xB9
xB8
xB1
xB5
Time Step: nSTEP
1000 1000
D1 High Level: nID1H
D1 Low Level: nID1L
D1 Delay: ndelay1
1110 0000
1110 0000
0000 0000
(1)
D1 Ramp-Up Step Time: nrise1
D1 Time High: nhigh1
D1 Ramp-Down Step Time: nfall1
D1 Timing: nlow1
0000 0000
0000 0000
(1)
0000 0000
0000 0000
1110 0000
1110 0000
0000 0000
D2 High Level: nID2H
D2 Low Level: nID2L
D2 Delay: ndelay2
(1)
D2 Ramp-Up Step Time: nrise2
0000 0000
(1) nrisex or nfallx = 0 or 1 are not valid and should not be used
Copyright © 2007–2013, Texas Instruments Incorporated
Submit Documentation Feedback
11
Product Folder Links: LM2755
LM2755
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
www.ti.com
Table 1. Internal Registers of LM2755 (continued)
Register Name
Internal Hex Address
Power On Value
D2 Time High: nhigh2
D2 Ramp-Down Step Time: nfall2
D2 Timing: nlow2
xB3
xB4
xB2
xC9
xC8
xC1
xC5
xC3
xC4
xC2
0000 0000
(1)
0000 0000
0000 0000
1110 0000
1110 0000
0000 0000
D3 High Level: nID3H
D3 Low Level: nID3L
D3 Delay: ndelay3
(1)
D3 Ramp-Up Step Time: nrise3
D3 Time High: nhigh3
D3 Ramp-Down Step Time: nfall3
D3 Timing: nlow3
0000 0000
0000 0000
(1)
0000 0000
0000 0000
GENERAL PURPOSE REGISTER DESCRIPTION
•
•
•
•
•
•
•
•
Bit 0: enable output D1 with high current level.
Bit 1: enable output D2 with high current level.
Bit 2: enable output D3 with high current level.
Bit 3: enable dimming waveform on output D1.
Bit 4: enable dimming waveform on output D2.
Bit 5: enable dimming waveform on output D3.
Bit 6: enable external clock. '1' = External Clock Sync, '0' = Internal Clock Used
Bit 7: If Bit 7 = 0 the charge pump is powered on before any dimming waveform is enabled. It is
recommended that Bit7 be set to a '0' if an external clock is used. If Bit 7 = 1 the dimming waveform can be
enabled before charge pump is powered on.
Application Information
SETTING FULL-SCALE LED CURRENT
The current through the LEDs connected to D1, D2 and D3 can be set to a desired level simply by connecting an
appropriately sized resistor (RSET) between the ISET pin of the LM2755 and GND. The LED currents are
proportional to the current that flows through the ISET pin and are a factor of 200 times greater than the ISET
currents. The feedback loop of the internal amplifier sets the voltage of the ISET pin to 1.25V (typ.). The
statement above is simplified in the equation below:
IDx (Full-Scale) = 200 × (VISET / RSET
)
(1)
Please refer to I2C-Compatible Interface for detailed instructions on how to adjust the brightness control
registers.
BRIGHTNESS LEVEL CONTROL
Once the desired RSET value has been chosen, the LM2755 can internally dim the LEDs by modulating the
currents with an internally set 20kHz PWM signal. The PWM duty cycle percentage is independently set for each
LED through the I2C-compatible interface. The 32 brightness levels follow a exponentially increasing pattern
rather than a linearly increasing one in order to better match the human eye's response to changing brightness.
The brightness level response is modeled in the following equations.:
IDx LOW = (0.9)(31-n ) × IDx Fullscale
(2)
(3)
IDxL
IDx HIGH = (0.9)(31-n ) × IDx Fullscale
IDxH
nIDxH and nIDxL are numbers between 0 and 31 stored in the Brightness Level registers. When the waveform
enable bits are set to '1', nIDxH and nIDxL are the brightness level boundaries. These equations apply to all Dx
outputs and their corresponding registers. A '0' code in the Brightness Control register sets the current to an "off-
state" (0mA).
12
Submit Documentation Feedback
Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM2755
LM2755
www.ti.com
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
TIME STEP CONTROL
Bit 0 to Bit 2: The value of these 3 bits is equal to N, which is used in the timing control equations (0 ≤ N ≤ 7).
The minimum internal time step (N=0) is 50µs. Setting the time-step to N=7 results in a maximum time step of
6.4msec.
tSTEP = 50µsec × 2NSTEP if the internal clock is used.
tSTEP = 2NSTEP × (32 ÷ fSYNC ) if the external clock on the SYNC pin is used.
(4)
(5)
Bit 3 to Bit 7: Not used
DELAY CONTROL
The LM2755 allows the programmed current waveform on each diode pin to independently start with a delay
upon enabling the waveform dimming bits in the general purpose register. There are 256 delay levels available.
The delay time is set by the following equation:
For nSTEP= 0,
tdelayx = tSTEP × (ndelayx+ nrisex
(6)
(7)
(8)
)
By default, ndelayx = 0 with a range of 0 ≤ ndelay ≤ 255.
For 1 ≤ nSTEP ≤ 7, tdelayx = tSTEP × [(ndelayx-1) + (nrisex-1)]
where
•
•
•
1 ≤ ndelay ≤ 255.
If ndelay = 0, tdelayx = 0s.
ndelayx is stored in the Dx Delay registers.
(9)
TIMING CONTROL
nrisex nfallx, nhighx, nlowx are numbers between 0 and 255, stored in the timing control registers. The durations of the
rise, high, fall and low times are given by:
For nSTEP= 0,
(10)
(11)
trise/fall = tSTEP x (nIDxH − nIDxL − 1 ) x nrisex/fallx
where
•
•
2 ≤ nrisex/fallx ≤ 255
nrisex or nfallx = 0 or 1 are not valid and should not be used
(12)
(13)
For 1 ≤ nSTEP ≤ 7,
trise/fall = tSTEP x (nIDxH− nIDxL − 1 ) x (nrisex/fallx − 1)
where
•
•
2 ≤ nrisex/fallx ≤ 255
nrisex or nfallx = 0 or 1 are not valid and should not be used
(14)
(15)
For nSTEP= 0,
thighx = tSTEP × (nhighx + nfallx) tlowx = tSTEP × (nlowx + nrisex
)
where
•
•
1 ≤ nhighx/lowx ≤ 255
For nhighx/lowx=0, thigh or low = tSTEP
(16)
(17)
(18)
For 1 ≤ nSTEP ≤ 7,
thighx = tSTEP × ((nhighx − 1) + (nfallx -1))
tlowx = tSTEP × ((nlowx − 1)+ (nrisex -1))
where
•
•
•
2 ≤ nhighx/lowx ≤ 255
For nhighx/lowx= 0 or 1, thighx = tSTEP × (nfallx − 1)
tlowx = tSTEP × (nrisex − 1)
(19)
13
Copyright © 2007–2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: LM2755
LM2755
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
www.ti.com
SYNC PIN TIMING CONTROL
It is possible to replace the internal clock with an external one placed on the external SYNC pin. Writing a '1' to
bit 6 in the General Purpose register switches the system clock from being internally generated to externally
generated. The frequency of the PWM modulating signal becomes:
fPWM = fSYNC / 32
(20)
The maximum recommended SYNC frequency is 1MHz. This frequency yields a PWM frequency of 31.25KHz
and the minimum step time of 32µsec.
MAXIMUM OUTPUT CURRENT, MAXIMUM LED VOLTAGE, MINIMUM INPUT VOLTAGE
The LM2755 can drive 3 LEDs at 30mA each (D1, D2, D3) from an input voltage as low as 3.2V, as long as the
LEDs have a forward voltage of 3.6V or less (room temperature).
The statement above is a simple example of the LED drive capability of the LM2755. The statement contains the
key application parameters that are required to validate an LED-drive design using the LM2755: LED current
(ILEDx), number of active LEDs (Nx), LED forward voltage (VLED), and minimum input voltage (VIN-MIN).
The equation below can be used to estimate the maximum output current capability of the LM2755:
ILED_MAX = [(1.5 x VIN) − VLED − (IADDITIONAL × ROUT)] ÷ [(Nx x ROUT) + kHRx
ILED_MAX = [(1.5 x VIN ) − VLED− (IADDITIONAL × 2.4Ω)] ÷ [(Nx x 2.4Ω) + kHRx
IADDITIONAL is the additional current that could be delivered to the other LED Groups.
]
(21)
(22)
]
•
ROUT: Output resistance. This parameter models the internal losses of the charge pump that result in voltage
droop at the pump output VOUT. Since the magnitude of the voltage droop is proportional to the total output
current of the charge pump, the loss parameter is modeled as a resistance. The output resistance of the LM2755
is typically 2.4Ω (VIN = 3.6V, TA = 25°C). In equation form:
VVOUT = (1.5 × VIN) – [( ILED1 + ILED2 + ILED3) × ROUT
]
(23)
kHR – Headroom constant. This parameter models the minimum voltage required to be present across the current
sinks for them to regulate properly. This minimum voltage is proportional to the programmed LED current, so the
constant has units of mV/mA. The typical kHR of the LM2755 is 3.25mV/mA. In equation form:
(VVOUT – VLEDx) > kHRx × ILEDx
(24)
(25)
Typical Headroom Constant Values kHR1 = kHR2 = kHR3 = 10 mV/mA
The "ILED-MAX" Equation 21 is obtained from combining the “ROUT” Equation 23 with the “kHRx” Equation 24 and
solving for ILEDx. Maximum LED current is highly dependent on minimum input voltage and LED forward voltage.
Output current capability can be increased by raising the minimum input voltage of the application, or by
selecting an LED with a lower forward voltage. Excessive power dissipation may also limit output current
capability of an application.
Total Output Current Capability
The maximum output current that can be drawn from the LM2755 is 90mA. Each driver group has a maximum
allotted current per Dx sink that must not be exceeded.
Table 2.
DRIVER TYPE
MAXIMUM Dx CURRENT
Dx
30mA per Dx Pin
The 90mA load can be distributed in many different configurations. Special care must be taken when running the
LM2755 at the maximum output current to ensure proper functionality.
POWER EFFICIENCY
Efficiency of LED drivers is commonly taken to be the ratio of power consumed by the LEDs (PLED) to the power
drawn at the input of the part (PIN). With a 3/2× - 1× charge pump, the input current is equal to the charge pump
gain times the output current (total LED current). The efficiency of the LM2755 can be predicted as follow:
PLEDTOTAL = (VLEDA × NA × ILEDA) + (VLEDB × NB × ILEDB) + (VLEDC × ILEDC
)
(26)
(27)
(28)
PIN = VIN × IIN
PIN = VIN × (GAIN × ILEDTOTAL + IQ)
14
Submit Documentation Feedback
Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM2755
LM2755
www.ti.com
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
E = (PLEDTOTAL ÷ PIN)
(29)
The LED voltage is the main contributor to the charge-pump gain selection process. Use of low forward-voltage
LEDs (3.0V to 3.5V) will allow the LM2755 to stay in the gain of 1× for a higher percentage of the lithium-ion
battery voltage range when compared to the use of higher forward voltage LEDs (3.5V to 4.0V). See LED
FORWARD VOLTAGE MONITORINGfor a more detailed description of the gain selection and transition process.
For an advanced analysis, it is recommended that power consumed by the circuit (VIN x IIN) for a given load be
evaluated rather than power efficiency.
POWER DISSIPATION
The power dissipation (PDISS) and junction temperature (TJ) can be approximated with the equations below. PIN is
the power generated by the 3/2× - 1× charge pump, PLED is the power consumed by the LEDs, TA is the ambient
temperature, and θJA is the junction-to-ambient thermal resistance for the DSBGA 18-bump package. VIN is the
input voltage to the LM2755, VLED is the nominal LED forward voltage, N is the number of LEDs and ILED is the
programmed LED current.
PDISS = PIN - PLED1 - PLED2 − PLED3
(30)
(31)
(32)
PDISS= (GAIN × VIN × ID1 + D2+ D3 ) − (VLED1 × ILED1) - (VLED2 × ILED2) - (VLED3 × ILED3
TJ = TA + (PDISS x θJA)
)
The junction temperature rating takes precedence over the ambient temperature rating. The LM2755 may be
operated outside the ambient temperature rating, as long as the junction temperature of the device does not
exceed the maximum operating rating of 105°C. The maximum ambient temperature rating must be derated in
applications where high power dissipation and/or poor thermal resistance causes the junction temperature to
exceed 105°C.
THERMAL PROTECTION
Internal thermal protection circuitry disables the LM2755 when the junction temperature exceeds 160°C (typ.).
This feature protects the device from being damaged by high die temperatures that might otherwise result from
excessive power dissipation. The device will recover and operate normally when the junction temperature falls
below 155°C (typ.). It is important that the board layout provide good thermal conduction to keep the junction
temperature within the specified operating ratings.
CAPACITOR SELECTION
The LM2755 requires 4 external capacitors for proper operation (CIN = COUT = 1µF, C1 = C2 = 0.47µF). Surface-
mount multi-layer ceramic capacitors are recommended. These capacitors are small, inexpensive and have very
low equivalent series resistance (ESR <20mΩ typ.). Tantalum capacitors, OS-CON capacitors, and aluminum
electrolytic capacitors are not recommended for use with the LM2755 due to their high ESR, as compared to
ceramic capacitors.
For most applications, ceramic capacitors with X7R or X5R temperature characteristic are preferred for use with
the LM2755. These capacitors have tight capacitance tolerance (as good as ±10%) and hold their value over
temperature (X7R: ±15% over −55°C to 125°C; X5R: ±15% over −55°C to 85°C).
Capacitors with Y5V or Z5U temperature characteristic are generally not recommended for use with the LM2755.
Capacitors with these temperature characteristics typically have wide capacitance tolerance (+80%, −20%) and
vary significantly over temperature (Y5V: +22%, −82% over −30°C to +85°C range; Z5U: +22%, −56% over
+10°C to +85°C range). Under some conditions, a nominal 1µF Y5V or Z5U capacitor could have a capacitance
of only 0.1µF. Such detrimental deviation is likely to cause Y5V and Z5U capacitors to fail to meet the minimum
capacitance requirements of the LM2755.
The recommended voltage rating for the capacitors is 10V to account for DC bias capacitance losses.
Copyright © 2007–2013, Texas Instruments Incorporated
Submit Documentation Feedback
15
Product Folder Links: LM2755
LM2755
SNVS433D –OCTOBER 2007–REVISED APRIL 2013
www.ti.com
REVISION HISTORY
Changes from Revision C (March 2013) to Revision D
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 15
16
Submit Documentation Feedback
Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM2755
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LM2755TM/NOPB
LM2755TMX/NOPB
ACTIVE
ACTIVE
DSBGA
DSBGA
YFQ
YFQ
18
18
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-30 to 85
-30 to 85
D32
D32
3000 RoHS & Green
SNAGCU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM2755TM/NOPB
LM2755TMX/NOPB
DSBGA
DSBGA
YFQ
YFQ
18
18
250
178.0
178.0
8.4
8.4
1.85
1.85
2.01
2.01
0.76
0.76
4.0
4.0
8.0
8.0
Q1
Q1
3000
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM2755TM/NOPB
LM2755TMX/NOPB
DSBGA
DSBGA
YFQ
YFQ
18
18
250
210.0
210.0
185.0
185.0
35.0
35.0
3000
Pack Materials-Page 2
MECHANICAL DATA
YFQ0018
D
0.600±0.075
E
TMD18XXX (Rev C)
D: Max = 1.832 mm, Min =1.771 mm
E: Max = 1.641 mm, Min =1.581 mm
4215082/A
12/12
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
NOTES:
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023, Texas Instruments Incorporated
相关型号:
LM2756_0712
Multi-Display Inductorless LED Driver with 32 Exponential Dimming Steps in micro SMD
NSC
©2020 ICPDF网 联系我们和版权申明