LM2705 [TI]
具有 150mA 峰值电流限制的微功耗升压直流/直流转换器;型号: | LM2705 |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有 150mA 峰值电流限制的微功耗升压直流/直流转换器 转换器 |
文件: | 总24页 (文件大小:1118K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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LM2705
SNVS191F –NOVEMBER 2002–REVISED OCTOBER 2016
LM2705 Micropower Step-Up DC-DC Converter With 150-mA Peak Current Limit
1 Features
3 Description
The LM2705 is
converter in a small 5-pin SOT-23 package. A
current-limited, fixed-off-time control scheme
a micropower step-up DC-DC
1
•
2.2-V to 7-V Input Range
•
•
•
•
•
•
150-mA, 0.7-Ω Internal Switch
Adjustable Output Voltage up to 20 V
Input Undervoltage Lockout
conserves operating current, which results in high
efficiency over a wide range of load conditions. The
21-V switch allows for output voltages as high as
20 V. The low 400-ns off-time permits the use of tiny,
low-profile inductors and capacitors to minimize
footprint and cost in space-conscious portable
applications. The LM2705 is ideal for LCD panels
requiring low current and high efficiency as well as
white-LED applications for cellular phone back-
lighting. The LM2705 device can drive up to 3 white
LEDs from a single Li-Ion battery. The low peak-
inductor current of the LM2705 makes it ideal for USB
applications.
0.01-µA Shutdown Current
Uses Small Surface-Mount Components
Small 5-Pin SOT-23 Package
2 Applications
•
•
•
•
•
LCD Bias Supplies
White-LED Backlighting
Handheld Devices
Digital Cameras
Device Information(1)
Portable Applications
PART NUMBER
LM2705
PACKAGE
BODY SIZE (NOM)
SOT-23 (5)
2.90 mm × 1.60 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
space
space
space
Typical 20-V Application
L
20 V
68 mH
D
6 mA
VIN = Li-Ion
5
1
R1
510 kΩ
SW
VIN
CIN
4.7 mF
LM2705
COUT
1 mF
3
4
SHDN
FB
R2
33 kΩ
GND
2
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM2705
SNVS191F –NOVEMBER 2002–REVISED OCTOBER 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
Features.................................................................. 1
Applications ........................................................... 1
Description ............................................................. 1
Revision History..................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 6
Detailed Description .............................................. 8
7.1 Overview ................................................................... 8
7.2 Functional Block Diagram ......................................... 8
7.3 Feature Description................................................... 8
7.4 Device Functional Modes.......................................... 8
8
Application and Implementation .......................... 9
8.1 Application Information.............................................. 9
8.2 Typical Application ................................................... 9
8.3 Additional Applications............................................ 12
Power Supply Recommendations...................... 15
9
10 Layout................................................................... 15
10.1 Layout Guidelines ................................................. 15
10.2 Layout Example .................................................... 15
11 Device and Documentation Support ................. 16
11.1 Device Support...................................................... 16
11.2 Receiving Notification of Documentation Updates 16
11.3 Community Resources.......................................... 16
11.4 Trademarks........................................................... 16
11.5 Electrostatic Discharge Caution............................ 16
11.6 Glossary................................................................ 16
7
12 Mechanical, Packaging, and Orderable
Information ........................................................... 16
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (May 2013) to Revision F
Page
•
Added Device Information and Pin Configuration and Functions sections, ESD Ratings and Thermal Information
tables, Feature Description, Device Functional Modes, Application and Implementation, Power Supply
Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and Orderable
Information sections................................................................................................................................................................ 1
Deleted pin definition list - added content to Pin Functions .................................................................................................. 3
Changed RθJA value from "220°C/W" to "164.9°C/W" ........................................................................................................... 4
•
•
Changes from Revision D (May 2013) to Revision E
Page
•
Changed layout of National Semiconductor data sheet to TI format.................................................................................... 14
2
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5 Pin Configuration and Functions
DBV Package
5-Pin SOT-23
Top View
VIN
SW
GND
FB
SHDN
Pin Functions
PIN
TYPE
DESCRIPTION
NO.
NAME
SW
1
Power switch input. This is the drain of the internal NMOS power switch. Minimize the metal
trace area connected to this pin to minimize EMI.
Input
—
2
3
GND
FB
Ground - tie directly to ground plane.
Output voltage feedback input — set the output voltage by selecting values for R1 and R2 using:
R1 = R2 × (VOUT / 1.237 V) –1
Input
4
5
Active low shutdown - drive this pin to > 1.1 V to enable the device. Drive this pin to < 0.3 V to
lace the device in a low-power shutdown.
SHDN
VIN
Input
Input
Analog and power input supply pin
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN
MAX
7.5
21
UNIT
V
VIN
SW voltage
FB voltage
SHDN voltage
V
2
V
7.5
150
300
215
220
150
V
(3)
Maximum junction temperature, TJ
°C
°C
°C
°C
°C
Soldering (10 seconds)
Lead temperature
Vapor phase (60 seconds)
Infrared (15 seconds)
Storage temperature, Tstg
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, contact the TI Sales Office/Distributors for availability and specifications.
(3) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal
resistance, RθJA, and the ambient temperature, TA. See Thermal Information for the thermal resistance. The maximum allowable power
dissipation at any ambient temperature is calculated using: PD(MAX) = (TJ(MAX) − TA) / RθJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature.
6.2 ESD Ratings
VALUE
±2000
±200
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Machine model(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) ESD susceptibility using the machine model is 150 V for SW pin.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
7
UNIT
V
Supply voltage
2.2
SW voltage, maximum
Junction temperature(1)
20.5
125
V
–40
°C
(1) All limits specified at room temperature and at temperature extremes. All room temperature limits are 100% production tested or
specified through statistical analysis. All limits at temperature extremes are specified via correlation using standard statistical quality
control (SQC) methods. All limits are used to calculate average outgoing quality level (AOQL).
6.4 Thermal Information
LM2705
THERMAL METRIC(1)
DBV (SOT-23)
5 PINS
164.9
UNIT
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
116.8
27.8
Junction-to-top characterization parameter
Junction-to-board characterization parameter
13.6
ψJB
27.3
(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
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6.5 Electrical Characteristics
Unless otherwise specified, specifications apply for TJ = 25°C and VIN = 2.2 V.
MAX
PARAMETER
TEST CONDITIONS
MIN(1)
TYP(2)
UNIT
(1)
FB = 1.3 V
40
Device disabled
FB = 1.3 V, –40°C to 125°C
FB = 1.2 V
70
IQ
235
µA
Device enabled
Shutdown
FB = 1.2 V, –40°C to 125°C
SHDN = 0 V
300
2.5
0.01
1.237
VFB
Feedback trip point
V
–40°C to 125°C
1.189
100
1.269
180
150
30
ICL
Switch current limit
mA
–40°C to 125°C
FB = 1.23 V(3)
FB = 1.23 V, –40°C to 125°C(3)
IB
FB pin bias current
Input voltage
nA
V
120
7
VIN
–40°C to 125°C
2.2
0.7
RDSON
TOFF
Switch RDSON
Switch off time
Ω
–40°C to 125°C
1.6
80
400
0
ns
SHDN = VIN, TJ = 25°C
SHDN = VIN, TJ = 125°C
SHDN = GND
ISD
SHDN pin current
15
nA
0
IL
Switch leakage current
VSW = 20 V
0.05
1.8
5
µA
V
UVP
Input undervoltage lockout
ON/OFF threshold
VFB
hysteresis
Feedback hysteresis
SHDN low
8
mV
0.7
–40°C to 125°C
–40°C to 125°C
0.3
SHDN
threshold
V
0.7
SHDN high
1.1
(1) All limits specified at room temperature and at temperature extremes. All room temperature limits are 100% production tested or
specified through statistical analysis. All limits at temperature extremes are specified via correlation using standard statistical quality
control (SQC) methods. all limits are used to calculate average outgoing quality level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
(3) Feedback current flows into the pin.
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6.6 Typical Characteristics
Figure 1. Enable Current vs VIN (Device Switching)
Figure 2. Disable Current vs VIN (Device Not Switching)
Figure 3. SHDN Threshold vs VIN
Figure 4. Switch Current Limit vs VIN
1.25
1.24
1.23
1.22
1.21
1.20
55
50
45
40
35
30
25
20
15
ë
n!
-40 -20
0
20 40 60 80 100 120
WÜb/ÇLhb Ç9at9w!ÇÜw9 (°/)
Figure 5. Switch RDSON vs VIN
Figure 6. FB Trip Point and FB Pin Current vs Temperature
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Typical Characteristics (continued)
Figure 8. Off Time vs Temperature
Figure 7. Output Voltage vs Load Current
1) Load: 0.5 mA to 5 mA to 0.5 mA, DC
2) VOUT: 200 mV/div, AC
VOUT = 20 V
1) SHDN: 1 V/div, DC
2) VOUT: 10 V/div, AC
3. IL: 100 mA/div, DC
VIN = 3 V
VOUT = 20 V
VIN = 3 V
T = 100 µs/div
RL = 3.9 kΩ
3. IL: 100 mA/div, DC
T = 100 µs/div
Figure 9. Step Response
Figure 10. Start-Up and Shutdown
1. VSW: 20 V/div, DC
VIN = 2.7 V
VOUT = 20 V
2. Inductor Current: 100 mA/div, DC
3. VOUT, 200 mV/div, AC
IOUT = 2.5 mA
Figure 11. Typical Switching Waveform
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7 Detailed Description
7.1 Overview
The LM2705 is a small boost converter utilizing a constant off time architecture. The device can provide up to
20.5 V at the output with up to 150 mA of peak switch current.
7.2 Functional Block Diagram
L
D
VIN
VOUT
VIN
SW
5
1
CIN
COUT
R2
50 kΩ
R1
50 kΩ
Enable
Comp
VOUT
+
Enable
-
RF1
FB
Q2
10x
Q1
3
+
RF2
CL
Comp
-
R3
30 kΩ
Current Sensing
Circuitry
400ns
One Shot
CL
Adjust
Driver
Logic
R4
140 kΩ
Undervoltage
Lockout
4
2
GND
SHDN
Copyright © 2016, Texas Instruments Incorporated
7.3 Feature Description
The LM2705 device features a constant off-time control scheme. Operation can be best understood by referring
to Functional Block Diagram and Figure 11. Transistors Q1 and Q2 and resistors R3 and R4 of Functional Block
Diagram form a bandgap reference used to control the output voltage. When the voltage at the FB pin is less
than 1.237 V, the Enable Comp in Functional Block Diagram enables the device, and the NMOS switch is turned
on pulling the SW pin to ground. When the NMOS switch is on, current begins to flow through inductor L while
the load current is supplied by the output capacitor COUT. Once the current in the inductor reaches the current
limit, the CL comp trips, and the 400-ns one shot turns off the NMOS switch.The SW voltage then rises to the
output voltage plus a diode drop, and the inductor current begins to decrease as shown in Figure 11. During this
time the energy stored in the inductor is transferred to COUT and the load. After the 400-ns off-time the NMOS
switch is turned on, and energy is stored in the inductor again. This energy transfer from the inductor to the
output causes a stepping effect in the output ripple as shown in Figure 11.
This cycle is continued until the voltage at FB reaches 1.237 V. When FB reaches this voltage, the Enable Comp
disables the device, turning off the NMOS switch and reducing the IQ of the device to 40 µA. The load current is
then supplied solely by COUT indicated by the gradually decreasing slope at the output as shown in Figure 11.
When the FB pin drops slightly below 1.237 V, the Enable Comp enables the device and begins the cycle
described previously.
7.4 Device Functional Modes
The SHDN pin can be used to turn off the LM2705 and reduce the IQ to 0.01 µA. In shutdown mode the output
voltage is a diode drop lower than the input voltage.
8
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LM2705 is a 20-V boost designed for low power boost applications. Typical input voltage range makes this
ideal for standard single cell Li+ batteries or 2 to 4 series alkaline batteries.
8.2 Typical Application
Figure 12 shows a typical Li+ voltage range to 20-V application. The 68-µH inductor allows for a low ripple
current and high light-load efficiency.
L
20 V
68 mH
D
6 mA
VIN = Li-Ion
5
1
R1
510 kΩ
SW
VIN
CIN
4.7 mF
LM2705
COUT
1 mF
4
3
SHDN
FB
R2
33 kΩ
GND
2
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Figure 12. Typical 20-V Application
8.2.1 Design Requirements
For typical DC-DC converter applications, use the parameters listed in Table 1.
Table 1. Design Parameters
DESIGN PARAMETER
Input voltage
EXAMPLE VALUE
2.5 V to 4.2 V
12 V
Output voltage
Output current
Inductor
up to 8 mA
33 µH
8.2.2 Detailed Design Procedure
8.2.2.1 Inductor Selection - Boost Regulator
The appropriate inductor for a given application is calculated using Equation 1:
(
VOUT - VIN(min) + VD
L =
TOFF
ICL
where
•
•
VD is the Schottky diode voltage
ICL is the switch current limit found in the Typical Characteristics
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•
TOFF is the switch off time
(1)
When using this equation be sure to use the minimum input voltage for the application, such as for battery
powered applications. For the LM2705 constant-off time control scheme, the NMOS power switch is turned off
when the current limit is reached. There is approximately a 100-ns delay from the time the current limit is
reached in the NMOS power switch and when the internal logic actually turns off the switch. During this 100-ns
delay, the peak inductor current increases. This increase in inductor current demands a larger saturation current
rating for the inductor. This saturation current can be approximated by Equation 2:
VIN(max)
≈
«
’
◊
100 ns
IPK = ICL
+
L
(2)
Choosing inductors with low ESR decrease power losses and increase efficiency.
Take care when choosing an inductor. For applications that require an input voltage that approaches the output
voltage, such as when converting a Li-Ion battery voltage to 5 V, the 400-ns off time may not be enough time to
discharge the energy in the inductor and transfer the energy to the output capacitor and load. This can cause a
ramping effect in the inductor current waveform and an increased ripple on the output voltage. Using a smaller
inductor causes the IPK to increase and increases the output voltage ripple further.
For typical curves and evaluation purposes the DT1608C series inductors from Coilcraft were used. Other
acceptable inductors include, but are not limited to, the SLF6020T series from TDK, the NP05D series from Taiyo
Yuden, the CDRH4D18 series from Sumida, and the P1166 series from Pulse.
8.2.2.2 Inductor Selection - SEPIC Regulator
Equation 3 can be used to calculate the approximate inductor value for a SEPIC regulator:
(
VOUT + VD
TOFF
L2 = 2
ICL
(3)
The boost inductor, L1, can be smaller or larger but is generally chosen to be the same value as L2. See
Figure 23 and Figure 24 for typical SEPIC applications.
8.2.2.3 Diode Selection
To maintain high efficiency, the average current rating of the Schottky diode should be larger than the peak
inductor current, IPK. Schottky diodes with a low forward drop and fast switching speeds are ideal for increasing
efficiency in portable applications. Choose a reverse breakdown of the Schottky diode larger than the output
voltage.
8.2.2.4 Capacitor Selection
Choose low equivalent series resistance (ESR) capacitors for the output to minimize output voltage ripple.
Multilayer ceramic capacitors are the best choice. For most applications, a 1-µF ceramic capacitor is sufficient.
For some applications a reduction in output voltage ripple can be achieved by increasing the output capacitor.
Output voltage ripple can further be reduced by adding a 4.7-pF feed-forward capacitor in the feedback network
placed in parallel with RF1 (see Functional Block Diagram).
Local bypassing for the input is needed on the LM2705. Multilayer ceramic capacitors are a good choice for this
as well. A 4.7-µF capacitor is sufficient for most applications. For additional bypassing, a 100-nF ceramic
capacitor can be used to shunt high frequency ripple on the input.
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8.2.3 Application Curves
Figure 13. Efficiency vs Load Current
Figure 14. Efficiency vs Load Current
Figure 15. Output Ripple Voltage
Copt, Ropt Included
Figure 16. Output Ripple Voltage
Copt, Ropt Excluded
Figure 17. Two White-LED Efficiency
Figure 18. Three White-LED Efficiency
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8.3 Additional Applications
L
VIN
2.5V-4.2V
33 mH
D
5
1
VIN
SW
COUT
1 mF
CIN
4.7 mF
Ceramic
Ceramic
LM2705
>1.1 V
4
SHDN
0 V
3
FB
GND
2
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Figure 19. Two White-LED Application
L
VIN
D
33 mH
2.5 V - 4.2 V
5
1
VIN
SW
CIN
4.7 mF
Ceramic
COUT
1 mF
Ceramic
LM2705
>1.1 V
4
SHDN
0 V
3
FB
GND
2
R2
82 Ω
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Figure 20. Three White-LED Application
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Additional Applications (continued)
L
VIN
12 V
8 mA
D
33 µH
2.5 V œ 4.2 V
5
VIN
1
SW
R1
240 kΩ
LM2705
CIN
4.7 µF
COUT
1 µF
4
SHDN
3
FB
R2
27 kΩ
GND
2
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Figure 21. Li-Ion 12-V Application
L
VIN
5 V
12 V
18 mA
D
33 µH
5
1
VIN
SW
R1
240 kΩ
LM2705
CIN
4.7 µF
COUT
1 µF
4
SHDN
3
FB
R2
27 kΩ
GND
2
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Figure 22. 5-V to 12-V Application
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Additional Applications (continued)
CSEPIC
1 µF
L1
22 µH
VIN
3.3 V
30 mA
D
2.5 V - 5.5 V
1
SW
5
VIN
R1
180 kΩ
L2
22 µH
LM2705
CIN
4.7 µF
COUT
10 µF
4
SHDN
3
FB
R2
110 kΩ
GND
2
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Figure 23. 3.3-V SEPIC Application
CSEPIC
1 µF
L1
33 µH
VIN
2.5 V œ 7 V
5 V
20 mA
D
1
5
VIN
SW
L2
33 µH
R1
1 MΩ
CIN
4.7 µF
COUT
10 µF
4
SHDN
3
FB
LM2705
R2
330 kΩ
GND
2
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Figure 24. 5-V SEPIC Application
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9 Power Supply Recommendations
The LM2705 is designed to operate from an input voltage supply range from 2.2 V to 7 V. This input supply must
be well regulated and capable to supply the required input current. If the input supply is located far from the
LM2705, additional bulk capacitance may be required in addition to the ceramic bypass capacitors.
10 Layout
10.1 Layout Guidelines
The input bypass capacitor CIN, as shown in Figure 25, must be placed close to the device. This reduces copper
trace resistance, which effects input voltage ripple of the LM2705 device. For additional input voltage filtering, a
100-nF bypass capacitor can be placed in parallel with CIN to shunt any high frequency noise to ground. The
output capacitor, COUT, must also be placed close to the device. Any copper trace connections for the COUT
capacitor can increase the series resistance, which directly effects output voltage ripple. Keep the feedback
network, resistors R1 and R2, close to the FB pin to minimize copper trace connections that can inject noise into
the system. The ground connection for the feedback resistor network must connect directly to an analog ground
plane. Tie the analog ground plane directly to the GND pin. If no analog ground plane is available, the ground
connection for the feedback network must tie directly to the GND pin. Minimize trace connections made to the
inductor and Schottky diode to reduce power dissipation and increase overall efficiency.
10.2 Layout Example
Inductor
Schottky
SW
VIN
CIN
COUT
LM2705
GND
FB
SHDN
R1
R2
Figure 25. LM2705 Layout Example
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
16
Submit Documentation Feedback
Copyright © 2002–2016, Texas Instruments Incorporated
Product Folder Links: LM2705
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LM2705MF-ADJ/NOPB
LM2705MFX-ADJ/NOPB
ACTIVE
ACTIVE
SOT-23
SOT-23
DBV
DBV
5
5
1000 RoHS & Green
3000 RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
S59B
S59B
SN
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM2705MF-ADJ/NOPB SOT-23
LM2705MFX-ADJ/NOPB SOT-23
DBV
DBV
5
5
1000
3000
178.0
178.0
8.4
8.4
3.2
3.2
3.2
3.2
1.4
1.4
4.0
4.0
8.0
8.0
Q3
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LM2705MF-ADJ/NOPB
LM2705MFX-ADJ/NOPB
SOT-23
SOT-23
DBV
DBV
5
5
1000
3000
210.0
210.0
185.0
185.0
35.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0005A
SOT-23 - 1.45 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
0.1 C
1.75
1.45
1.45
0.90
B
A
PIN 1
INDEX AREA
1
2
5
(0.1)
2X 0.95
1.9
3.05
2.75
1.9
(0.15)
4
3
0.5
5X
0.3
0.15
0.00
(1.1)
TYP
0.2
C A B
NOTE 5
0.25
GAGE PLANE
0.22
0.08
TYP
8
0
TYP
0.6
0.3
TYP
SEATING PLANE
4214839/G 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.25 mm per side.
5. Support pin may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
3
2X (0.95)
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214839/G 03/2023
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
3
2X(0.95)
4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214839/G 03/2023
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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