INA225AQDGKRQ1 [TI]
具有四个引脚可选增益设置的 AEC-Q100、36V 双向电流感应放大器 | DGK | 8 | -40 to 125;
| 型号： | INA225AQDGKRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有四个引脚可选增益设置的 AEC-Q100、36V 双向电流感应放大器 | DGK | 8 | -40 to 125 放大器 光电二极管 |
| 文件： | 总32页 (文件大小：2706K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INA225-Q1
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
具有四个引脚可选增益设置的 INA225-Q1 AEC-Q100、36V 双向电流检测放大器
1 特性
3 说明
•
符合 AEC-Q100 标准：
INA225-Q1 是一款电压输出、电流感测放大器，能够
在 0V 至 36V 共模电压上感测电流感测电阻的压降，
并且与电源电压无关。此器件是一款双向、电流分流监
控器，允许外部基准用于测量双向流入电流感测电阻器
的电流。
– 温度等级 1：–40°C 至 +125°C
– HBM ESD 分类等级 2
– CDM ESD 分类等级 C4B
提供功能安全
•
– 可帮助进行功能安全系统设计的文档
宽共模范围：0V 至 36V
失调电压：±150μV（上限，所有增益）
失调电压漂移：0.5μV/°C（上限）
温度范围内的增益精度（上限）：
– 25V/V、50V/V：±0.15%
– 100V/V±0.2%
使用两个增益选择端子（GS0 和 GS1）可选择四个
离散增益电平，从而对 25V/V、50V/V、100V/V 和
200V/V 增益进行编程。使用低偏移、零漂移架构和精
密增益值，可在分流器上的压降上限低至 10mV 满量
程的情况下进行电流检测，同时在整个工作温度范围内
保持非常高精度的测量水准。
•
•
•
•
此器件由一个 +2.7V 至 +36V 的单电源供电，最大
电源电流为 350μA。此器件的额定扩展工作温度范围
为 -40 °C 至 +125 °C，采用超薄小外形尺寸封装
(VSSOP)-8 封装。
– 200V/V：±0.3%
– 10ppm/°C 增益漂移
带宽：250kHz（增益 = 25V/V）
可编程增益：
•
•
– G1 = 25V/V
– G2 = 50V/V
– G3 = 100V/V
器件信息(1)
器件型号
INA225-Q1
封装
封装尺寸（标称值）
VSSOP (8)
3.00mm x 3.00mm
– G4 = 200V/V
静态电流：350μA（最大值）
封装：8 引脚 VSSOP
(1) 如需了解所有可用封装，请参阅数据表末尾的封装选项附录。
•
•
RSHUNT
5-V Supply
Load
2 应用
CBYPASS
0.1µF
VS
INA225
•
•
•
•
•
•
汽车照明
IN-
车身控制模块
电机控制
-
OUT
ADC
Microcontroller
+
阀门控制
IN+
仪表组
GPIO
中央控制模块
REF
GAIN SELECT
GS0 GS1
GAIN
GND GND
25
50
100
200
GND
VS
VS
VS
GND
VS
GND
GS0
GS1
典型应用
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SBOS728
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
Table of Contents
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings(1) ....................................4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................5
6.6 Typical Characteristics................................................7
7 Detailed Description......................................................13
7.1 Overview...................................................................13
7.2 Functional Block Diagram.........................................13
7.3 Feature Description...................................................13
7.4 Device Functional Modes..........................................16
8 Applications and Implementation................................19
8.1 Application Information............................................. 19
8.2 Typical Applications.................................................. 19
9 Power Supply Recommendations................................25
10 Layout...........................................................................25
10.1 Layout Guidelines................................................... 25
10.2 Layout Example...................................................... 25
11 Device and Documentation Support..........................26
11.1 Documentation Support.......................................... 26
11.2 接收文档更新通知................................................... 26
11.3 支持资源..................................................................26
11.4 Trademarks............................................................. 26
11.5 静电放电警告...........................................................26
11.6 术语表..................................................................... 26
12 Mechanical, Packaging, and Orderable
Information.................................................................... 26
4 Revision History
Changes from Revision * (February 2015) to Revision A (March 2021)
Page
•
•
•
•
更新了整个文档中的表格、图和交叉参考的编号格式.........................................................................................1
向特性添加了“功能安全”要点.............................................................................................................................. 1
为重要图形添加了标题........................................................................................................................................1
Added 25 kΩ value to RINT in Input Filtering ....................................................................................................16
Copyright © 2022 Texas Instruments Incorporated
2
Submit Document Feedback
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
5 Pin Configuration and Functions
IN+
GND
VS
1
2
3
4
8
7
6
5
IN-
REF
GS1
GS0
OUT
图 5-1. DGK Package VSSOP-8 (Top View)
表 5-1. Pin Functions
PIN
I/O
DESCRIPTION
NO.
1
NAME
IN+
Analog input
Analog
Connect to supply side of shunt resistor.
Ground
2
GND
VS
3
Analog
Power supply, 2.7 V to 36 V
Output voltage
4
OUT
Analog output
Gain select. Connect to VS or GND.
表 7-3 lists terminal settings and the corresponding gain value.
5
6
GS0
GS1
Digital input
Digital input
Gain select. Connect to VS or GND.
表 7-3 lists terminal settings and the corresponding gain value.
7
8
REF
IN–
Analog input
Analog input
Reference voltage, 0 V to VS
Connect to load side of shunt resistor.
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
3
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
6 Specifications
6.1 Absolute Maximum Ratings(1)
Over operating free-air temperature range, unless otherwise noted.
Supply voltage
MIN
MAX
+40
UNIT
V
Differential (VIN+) – (VIN–
)
–40
+40
V
(2)
Analog inputs, VIN+, VIN–
Common-mode(3)
GND – 0.3
GND – 0.3
GND – 0.3
–55
+40
V
REF, GS0, and GS1 inputs
Output
(VS) + 0.3
(VS) + 0.3
+150
V
V
Operating, TA
Junction, TJ
Storage, Tstg
°C
°C
°C
Temperature
+150
–65
+150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) VIN+ and VIN– are the voltages at the IN+ and IN– terminals, respectively.
(3) Input voltage at any terminal may exceed the voltage shown if the current at that terminal is limited to 5 mA.
6.2 ESD Ratings
VALUE
±2500
±1000
UNIT
Human-body model (HBM), per AEC Q100-002(1)
Charged-device model (CDM), per AEC Q100-011
V(ESD)
Electrostatic discharge
V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
Over operating free-air temperature range, unless otherwise noted.
MIN
NOM
12
MAX
UNIT
V
VCM
VS
Common-mode input voltage
Operating supply voltage
5
V
TA
Operating free-air temperature
–40
+125
°C
6.4 Thermal Information
INA225-Q1
THERMAL METRIC(1)
DGK (VSSOP)
8 PINS
163.6
57.7
UNIT
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
84.7
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
6.5
ψJB
83.2
RθJC(bot)
N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Copyright © 2022 Texas Instruments Incorporated
4
Submit Document Feedback
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
6.5 Electrical Characteristics
At TA = +25 °C, VSENSE = VIN+ – VIN–, VS = +5 V, VIN+ = 12 V, and VREF = VS / 2, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
VCM
Common-mode input range
Common-mode rejection
TA = –40 °C to +125 °C
0
36
V
VIN+ = 0 V to +36 V, VSENSE = 0 mV,
TA = –40 °C to +125 °C
CMR
95
105
dB
VOS
Offset voltage, RTI(1)
RTI vs. temperature
VSENSE = 0 mV
±75
0.2
±150
0.5
μV
dVOS/dT
TA = –40 °C to +125 °C
μV/°C
VSENSE = 0 mV, VREF = 2.5 V,
VS = 2.7 V to 36 V
PSRR
Power-supply rejection ratio
±0.1
±1
85
μV/V
IB
Input bias current
VSENSE = 0 mV
55
0
72
μA
μA
V
IOS
Input offset current
Reference input range
VSENSE = 0 mV
±0.5
VREF
OUTPUT
G
TA = –40 °C to +125 °C
VS
Gain
25, 50, 100, 200
±0.05%
V/V
Gain = 25 V/V and 50 V/V, VOUT = 0.5 V to
VS – 0.5 V, TA = –40 °C to +125 °C
±0.15%
±0.2%
±0.3%
Gain = 100 V/V, VOUT = 0.5 V to VS – 0.5 V,
TA = –40 °C to +125 °C
EG
Gain error
±0.1%
±0.1%
3
Gain = 200 V/V, VOUT = 0.5 V to VS – 0.5 V,
TA = –40 °C to +125 °C
G = 25 V/V, 50 V/V, 100 V/V,
TA = –40 °C to +125 °C
10 ppm/°C
15
Gain error vs. temperature
G = 200 V/V, TA = –40 °C to +125 °C
VOUT = 0.5 V to VS – 0.5 V
No sustained oscillation
5
±0.01%
1
Nonlinearity error
Maximum capacitive load
nF
VOLTAGE OUTPUT(2)
Swing to VS power-supply rail RL = 10 kΩ to GND, TA = –40 °C to +125 °C
VS – 0.05
VGND + 5
VS – 0.2
VGND + 10
V
VREF = VS / 2, all gains, RL = 10 kΩ to GND,
TA = –40 °C to +125 °C
mV
VREF = GND, gain = 25 V/V, RL = 10 kΩ to GND,
TA = –40 °C to +125 °C
VGND + 7
VGND + 15
VGND + 30
VGND + 60
mV
mV
mV
mV
VREF = GND, gain = 50 V/V, RL = 10 kΩ to GND,
TA = –40 °C to +125 °C
Swing to GND(3)
VREF = GND, gain = 100 V/V, RL = 10 kΩ to GND,
TA = –40 °C to +125 °C
VREF = GND, gain = 200 V/V, RL = 10 kΩ to GND,
TA = –40 °C to +125 °C
FREQUENCY RESPONSE
Gain = 25 V/V, CLOAD = 10 pF
Gain = 50 V/V, CLOAD = 10 pF
Gain = 100 V/V, CLOAD = 10 pF
Gain = 200 V/V, CLOAD = 10 pF
250
200
125
70
kHz
kHz
kHz
kHz
V/μs
BW
Bandwidth
SR
Slew rate
0.4
NOISE, RTI(1)
Voltage noise density
50
nV/√ Hz
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
5
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
At TA = +25 °C, VSENSE = VIN+ – VIN–, VS = +5 V, VIN+ = 12 V, and VREF = VS / 2, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
DIGITAL INPUT
Ci
Input capacitance
3
1
pF
μA
V
Leakage input current
Low-level input logic level
High-level input logic level
0 ≤ VIN ≤ VS
2
0.6
VS
VIL
VIH
0
2
V
POWER SUPPLY
VS
IQ
Operating voltage range
TA = –40 °C to +125 °C
VSENSE = 0 mV
+2.7
+36
350
375
V
Quiescent current
300
μA
μA
IQ over temperature
TA = –40 °C to +125 °C
TEMPERATURE RANGE
Specified range
–40
–55
+125
+150
°C
°C
Operating range
(1) RTI = referred-to-input.
(2) See Typical Characteristic curve, Output Voltage Swing vs. Output Current (图 6-10).
(3) See Typical Characteristic curve, Unidirectional Output Voltage Swing vs. Temperature (图 6-14).
Copyright © 2022 Texas Instruments Incorporated
6
Submit Document Feedback
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
6.6 Typical Characteristics
At TA = +25 °C, VS = +5 V, VIN+ = 12 V, and VREF = VS / 2, unless otherwise noted.
175
150
125
100
75
50
25
0
œ50
œ25
0
25
50
75
100
125
150
Offset Voltage (µV)
C001
Temperature (°C)
C002
图 6-1. Input Offset Voltage Production Distribution
图 6-2. Input Offset Voltage vs. Temperature
8
7
6
5
4
3
2
œ50
œ25
0
25
50
75
100
125
150
Common-Mode Rejection Ratio (µV/V)
C003
Temperature (°C)
C004
图 6-3. Common-Mode Rejection Production
图 6-4. Common-Mode Rejection Ratio vs.
Distribution
Temperature
Gain Error (%)
Gain Error (%)
C005
C006
图 6-5. Gain Error Production Distribution (Gain =
图 6-6. Gain Error Production Distribution (Gain =
25 V/V)
50 V/V)
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
7
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
Gain Error (%)
Gain Error (%)
C007
C008
图 6-7. Gain Error Production Distribution (Gain =
图 6-8. Gain Error Production Distribution (Gain =
100 V/V)
200 V/V)
0.5
50
45
40
35
30
25 V/V
50 V/V
100 V/V
200 V/V
0.4
0.3
0.2
0.1
0.0
-0.1
-0.2
-0.3
-0.4
-0.5
25
200 V/V
100 V/V
20
50 V/V
25 V/V
15
œ50
œ25
0
25
50
75
100
125
150
1
10
100
1k 10k
Frequency (Hz)
100k
1M
Temperature (°C)
C009
C010
VCM = 0 V VSENSE = 15 mVPP
图 6-10. Gain vs. Frequency
图 6-9. Gain Error vs. Temperature
140
120
100
80
120
100
80
60
40
20
0
60
40
20
0
10
100
1,000
10,000
100,000 1,000,000
10
100
1,000
10,000
100,000 1,000,000
Frequency (Hz)
Frequency (Hz)
C011
C012
VCM = 0 V
VREF = 2.5 V
VSENSE = 0 mV, Shorted
VS = 5 V
VREF = 2.5 V
VSENSE = 0 mV, Shorted
VS = 5 V + 250-mV Sine Disturbance
VCM = 1-V Sine Wave
图 6-11. Power-Supply Rejection Ratio vs.
图 6-12. Common-Mode Rejection Ratio vs.
Frequency
Frequency
Copyright © 2022 Texas Instruments Incorporated
8
Submit Document Feedback
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
100
90
80
70
60
50
40
30
20
10
0
Vs
(Vs) -1
(Vs) -2
(Vs) -3
GND +3
GND +2
GND +1
GND
Unidirectional, G = 200
Unidirectional, G = 100
Unidirectional, G = 50
Unidirectional, G = 25
- 40°C
25°C
Bidirectional, All Gains
125°C
0
2
4
6
8
10 12 14 16 18 20
Current (mA)
C013
œ50
œ25
0
25
50
75
100
125
150
Temperature (°C)
C038
Unidirectional, REF = GND
Bidirectional, REF > GND
图 6-14. Unidirectional Output Voltage Swing vs.
图 6-13. Output Voltage Swing vs Output Current
Temperature
140
80
70
60
50
40
30
120
IB+, IB-, VREF = 0V
100
80
60
IB+, IB-, VREF = 2.5V
40
IB+, IB-, VREF=0V
20
10
20
0
0
œ20
œ10
0
5
10
15
20
25
30
35
40
0
5
10
15
20
25
30
35
40
Common-Mode Voltage (V)
Common-Mode Voltage (V)
C014
C015
图 6-15. Input Bias Current vs. Common-Mode
图 6-16. Input Bias Current vs. Common-Mode
Voltage (Supply Voltage = +5 V)
Voltage (Supply Voltage = 0 V, Shutdown)
85
80
75
70
65
60
55
550
VS = 36V
500
VS = 5V
VS = 2.7V
450
400
350
300
250
200
œ50
œ25
0
25
50
75
100
125
150
œ50
œ25
0
25
50
75
100
125
150
Temperature (°C)
Temperature (°C)
C016
C017
VS = 5 V
VCM = 12 V
图 6-17. Input Bias Current vs. Temperature
图 6-18. Quiescent Current vs. Temperature
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
9
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
400
375
350
325
300
275
250
225
200
100
Gain = 100 V/V
Gain = 200 V/V
Gain = 50 V/V
Gain = 25 V/V
200 V/V
100 V/V
50 V/V
25 V/V
10
1
10
100
1k
10k
100k
1M
0
5
10
15
20
25
30
35
40
Frequency (Hz)
Supply Voltage (V)
C018
C019
VS = ± 2.5 V
VREF = 0 V
VSENSE = 0 mV, Shorted
图 6-20. Input-Referred Voltage Noise vs.
图 6-19. Quiescent Current vs. Supply Voltage
Frequency
Time (1 s/div)
Time (25 µs/div)
C020
C021
VS = ± 2.5 V
VCM = 0 V
VSENSE = 0 mV, Shorted
图 6-21. 0.1-Hz to 10-Hz Voltage Noise (Referred-to-
图 6-22. Step Response (Gain = 25 V/V, 2-VPP
Input)
Output Step)
Time (25 µs/div)
Time (25 µs/div)
C022
C023
图 6-23. Step Response (Gain = 50 V/V, 2-VPP
图 6-24. Step Response (Gain = 100 V/V, 2-VPP
Output Step)
Output Step)
Copyright © 2022 Texas Instruments Incorporated
10
Submit Document Feedback
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
Time (25 µs/div)
Time (5 µs/div)
C024
C025
VDIFF = 20 mV
VOUT at 50-V/V Gain = 1 V
VOUT at 25-V/V Gain = 500 mV
图 6-26. Gain Change Output Response (Gain = 25
图 6-25. Step Response (Gain = 200 V/V, 2-VPP
V/V to 50 V/V)
Output Step)
Time (5 µs/div)
Time (5 µs/div)
C026
C027
VDIFF = 20 mV
VOUT at 25-V/V Gain = 500 mV
VDIFF = 20 mV
VOUT at 50-V/V Gain = 1 V
VOUT at 100-V/V Gain = 2 V
VOUT at 200-V/V Gain = 4 V
图 6-27. Gain Change Output Response (Gain = 25 图 6-28. Gain Change Output Response (Gain = 50
V/V to 100 V/V)
V/V to 200 V/V)
Time (25 µs/div)
Time (5 µs/div)
C029
C028
VDIFF = 20 mV
VOUT at 100-V/V Gain = 2 V
VOUT at 200-V/V Gain = 4 V
图 6-29. Gain Change Output Response (Gain = 100
图 6-30. Gain Change Output Response From
V/V to 200 V/V)
Saturation (Gain = 50 V/V to 25 V/V)
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
11
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
Time (25 µs/div)
Time (25 µs/div)
C030
C031
图 6-31. Gain Change Output Response From
图 6-32. Gain Change Output Response From
Saturation (Gain = 100 V/V to 25 V/V)
Saturation (Gain = 200 V/V to 50 V/V)
Gain = 25 V/V
Gain = 100 V/V
Gain = 200 V/V
Gain = 50 V/V
Time (25 µs/div)
Time (5 µs/div)
C032
C033
图 6-33. Gain Change Output Response From
图 6-34. Common-Mode Voltage Transient
Saturation (Gain = 200 V/V to 100 V/V)
Response
Time (25 µs/div)
C034
图 6-35. Start-Up Response
Copyright © 2022 Texas Instruments Incorporated
12
Submit Document Feedback
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
7 Detailed Description
7.1 Overview
The INA225-Q1 is a 36-V, common-mode, zero-drift topology, current-sensing amplifier. This device features
a significantly higher signal bandwidth than most comparable precision, current-sensing amplifiers, reaching
up to 125 kHz at a gain of 100 V/V. A very useful feature present in the device is the built-in programmable
gain selection. To increase design flexibility with the device, a programmable gain feature is added that allows
changing device gain during operation in order to accurately monitor wider dynamic input signal ranges. Four
discrete gain levels (25 V/V, 50 V/V, 100 V/V, and 200 V/V) are available in the device and are selected using the
two gain-select terminals, GS0 and GS1.
7.2 Functional Block Diagram
VS
INA225
-
IN-
OUT
IN+
+
REF
Gain Select
GS0
GS1
GND
7.3 Feature Description
7.3.1 Selecting A Shunt Resistor
The device measures the differential voltage developed across a resistor when current flows through it. This
resistor is commonly referred to as a current-sensing resistor or a current-shunt resistor, with each term
commonly used interchangeably. The flexible design of the device allows a wide range of input signals to be
measured across this current-sensing resistor.
Selecting the value of this current-sensing resistor is based primarily on two factors: the required accuracy of the
current measurement and the allowable power dissipation across the resistor. The larger the voltage developed
across this resistor the more accurate of a measurement that can be made because of the fixed internal amplifier
errors. These fixed internal amplifier errors, which are dominated by the internal offset voltage of the device,
result in a larger measurement uncertainty when the input signal gets smaller. When the input signal gets larger,
the measurement uncertainty is reduced because the fixed errors become a smaller percentage of the signal
being measured.
A system design trade-off for improving the measurement accuracy through the use of the larger input signals
is the increase in the power dissipated across the current-sensing resistor. Increasing the value of the current-
shunt resistor increases the differential voltage developed across the resistor when current passes through it.
However, the power that is then dissipated across this component also increases. Decreasing the value of
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
13
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
the current-shunt resistor value reduces the power dissipation requirements of the resistor, but increases the
measurement errors resulting from the decreasing input signal. Finding the optimal value for the shunt resistor
requires factoring both the accuracy requirement of the application and allowable power dissipation into the
selection of the component. An increasing amount of very low ohmic value resistors are becoming available with
values reaching down to 200 μΩ with power dissipations of up to 5 W, thus enabling very large currents to be
accurately monitored using sensing resistors.
The maximum value for the current-sensing resistor that can be chosen is based on the full-scale current to
be measured, the full-scale input range of the circuitry following the device, and the device gain selected.
The minimum value for the current-sensing resistor is typically a design-based decision because maximizing
the input range of the circuitry following the device is commonly preferred. Full-scale output signals that are
significantly less than the full input range of the circuitry following the device output can limit the ability of the
system to exercise the full dynamic range of system control based on the current measurement.
7.3.1.1 Selecting A Current-Sense Resistor Example
The example in 表 7-1 is based on a set of application characteristics, including a 10-A full-scale current
range and a 4-V full-scale output requirement. The calculations for selecting a current-sensing resistor of an
appropriate value are shown in 表 7-1.
表 7-1. Calculating the Current-Sense Resistor, RSENSE
PARAMETER
EQUATION
RESULT
10 A
IMAX
Full-scale current
VOUT
Full-scale output voltage
4 V
Initial selection based on default
gain setting.
Gain
Gain selected
25 V/V
VDIFF
Ideal maximum differential input voltage
Shunt resistor value
VDiff = VOUT / Gain
160 mV
16 mΩ
1.6 W
RSHUNT
PRSENSE
VOS Error
RSHUNT = VDiff / IMAX
2
Current-sense resistor power dissipation
Offset voltage error
RSENSE x IMAX
(VOS / VDIFF ) x 100
0.094%
7.3.1.2 Optimizing Power Dissipation versus Measurement Accuracy
The example shown in 表 7-1 results in a maximum current-sensing resistor value of 16 mΩ to develop the
160 mV required to achieve the 4-V full-scale output with the gain set to 25 V/V. The power dissipated across
this 16-mΩ resistor at the 10-A current level is 1.6 W, which is a fairly high power dissipation for this component.
Adjusting the device gain allows alternate current-sense resistor values to be selected to ease the power
dissipation requirement of this component.
Copyright © 2022 Texas Instruments Incorporated
14
Submit Document Feedback
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
Changing the gain setting from 25 V/V to 100 V/V, as shown in 表 7-2, decreases the maximum differential input
voltage from 160 mV down to 40 mV, thus requiring only a 4-mΩ current-sensing resistor to achieve the
4-V output at the 10-A current level. The power dissipated across this resistor at the 10-A current level is
400 mW, significantly increasing the availability of component options to select from.
The increase in gain by a factor of four reduces the power dissipation requirement of the current-sensing resistor
by this same factor of four. However, with this smaller full-scale signal, the measurement uncertainty resulting
from the device fixed input offset voltage increases by the same factor of four. The measurement error resulting
from the device input offset voltage is approximately 0.1% at the 160-mV full-scale input signal for the 25-V/V
gain setting. Increasing the gain to 100 V/V and decreasing the full-scale input signal to 40 mV increases the
offset induced measurement error to 0.38%.
表 7-2. Accuracy and RSENSE Power Dissipation vs. Gain Setting
PARAMETER
EQUATION
RESULT
10 A
IMAX
Full-scale current
VOUT
Full-scale output voltage
4 V
Gain
Gain selected
100 V/V
40 mV
4 mΩ
VDIFF
Ideal maximum differential input voltage
Current-sense resistor value
Current-sense resistor power dissipation
Offset voltage error
VDiff = VOUT / Gain
RSENSE = VDiff / IMAX
RSENSE
PRSENSE
VOS Error
2
RSENSE x IMAX
0.4 W
0.375%
(VOS / VDIFF ) x 100
7.3.2 Programmable Gain Select
The device features a terminal-controlled gain selection in determining the device gain setting. Four discrete
gain options are available (25 V/V, 50 V/V, 100 V/V, and 200 V/V) on the device and are selected based on the
voltage levels applied to the gain-select terminals (GS0 and GS1). These terminals are typically fixed settings
for most applications but the programmable gain feature can be used to adjust the gain setting to enable wider
dynamic input range monitoring as well as to create an automatic gain control (AGC) network.
表 7-3 shows the corresponding gain values and gain-select terminal values for the device.
表 7-3. Gain Select Settings
GAIN
25 V/V
50 V/V
100 V/V
200 V/V
GS0
GND
GND
VS
GS1
GND
VS
GND
VS
VS
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
15
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
7.4 Device Functional Modes
7.4.1 Input Filtering
An obvious and straightforward location for filtering is at the device output; however, this location negates the
advantage of the low output impedance of the internal buffer. The input then represents the best location for
implementing external filtering. 图 7-1 shows the typical implementation of the input filter for the device.
RSHUNT
5-V Supply
Power
Supply
Load
CBYPASS
0.1 µF
RS
≤ 10 ꢀ
RS
≤ 10 ꢀ
VS
Device
1
CF
ƒ-3dB
=
2ŒRSCF
RINT
ƒ-3dB
-
Output
OUT
BIAS
+
RINT
REF
GS0
GS1
GND
图 7-1. Input Filter
Care must be taken in the selection of the external filter component values because these components can
affect device measurement accuracy. Placing external resistance in series with the input terminals creates an
additional error so these resistors should be kept as low of a value as possible with a recommended maximum
value of
10 Ω or less. Increasing the value of the input filter resistance beyond 10 Ω results in a smaller voltage signal
present at the device input terminals than what is developed across the current-sense shunt resistor.
The internal bias network shown in 图 7-1 creates a mismatch in the two input bias current paths when a
differential voltage is applied between the input terminals. Under normal conditions, where no external resistance
is added to the input paths, this mismatch of input bias currents has little effect on device operation or accuracy.
However, when additional external resistance is added (such as for input filtering), the mismatch of input bias
currents creates unequal voltage drops across these external components. The mismatched voltages result
in a signal reaching the input terminals that is lower in value than the signal developed directly across the
current-sensing resistor.
The amount of variance in the differential voltage present at the device input relative to the voltage developed
at the shunt resistor is based both on the external series resistance value (RS) and the internal input resistors
(RINT = 25 kΩ). The reduction of the shunt voltage reaching the device input terminals appears as a gain error
when comparing the output voltage relative to the voltage across the shunt resistor. A factor can be calculated to
determine the amount of gain error that is introduced by the addition of external series resistance.
Copyright © 2022 Texas Instruments Incorporated
16
Submit Document Feedback
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
The amount of error these external filter resistors introduce into the measurement can be calculated using the
simplified gain error factor in 方程式 1, where the gain error factor is calculated with 方程式 2.
50,000
Gain Error Factor =
(41 x RS) + 50,000
(1)
(1250 ´ RINT
)
Gain Error Factor =
(1250 ´ RS) + (1250 ´ RINT) + (RS ´ RINT
)
(2)
where:
•
•
RINT is the internal input impedance, and
RS is the external series resistance.
For example, using the gain error factor (方程式 1), a 10-Ω series resistance results in a gain error factor of
0.992. The corresponding gain error is then calculated using 方程式 3, resulting in a gain error of approximately
0.81% solely because of the external 10-Ω series resistors. Using 100-Ω filter resistors increases this gain error
to approximately 7.58% from these resistors alone.
Gain Error (%) = 1 œ Gain Error Factor
(3)
7.4.2 Shutting Down the Device
Although the device does not have a shutdown terminal, the low-power consumption allows for the device to be
powered from the output of a logic gate or transistor switch that can turn on and turn off the voltage connected to
the device power-supply terminal.
However, in current-shunt monitoring applications, there is also a concern for how much current is drained from
the shunt circuit in shutdown conditions. Evaluating this current drain involves considering the device simplified
schematic in shutdown mode, as shown in 图 7-2.
CBYPASS
0.1 µF
Shutdown
Control
Supply
Load
VS
Device
IN-
-
Output
Reference
Voltage
OUT
+
IN+
+
-
-
REF
GS0 GS1
GND
图 7-2. Shutting Down the Device
Note that there is typically a 525-kΩ impedance (from the combination of the 500-kΩ feedback and 25-kΩ input
resistors) from each device input to the REF terminal. The amount of current flowing through these terminals
depends on the respective configuration. For example, if the REF terminal is grounded, calculating the effect
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
17
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
of the 525-kΩ impedance from the shunt to ground is straightforward. However, if the reference or op amp
is powered while the device is shut down, the calculation is direct. Instead of assuming 525 kΩ to ground,
assume 525 kΩ to the reference voltage. If the reference or op amp is also shut down, some knowledge of the
reference or op amp output impedance under shutdown conditions is required. For instance, if the reference
source behaves similar to an open circuit when un-powered, little or no current flows through the 525-kΩ path.
7.4.3 Using the Device with Common-Mode Transients Above 36 V
With a small amount of additional circuitry, the device can be used in circuits subject to transients higher than
36 V (such as automotive applications). Use only zener diodes or zener-type transient absorbers (sometimes
referred to as transzorbs); any other type of transient absorber has an unacceptable time delay. Start by adding
a pair of resistors, as shown in 图 7-3, as a working impedance for the zener. Keeping these resistors as small
as possible is preferable, most often around 10 Ω. This value limits the impact on accuracy with the addition of
these external components, as described in the Input Filtering section. Larger values can be used if necessary
with the result having an impact on gain error. Because this circuit limits only short-term transients, many
applications are satisfied with a 10-Ω resistor along with conventional zener diodes of the lowest power rating
available. This combination uses the least amount of board space. These diodes can be found in packages as
small as SOT-523 or SOD-523.
RSHUNT
5-V Supply
Power
Supply
Load
CBYPASS
0.1µF
RPROTECT
≤ 10 ꢀ
VS
Device
IN-
-
Output
OUT
+
IN+
REF
GS0 GS1
GND
图 7-3. Device Transient Protection
Copyright © 2022 Texas Instruments Incorporated
18
Submit Document Feedback
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
8 Applications and Implementation
备注
以下应用部分中的信息不属于 TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。
8.1 Application Information
The INA225-Q1 measures the voltage developed across a current-sensing resistor when current passes through
it. The ability to drive the reference terminal to adjust the functionality of the output signal offers multiple
configurations discussed throughout this section.
8.2 Typical Applications
8.2.1 Microcontroller-Configured Gain Selection
RSHUNT
5-V Supply
Power
Supply
Load
CBYPASS
0.1 µF
VS
Device
IN-
-
OUT
ADC
Micro-
controller
+
IN+
GPIO
REF
GS0 GS1
GND
图 8-1. Microcontroller-Configured Gain Selection Schematic
8.2.1.1 Design Requirements
图 8-1 shows the typical implementation of the device interfacing with an analog-to-digital converter (ADC) and
microcontroller.
8.2.1.2 Detailed Design Procedure
In this application, the device gain setting is selected and controlled by the microcontroller to ensure the device
output is within the linear input range of the ADC. Because the output range of the device under a specific gain
setting approaches the linear output range of the INA225-Q1 itself or the linear input range of the ADC, the
microcontroller can adjust the device gain setting to ensure the signal remains within both the device and the
ADC linear signal range.
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
19
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
8.2.1.3 Application Curve
图 8-2 illustrates how the microcontroller can monitor the ADC measurements to determine if the device gain
setting should be adjusted to ensure the output of the device remains within the linear output range as well as
the linear input range of the ADC. When the output of the device rises to a level near the desired maximum
voltage level, the microcontroller can change the GPIO settings connected to the G0 and G1 gain-select
terminals to adjust the device gain setting, thus resulting in the output voltage dropping to a lower output range.
When the input current increases, the output voltage increases again to the desired maximum voltage level. The
microcontroller can again change the device gain setting to drop the output voltage back to a lower range.
250
200
150
100
50
5
4
3
2
1
0
Gain
Output Voltage
0
0
1
2
3
4
5
6
7
8
9
10
C035
Load Current (A)
图 8-2. Microcontroller-Configured Gain Selection Response
Copyright © 2022 Texas Instruments Incorporated
20
Submit Document Feedback
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
8.2.2 Unidirectional Operation
2.7-V to 36-V
Supply
Supply
Load
CBYPASS
0.1 µF
VS
Device
IN-
-
Output
OUT
+
IN+
REF
VS
GS0
GS1
GND
图 8-3. Unidirectional Application Schematic
8.2.2.1 Design Requirements
The device can be configured to monitor current flowing in one direction or in both directions, depending on
how the REF terminal is configured. For measuring current in one direction, only the REF terminal is typically
connected to ground as shown in 图 8-3. With the REF terminal connected to ground, the output is low with
no differential input signal applied. When the input signal increases, the output voltage at the OUT terminal
increases above ground based on the device gain setting.
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
21
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
8.2.2.2 Detailed Design Procedure
The linear range of the output stage is limited in how close the output voltage can approach ground under zero
input conditions. Resulting from an internal node limitation when the REF terminal is grounded (unidirectional
configuration) the device gain setting determines how close to ground the device output voltage can achieve
when no signal is applied; see 图 6-14. To overcome this internal node limitation, a small reference voltage
(approximately 10 mV) can be applied to the REF terminal to bias the output voltage above this voltage level.
The device output swing capability returns to the 10-mV saturation level with this small reference voltage
present.
At the lowest gain setting, 25 V/V, the device is capable of accurately measuring input signals that result in
output voltages below this 10-mV saturation level of the output stage. For these gain settings, a reference
voltage can be applied to bias the output voltage above this lower saturation level to allow the device to monitor
these smaller input signals. To avoid common-mode rejection errors, buffer the reference voltage connected to
the REF terminal.
A less frequently-used output biasing method is to connect the REF terminal to the supply voltage, VS. This
method results in the output voltage saturating at 200 mV below the supply voltage when no differential input
signal is present. This method is similar to the output saturated low condition with no input signal when the
REF terminal is connected to ground. The output voltage in this configuration only responds to negative currents
that develop negative differential input voltage relative to the device IN– terminal. Under these conditions, when
the differential input signal increases negatively, the output voltage moves downward from the saturated supply
voltage. The voltage applied to the REF terminal must not exceed the device supply voltage.
8.2.2.3 Application Curve
An example output response of a unidirectional configuration is shown in 图 8-4. With the REF terminal
connected directly to ground, the output voltage is biased to this zero output level. The output rises above
the reference voltage for positive differential input signals but cannot fall below the reference voltage for negative
differential input signals because of the grounded reference voltage.
0V
Output
Vref
Time (500 µs/div)
C036
图 8-4. Unidirectional Application Output Response
Copyright © 2022 Texas Instruments Incorporated
22
Submit Document Feedback
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
8.2.3 Bidirectional Operation
2.7-V to 36-V
Supply
Supply
Load
CBYPASS
0.1µF
VS
Device
IN-
-
Output
Reference
Voltage
OUT
+
IN+
+
-
REF
VS
GS0
GS1
GND
图 8-5. Bidirectional Application Schematic
8.2.3.1 Design Requirements
The device is a bidirectional, current-sense amplifier capable of measuring currents through a resistive shunt
in two directions. This bidirectional monitoring is common in applications that include charging and discharging
operations where the current flow-through resistor can change directions.
8.2.3.2 Detailed Design Procedure
The ability to measure this current flowing in both directions is enabled by applying a voltage to the REF
terminal, as shown in 图 8-5. The voltage applied to REF (VREF) sets the output state that corresponds to
the zero-input level state. The output then responds by increasing above VREF for positive differential signals
(relative to the IN– terminal) and responds by decreasing below VREF for negative differential signals. This
reference voltage applied to the REF terminal can be set anywhere between 0 V to VS. For bidirectional
applications, VREF is typically set at mid-scale for equal range in both directions. In some cases, however, VREF
is set at a voltage other than half-scale when the bidirectional current is non-symmetrical.
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
23
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
8.2.3.3 Application Curve
An example output response of a bidirectional configuration is shown in 图 8-6. With the REF terminal connected
to a reference voltage, 2.5 V in this case, the output voltage is biased upwards by this reference level. The
output rises above the reference voltage for positive differential input signals and falls below the reference
voltage for negative differential input signals.
Output
Vref
0V
Time (500 µs/div)
C037
图 8-6. Bidirectional Application Output Response
Copyright © 2022 Texas Instruments Incorporated
24
Submit Document Feedback
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
9 Power Supply Recommendations
The input circuitry of the device can accurately measure signals on common-mode voltages beyond its power
supply voltage, VS. For example, the voltage applied to the VS power supply terminal can be 5 V, whereas the
load power-supply voltage being monitored (the common-mode voltage) can be as high as +36 V. Note also that
the device can withstand the full –0.3-V to +36-V range at the input terminals, regardless of whether the device
has power applied or not.
Power-supply bypass capacitors are required for stability and should be placed as closely as possible to
the supply and ground terminals of the device. A typical value for this supply bypass capacitor is 0.1 μF.
Applications with noisy or high-impedance power supplies may require additional decoupling capacitors to reject
power-supply noise.
10 Layout
10.1 Layout Guidelines
•
Connect the input terminals to the sensing resistor using a Kelvin or 4-wire connection. This connection
technique ensures that only the current-sensing resistor impedance is detected between the input terminals.
Poor routing of the current-sensing resistor commonly results in additional resistance present between the
input terminals. Given the very low ohmic value of the current resistor, any additional high-current carrying
impedance can cause significant measurement errors.
•
The power-supply bypass capacitor should be placed as closely as possible to the supply and ground
terminals. The recommended value of this bypass capacitor is 0.1 μF. Additional decoupling capacitance can
be added to compensate for noisy or high-impedance power supplies.
10.2 Layout Example
VIA to Power or Ground Plane
VIA to Ground Plane
IN+
IN-
REF
GS1
GS0
Supply Bypass
Capacitor
GND
VS
Supply
Voltage
Output Signal Trace
OUT
图 10-1. Recommended Layout
备注
The layout shown has REF connected to ground for unidirectional operation. Gain-select terminals
(GS0 and GS1) are also connected to ground, indicating a 25-V/V gain setting.
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
25
Product Folder Links: INA225-Q1
INA225-Q1
www.ti.com.cn
ZHCSDE7A – FEBRUARY 2015 – REVISED MARCH 2021
11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
For related documentation see the following:
•
INA225EVM User's Guide, SBOU140
11.2 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
11.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅 TI
的《使用条款》。
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
11.5 静电放电警告
静电放电 (ESD) 会损坏这个集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理
和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参
数更改都可能会导致器件与其发布的规格不相符。
11.6 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2022 Texas Instruments Incorporated
26
Submit Document Feedback
Product Folder Links: INA225-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
INA225AQDGKRQ1
ACTIVE
VSSOP
DGK
8
2500 RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
IAAQ
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Sep-2020
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
INA225AQDGKRQ1
VSSOP
DGK
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Sep-2020
*All dimensions are nominal
Device
Package Type Package Drawing Pins
VSSOP DGK
SPQ
Length (mm) Width (mm) Height (mm)
366.0 364.0 50.0
INA225AQDGKRQ1
8
2500
Pack Materials-Page 2
重要声明和免责声明
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，
不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担
保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成
本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改
TI 针对 TI 产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2022，德州仪器 (TI) 公司
相关型号：
INA225_15
36-V, Programmable-Gain, Voltage-Output, Bidirectional, Zero-Drift Series,Current-Shunt Monitor
TI
INA226AIDGS
High-or Low-Side Measurement, Bi-Directional CURRENT/POWER MONITOR with I2C Interface
TI
INA226AIDGSR
High-or Low-Side Measurement, Bi-Directional CURRENT/POWER MONITOR with I2C Interface
TI
INA226AIDGST
High-or Low-Side Measurement, Bi-Directional CURRENT/POWER MONITOR with I2C Interface
TI
INA228-Q1_V01
INA228-Q1 AEC-Q100, 85-V, 20-Bit, Ultra-Precise Power/Energy/Charge Monitor With I2C Interface
TI
©2020 ICPDF网 联系我们和版权申明