INA216A3YFFR [TI]
Small size,Low-Power, Unidirectional, CURRENT SHUNT MONITOR Zero-Drift Series; 小尺寸,低功耗,单向,电流分流监控器零漂移系列型号: | INA216A3YFFR |
厂家: | TEXAS INSTRUMENTS |
描述: | Small size,Low-Power, Unidirectional, CURRENT SHUNT MONITOR Zero-Drift Series |
文件: | 总18页 (文件大小:437K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INA216
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SBOS503B –JUNE 2010–REVISED JUNE 2010
Small Size, Low-Power, Unidirectional,
CURRENT SHUNT MONITOR
Zerø-Drift Series
Check for Samples: INA216
1
FEATURES
DESCRIPTION
2
•
•
•
•
•
CHIP-SCALE PACKAGE
The INA216 is a high-side voltage output current
shunt monitor that can sense drops across shunts at
common-mode voltages from +1.8V to +5.5V. Four
fixed gains are available: 25V/V, 50V/V, 100V/V, and
200V/V. The low offset of the Zerø-Drift architecture
enables current sensing with maximum drops across
the shunt as low as 10mV full-scale, or with wide
dynamic ranges of over 1000:1.
COMMON-MODE RANGE: +1.8V to +5.5V
OFFSET VOLTAGE: ±30mV
GAIN ERROR: ±0.2% MAX
CHOICE OF GAINS:
–
–
–
–
INA216A1: 25V/V
INA216A2: 50V/V
INA216A3: 100V/V
INA216A4: 200V/V
These devices operate from a single +1.8V to +5.5V
power supply, drawing a maximum of 25mA of supply
current. The INA216 series are specified over the
temperature range of –40°C to +125°C, and offered
in a chip-scale package.
•
•
QUIESCENT CURRENT: 13mA
BUFFERED VOLTAGE OUTPUT: No Additional
Op Amp Needed
Shunt
Supply:
+1.8V to +5.5V
Load
APPLICATIONS
•
•
•
•
•
NOTEBOOK COMPUTERS
CELL PHONES
TELECOM EQUIPMENT
POWER MANAGEMENT
BATTERY CHARGERS
R1
R2
IN+
IN-
1.6MW
1.6MW
GND
OUT
PRODUCT
GAIN R1 = R2
INA216A1
INA216A2
INA216A3
INA216A4
25
50
64kW
32kW
16kW
8kW
100
200
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
INA216
SBOS503B –JUNE 2010–REVISED JUNE 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE INFORMATION(1)
PACKAGE
PRODUCT
INA216A1
INA216A2
INA216A3
INA216A4
GAIN
25V/V
50V/V
100V/V
200V/V
PACKAGE-LEAD
WCSP-4
DESIGNATOR
PACKAGE MARKING
YFF
YFF
YFF
YFF
OW
OX
OY
OZ
WCSP-4
WCSP-4
WCSP-4
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
Over operating free-air temperature range, unless otherwise noted.
INA216
UNIT
V
Supply Voltage
Analog Inputs,
+7
Differential (VIN+)–(VIN–
Common-Mode(3)
)
–5.5 to +5.5
V
(2)
VIN+, VIN–
GND–0.3V to +5.5
V
Output(3)
GND–0.3V to (V+)+0.3
V
Input Current into Any Pin(3)
Operating Temperature
Storage Temperature
5
–55 to +150
–65 to +150
+150
mA
°C
°C
°C
kV
kV
V
Junction Temperature
Human Body Model
2.5
ESD Ratings:
Charged Device Model
Machine Model
1
200
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
(2) VIN+ and VIN– are the voltages at the IN+ and IN– pins, respectively.
(3) Input voltage at any pin may exceed the voltage shown if the current at that pin is limited to 5mA.
PIN CONFIGURATION
YFF PACKAGE
WCSP-4
(TOP VIEW)
A2
A1
B2
B1
IN-
OUT
GND
IN+
(1) Bump side down. Drawing not to scale.
(2) Power supply is derived from shunt (minimum common-mode range = 1.8V)
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SBOS503B –JUNE 2010–REVISED JUNE 2010
THERMAL INFORMATION
INA216A1YFF,
INA216A2YFF
INA216A3YFF,
THERMAL METRIC(1)
UNITS
INA216A4YFF
YFF
4
qJA
Junction-to-ambient thermal resistance(2)
Junction-to-case(top) thermal resistance(3)
Junction-to-board thermal resistance(4)
160
75
qJC(top)
qJB
76
°C/W
yJT
Junction-to-top characterization parameter(5)
Junction-to-board characterization parameter(6)
Junction-to-case(bottom) thermal resistance(7)
3
yJB
74
qJC(bottom)
n/a
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, yJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining qJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, yJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining qJA , using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
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ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TA = –40°C to +125°C.
At TA = +25°C and VCM = VIN+= 4.2V, unless otherwise noted.
INA216
TYP
PARAMETER
CONDITIONS
MIN
MAX
UNIT
INPUT
Offset Voltage, RTI(1)
VOS
dVOS/dT
dVOS/dT
dVOS/dT
INA216A1
±30
0.06
±20
0.05
±20
0.03
±20
0.1
±100
0.2
mV
mV/°C
mV
vs Temperature
INA216A2
±75
0.25
±75
0.25
±75
0.3
vs Temperature
INA216A3
mV/°C
mV
vs Temperature
INA216A4
mV/°C
mV
vs Temperature
Common-Mode Input Range
Common-Mode Rejection(2)
Power-Supply Rejection
Input Bias Current
OUTPUT
dVOS/dT
VCM
mV/°C
V
1.8
90
90
5.5
CMRR
PSRR
IIN–
VIN+ = +1.8V to +5.5V
108
108
3
dB
dB
mA
Gain
G
INA216A1
25
50
V/V
V/V
V/V
V/V
INA216A2
INA216A3
100
200
INA216A4
Gain Error
INA216A1
VOUT = 0.2V to VOUT = 2.5V
±0.01
0.01
±0.2
0.025
±0.2
0.1
%
m%/°C
%
vs Temperature
INA216A2
VOUT = 0.2V to VOUT = 2.5V
0.05
vs Temperature
INA216A3
0.017
0.06
m%/°C
%
±0.2
0.1
vs Temperature
INA216A4
0.023
0.03
m%/°C
%
±0.2
0.3
vs Temperature
Nonlinearity Error
Maximum Capacitive Load
VOLTAGE OUTPUT(3)
Swing to V+ Power-Supply Rail
Swing to GND(3)
Output Impedance
FREQUENCY RESPONSE
Bandwidth
0.076
±0.01
750
m%/°C
%
No sustained oscillation
pF
RL = 10kΩ to GND
(V+) –0.1
(VGND) +0.001
42
(V+) –0.3
V
V
Ω
(VGND) +0.002
BW
CLOAD = 10pF
INA216A1
20
10
5
kHz
kHz
kHz
kHz
INA216A2
INA216A3
INA216A4
2.5
(1) RTI: Referred-to-input.
(2) CMRR and PSRR are the same because VCM is the supply voltage.
(3) See Typical Characteristics graph, Output Swing to Rail (Figure 9).
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ELECTRICAL CHARACTERISTICS (continued)
Boldface limits apply over the specified temperature range, TA = –40°C to +125°C.
At TA = +25°C and VCM = VIN+= 4.2V, unless otherwise noted.
INA216
PARAMETER
FREQUENCY RESPONSE, continued
Slew Rate
CONDITIONS
MIN
TYP
0.03
60
MAX
UNIT
V/ms
SR
NOISE, RTI(4)
Voltage Noise Density
POWER SUPPLY
nV/√Hz
Specified Range
VIN+
+1.8
+5.5
25
V
Quiescent Current
IQ
13
mA
mA
ms
Over Temperature
30
TURN-ON TIME
VIN+ = 0 to +2.5V; VSENSE = 10mV; VOUT ±0.5%
200
TEMPERATURE RANGE
Specified Temperature Range
–40
+125
°C
(4) RTI: Referred-to-input.
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TYPICAL CHARACTERISTICS
The INA216A1 is used for typical characteristic measurements at TA = +25°C, VS = +4.2V, unless otherwise noted.
INPUT OFFSET VOLTAGE PRODUCTION DISTRIBUTION
OFFSET VOLTAGE vs TEMPERATURE
100
80
11,604 Units Sampled
60
40
20
0
-20
-40
-60
-80
-100
-60 -40 -20
0
20 40 60 80 100 120 140 160
Temperature (°C)
Offset Voltage (mV)
Figure 1.
Figure 2.
COMMON-MODE REJECTION RATIO vs TEMPERATURE
GAIN ERROR vs TEMPERATURE
8
7
0.04
0.03
0.02
0.01
0
Eight Typical Units
6
5
4
3
2
-0.01
-0.02
-0.03
-0.04
1
0
-1
-2
-60 -40 -20
0
20 40 60 80 100 120 140 160
-60 -40 -20
0
20 40 60 80 100 120 140 160
Temperature (°C)
Temperature (°C)
Figure 3.
Figure 4.
QUIESCENT CURRENT AND NEGATIVE INPUT BIAS
CURRENT vs TEMPERATURE
GAIN vs FREQUENCY
55
45
35
25
15
5
16
14
12
10
8
VSENSE = 10mV Sine
INA216A4
INA216A3
INA216A2
IQ
INA216A1
6
IB-
4
2
-5
0
-60 -40 -20
0
20 40 60 80 100 120 140 160
100
1k
10k
100k
1M
Temperature (°C)
Frequency (Hz)
Figure 5.
Figure 6.
6
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SBOS503B –JUNE 2010–REVISED JUNE 2010
TYPICAL CHARACTERISTICS (continued)
The INA216A1 is used for typical characteristic measurements at TA = +25°C, VS = +4.2V, unless otherwise noted.
QUIESCENT CURRENT AND NEGATIVE INPUT BIAS
COMMON-MODE REJECTION RATIO vs FREQUENCY
CURRENT vs VSENSE
140
16
14
12
10
8
120
100
80
60
40
20
0
IQ
Normal Range
of Operation
6
IB-
4
2
0
-2
-0.4 -0.3 -0.2
0.1
0
0.1
0.2
0.3
0.4
1
10
100
1k
10k
100k
Frequency (Hz)
VSENSE (mV)
Figure 7.
Figure 8.
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
INPUT-REFERRED VOLTAGE NOISE vs FREQUENCY
V+
180
TA = -40?C
TA = +25?C
TA = +125?C
(V+) - 0.05
(V+) - 0.10
(V+) - 0.15
(V+) - 0.20
(V+) - 0.25
(V+) - 0.30
140
100
Sourcing
GND + 0.30
GND + 0.25
GND + 0.20
GND + 0.15
GND + 0.10
GND + 0.05
GND
60
20
Sinking
5
0
1
2
3
4
6
1
10
100
1k
10k
Output Current (mA)
Frequency (Hz)
Figure 9.
Figure 10.
STEP RESPONSE
0.1Hz to 10Hz VOLTAGE NOISE, RTI
(80mVPP Input Step)
2VPP Output Signal
80mVPP Input Signal
Time (1s/div)
Time (100ms/div)
Figure 11.
Figure 12.
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TYPICAL CHARACTERISTICS (continued)
The INA216A1 is used for typical characteristic measurements at TA = +25°C, VS = +4.2V, unless otherwise noted.
COMMON-MODE VOLTAGE TRANSIENT RESPONSE
INVERTING DIFFERENTIAL INPUT OVERLOAD
Common-Mode
Voltage Step
Output Signal
0V
0V
Inverting Input
Overload Signal
Output Voltage
VSENSE = 100mV
Time (100ms/div)
Time (100ms/div)
Figure 13.
Figure 14.
NONINVERTING DIFFERENTIAL INPUT OVERLOAD
STARTUP RESPONSE
Common-Mode/
Supply Voltage
Output Signal
Noninverting Input
Overload Signal
Output
Voltage
Time (100ms/div)
Time (100ms/div)
Figure 15.
Figure 16.
BROWNOUT RECOVERY
Common-Mode/
Supply Voltage
Output
Voltage
Time (100ms/div)
Figure 17.
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SBOS503B –JUNE 2010–REVISED JUNE 2010
APPLICATION INFORMATION
Basic Connections
VCM
IN+
GND
Figure 18 shows the basic connections of the
INA216. The input pins, IN+ and IN–, should be
connected as closely as possible to the shunt resistor
to minimize any resistance in series with the shunt
resistance.
RP
RSHUNT
VOUT
RP
IN-
INA216
VCM = 1.8 V
to 5.5V
Load
IN+
GND
RSHUNT
VOUT
Figure 20. Shunt Resistance Measurement Using
a Kelvin Connection
IN-
INA216
Load
Power Supply
The INA216 does not have a dedicated power-supply
pin. Instead, an internal connection to the IN+ pin
serves as the power supply for this device. Because
the INA216 is powered from the IN+ pin, the
common-mode input range is limited on the low end
to 1.8V. Therefore, the INA216 cannot be used as a
low-side current shunt monitor.
Figure 18. Typical Application
Figure 19 illustrates the INA216 connected to a shunt
resistor with additional trace resistance in series with
the shunt placed between where the current shunt
monitors the input pins. With the typically low shunt
resistor values commonly used in these applications,
even small amounts of additional impedance in series
with the shunt resistor can significantly affect the
differential voltage present at the INA216 input pins.
Selecting RS
The selection of the value of the shunt resistor (RS) to
use with the INA216 is based on the specific
operating conditions and requirements of the
application. The starting point for selecting the
resistor is to first determine the desired full-scale
output from the INA216. The INA216 is available in
four gain options: 25, 50, 100, and 200. By dividing
the desired full-scale output by each of the gain
options, there are then four available differential input
voltages that can achieve the desired full-scale output
voltage, given that the appropriate gain device is
used. With four values for the total voltage that is to
be dropped across the shunt, the decision on how
much of a drop is allowed in the application must be
made. Most applications have a maximum drop
allowed to ensure that the load receives the required
voltage necessary to operate. Assuming that there
are now multiple shunt voltages that are acceptable
(based on the design criteria), the choice of what
value shunt resistor to use can be made based on
accuracy. As a result of the INA216 auto-zero
architecture, the input offset voltage is extremely low.
However, even the 100mV maximum input offset
voltage specification plays a role in the decision of
which shunt resistor value to choose. With a larger
shunt voltage present at the current shunt monitor
input, less error is introduced by the input offset
voltage.
VCM
IN+
GND
RP
RSHUNT
VOUT
RP
IN-
INA216
Load
Figure 19. Shunt Resistance Measurement
Including Trace Resistance, RP
Figure 20 shows a proper Kelvin, or four-wire,
connection of the shunt resistor to the INA216 input
pins. This connection helps ensure that the only
impedance between the current monitor input pins is
the shunt resistor.
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These comments have framed the decision on what
the shunt resistor value should be, based on the
full-scale value; but many applications require
accurate measurements at levels as low as 10% of
the full-scale value. At this level, the input offset
voltage of the current shunt monitor becomes a larger
percentage of the shunt voltage, and thus contributes
a larger error to the output. The percentage of error
created by the input offset voltage relative to the
shunt voltage is shown in Equation 1.
Calculating Total Error
The electrical specifications for the INA216 include
the typical individual errors terms such as gain error,
offset error, and nonlinearity error. Total error
including all of these individual error components is
not specified in the Electrical Characteristics table. To
accurately calculate the error that can be expected
from the device, we must first know the operating
conditions to which the device is subjected. Some
current shunt monitors specify a total error in the
product data sheet. However, this total error term is
accurate under only one particular set of operating
conditions. Specifying the total error at this one point
has little practical value, though, because any
deviation from these specific operating conditions no
longer yields the same total error value. This section
discusses the individual error sources, with
information on how to apply them in order to calculate
the total error value for the device under normal
operating conditions.
VOS
Error_VOS
=
? 100
VSENSE
(1)
Ideally, the differential input voltage at 10% would be
increased to minimize the effects of the input offset
voltage; however, we are bound by the full-scale
value. The full-scale output voltage on the INA216 is
limited to 200mV below the supply voltage (IN+).
Selecting a shunt resistor to increase the shunt
voltage at the low operating range of the load current
could easily saturate the output of the current shunt
monitor at the full-scale load current. For applications
where accuracy over a larger range is needed, a
lower gain option (and therefore, a larger differential
input voltage) is selected. For applications where a
minimal voltage drop on the line that powers the load
is required, a higher gain option (and so, a smaller
differential input voltage) is selected.
The typical error sources that have the largest impact
on the total error of the device are input offset
voltage, common-mode voltage rejection, gain error,
and nonlinearity error.
The nonlinearity error of the INA216 is relatively low
compared to the gain error specification, which
results in a gain error that can be expected to be
relatively constant throughout the linear input range of
the device. While the gain error remains constant
across the linear input range of the device, the error
associated with the input offset voltage does not. As
the differential input voltage developed across a
shunt resistor at the input of the INA216 decreases,
the inherent input offset voltage of the device
becomes a larger percentage of the measured input
signal, resulting in an increase in measurement error.
This varying error is present among all current shunt
monitors, given the input offset voltage ratio to the
voltage being sensed by the device. The low input
offset voltages present in the INA216 devices,
however, limit the amount of contribution the offset
voltage has on the total error term.
For example, consider a design that requires a
full-scale output voltage of 4V, a maximum load
current of 10A, and a maximum voltage drop on the
common-mode line of 25mV. The 25mV maximum
voltage drop requirement and a 4V full-scale output
limits the gain option to the 200V/V device. A 100V/V
setting would require a maximum voltage drop of
40mV with the other two lower gain versions creating
larger voltage drops. Based on the gain of 200 on a
4V full-scale output, the maximum differential input
voltage would be 20mV. The shunt resistor needed to
create a 20mV drop with a 10A load current is 2mΩ.
When choosing the proper shunt resistor, it is also
important to consider that at higher currents, the
power dissipation in the shunt resistor becomes
greater. Therefore, it is important to evaluate the drift
of the sense resistor as a result of power dissipation,
and choose an appropriate resistor based on its
power wattage rating.
Two examples are provided that detail how different
operating conditions can affect the total error
calculations. Typical and maximum calculations are
shown as well to provide the user more information
on how much error variance could be present from
device to device.
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Example 1
Conditions: INA216A3; VCM = VS = 3.3V; VSENSE = 20mV
Table 1. Example 1
TERM
LABEL
EQUATION
TYPICAL
MAXIMUM
Maximum initial input
offset voltage
VIO
—
20mV
75mV
Added input offset
voltage as result of
common-mode
voltage
1
· |4.2V - VCM
|
CMRR_dB
20
VIO_CM
3.6mV
28mV
(
(
10
(VIO)2 + (VIO_CM)2
Total input offset
voltage
VIO_Total
Error_VIO
20mV
80mV
VIO_Total
Error because of
input offset voltage
· 100
0.1%
0.4%
VSENSE
Gain error
Error_Gain
Error_Lin
—
—
0.06%
0.01%
0.2%
Nonlinearity error
0.01%
(Error_VIO)2 + (Error_Gain)2 + (Error_Lin)2
Total error
0.12%
0.45%
Example 2
Conditions: INA216A1; VCM = VS = 5V; VSENSE = 160mV
Table 2. Example 2
TERM
LABEL
EQUATION
TYPICAL
MAXIMUM
Maximum initial input
offset voltage
VIO
—
30mV
100mV
Added input offset
voltage as result of
common-mode
voltage
1
· |4.2V - VCM
|
CMRR_dB
20
VIO_CM
3.1mV
25.2mV
(
(
10
(VIO)2 + (VIO_CM)2
Total input offset
voltage
VIO_Total
Error_VIO
30mV
100mV
VIO_Total
Error because of
input offset voltage
· 100
0.02%
0.06%
VSENSE
Gain error
Error_Gain
Error_Lin
—
—
0.01%
0.01%
0.2%
Nonlinearity error
0.01%
(Error_VIO)2 + (Error_Gain)2 + (Error_Lin)2
Total error
0.025%
0.21%
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Input Filtering
driving any current). Connecting a 100kΩ load to the
4V output now increases the current by an additional
40mA. This increase in current flowing through the
IN+ pin would change the additional gain error from
0.3% to 1.3%.
An ideal location where filtering is implemented is at
the inputs for a device. Placing an input filter in front
of the INA216, though, is not recommended but can
be implemented if it is determined to be necessary.
This location is not recommended for filtering
because adding input filters induces an additional
gain error to the device that can easily exceed the
device maximum gain error specification of 0.2%. In
the INA216, the nominal current into the IN+ pin is in
the range of 13mA while the bias current into the IN–
pin is in the range of approximately 3mA. The current
flowing into the IN+ pin includes both the input bias
current as well as the quiescent current. Where the
issue of input filtering begins to become more of an
issue is that as the quiescent current of the INA216
also flows through the IN+ pin, when the output
begins to drive current, this additional current also
flows through the IN+ pin, creating an even larger
error.
If filtering is required for the application and the gain
error introduced by the input filter resistors exceeds
the available error budget for this circuit, a filter can
be implemented following the INA216. Placing a filter
at the output of the current shunt monitor is not
typically the ideal location because the benefit of the
low impedance output of the amplifier is lost.
Applications that require the low impedance output
require an additional buffer amplifier that follows the
post current shunt monitor filter.
Using the INA216 With Transients Above 5.5V
With a small amount of additional circuitry, INA216
can be used in circuits subject to transients higher
than 5.5V. Use only zener diode or zener-type
transient absorbers, which are sometimes referred to
as Transzorbs. Any other type of transient absorber
has an unacceptable time delay. To use these
protection devices, resistors are required in series
with the INA216 inputs, as shown in Figure 22. These
resistors serve as a working impedance for the zener.
It is desirable to keep these resistors as small as
possible because of the error described in the Input
Filtering section. These protection resistors are most
often around 10Ω. Larger values can be used with a
greater impact to the total gain error. Because this
circuit limits only short-term transients, many
applications are satisfied with a 10Ω resistor along
with conventional zener diodes of the lowest power
rating that can be found. This combination uses the
least amount of board space. These diodes can be
found in packages as small as SOT-523 or SOD-523.
The use of these protection components may allow
the INA216 to survive from being damaged in
environments where large transients are common.
Placing a typical common-mode filter of 10Ω in series
with each input and a 0.1mF capacitor across the
input pins, as shown in Figure 21, introduces an
additional gain error into the system. For example,
consider an application using the INA216A3 with a
full-scale output of 4V, assuming that the device is
not driving any output current. The shunt voltage
needed to create the 4V output with a gain of 100 is
40mV. With 10Ω filter resistors on each input, there is
a difference voltage created that subtracts from the
40mV full-scale differential current. The error can be
calculated using Equation 2.
(IIN+-IIN-) ? RFILTER
Error_RFILTER
=
? 100
VSHUNT
(2)
RFILTER
? 10W
VCM
IN+
GND
RSHUNT
CFILTER
VOUT
RFILTER
RPROTECT
? 10W
? 10W
VCM
IN-
IN+
GND
INA216
Load
Z1
RSHUNT
VOUT
RPROTECT
? 10W
IN-
Figure 21. Input Filter
INA216
Z2
Load
As mentioned previously, the current flowing into the
IN+ pin increases once the output begins to drive
current because of the quiescent current also flowing
into the IN+ pin. The previous example resulted in an
additional gain error of 0.3% as a result of the 10Ω
filter resistors (assuming the output stage was not
Figure 22. Transient Protection Using Dual Zener
Diodes
12
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): INA216
INA216
www.ti.com
SBOS503B –JUNE 2010–REVISED JUNE 2010
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (June, 2010) to Revision B
Page
•
•
•
•
•
•
•
Removed product preview status of INA216A2, INA216A3, and INA216A4 devices ........................................................... 2
Added offset voltage specifications for INA216A2, INA216A3, and INA216A4 .................................................................... 4
Added gain and gain error specifications for INA216A2, INA216A3, and INA216A4 ........................................................... 4
Added bandwidth specifications for INA216A2, INA216A3, and INA216A4 ......................................................................... 4
Updated graph grid for Figure 2 through Figure 5 ................................................................................................................ 6
Revised Table 1 and Table 2 .............................................................................................................................................. 11
Changed description of nominal current into IN+ pin to 13mA and bias current into IN– pin to 3mA .................................. 12
Changes from Original (June, 2010) to Revision A
Page
•
•
Changed offset voltage vs temperature specification ........................................................................................................... 4
Changed gain error vs temperature specification and units ................................................................................................. 4
Copyright © 2010, Texas Instruments Incorporated
Submit Documentation Feedback
13
Product Folder Link(s): INA216
PACKAGE OPTION ADDENDUM
www.ti.com
23-Jun-2010
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
INA216A1YFFR
INA216A1YFFT
ACTIVE
ACTIVE
DSBGA
DSBGA
YFF
YFF
4
4
3000
250
Green (RoHS
& no Sb/Br)
SNAGCU Level-1-260C-UNLIM
Purchase Samples
Green (RoHS
& no Sb/Br)
SNAGCU Level-1-260C-UNLIM
Request Free Samples
INA216A2YFFR
INA216A2YFFT
INA216A3YFFR
INA216A3YFFT
INA216A4YFFR
INA216A4YFFT
PREVIEW
PREVIEW
PREVIEW
PREVIEW
PREVIEW
PREVIEW
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
YFF
YFF
YFF
YFF
YFF
YFF
4
4
4
4
4
4
3000
250
TBD
TBD
TBD
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Samples Not Available
Samples Not Available
Samples Not Available
Samples Not Available
Samples Not Available
Samples Not Available
3000
250
3000
250
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
23-Jun-2010
Addendum-Page 2
D: Max = 790 µm, Min = 730 µm
E: Max = 790 µm, Min = 730 µm
D: Max = 790 µm, Min = 730 µm
E: Max = 790 µm, Min = 730 µm
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