INA122U [TI]

单电源、微功耗仪表放大器 | D | 8;
INA122U
型号: INA122U
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

单电源、微功耗仪表放大器 | D | 8

放大器 仪表 光电二极管 仪表放大器
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INA122  
®
INA122  
INA122  
Single Supply, MicroPower  
INSTRUMENTATION AMPLIFIER  
APPLICATIONS  
PORTABLE, BATTERY OPERATED  
FEATURES  
LOW QUIESCENT CURRENT: 60µA  
SYSTEMS  
WIDE POWER SUPPLY RANGE  
Single Supply: 2.2V to 36V  
INDUSTRIAL SENSOR AMPLIFIER:  
Bridge, RTD, Thermocouple  
Dual Supply: –0.9/+1.3V to ±18V  
PHYSIOLOGICAL AMPLIFIER:  
COMMON-MODE RANGE TO (V–)–0.1V  
RAIL-TO-RAIL OUTPUT SWING  
ECG, EEG, EMG  
MULTI-CHANNEL DATA ACQUISITION  
LOW OFFSET VOLTAGE: 250µV max  
LOW OFFSET DRIFT: 3µV/°C max  
LOW NOISE: 60nV/Hz  
DESCRIPTION  
LOW INPUT BIAS CURRENT: 25nA max  
8-PIN DIP AND SO-8 SURFACE-MOUNT  
The INA122 is a precision instrumentation amplifier  
for accurate, low noise differential signal acquisition.  
Its two-op-amp design provides excellent performance  
with very low quiescent current, and is ideal for  
portable instrumentation and data acquisition systems.  
The INA122 can be operated with single power sup-  
plies from 2.2V to 36V and quiescent current is a mere  
60µA. It can also be operated from dual supplies. By  
utilizing an input level-shift network, input common-  
mode range extends to 0.1V below negative rail (single  
supply ground).  
V+  
7
INA122  
3
8
+
VIN  
6
VO  
+
V
O = (VIN – VIN) G  
100kΩ  
25kΩ  
A single external resistor sets gain from 5V/V to  
10000V/V. Laser trimming provides very low offset  
voltage (250µV max), offset voltage drift (3µV/°C  
max) and excellent common-mode rejection.  
200k  
RG  
G = 5 +  
25kΩ  
RG  
Package options include 8-pin plastic DIP and SO-8  
surface-mount packages. Both are specified for the  
–40°C to +85°C extended industrial temperature range.  
1
2
VIN  
100kΩ  
5
Ref  
4
V–  
International Airport Industrial Park  
Mailing Address: PO Box 11400, Tucson, AZ 85734  
FAXLine: (800) 548-6133 (US/Canada Only)  
• Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111  
Internet: http://www.burr-brown.com/  
Cable: BBRCORP  
Telex: 066-6491  
FAX: (520) 889-1510  
Immediate Product Info: (800) 548-6132  
©1997 Burr-Brown Corporation  
PDS-1388B  
Printed in U.S.A. October, 1997  
SBOS069  
SPECIFICATIONS  
At TA = +25°C, VS = +5V, RL = 20kconnected to VS/2, unless otherwise noted.  
INA122P, U  
TYP  
INA122PA, UA  
TYP  
PARAMETER  
CONDITIONS  
MIN  
MAX  
MIN  
MAX  
UNITS  
INPUT  
Offset Voltage, RTI  
vs Temperature  
vs Power Supply (PSRR)  
Input Impedance  
Safe Input Voltage  
±100  
±1  
±250  
±3  
±150  
±500  
±5  
µV  
µV/°C  
µV/V  
|| pF  
V
VS = +2.2V to +36V  
10  
1010 || 3  
30  
100  
RS = 0  
(V–)–0.3  
(V–)–40  
0
(V+)+0.3  
(V+)+40  
3.4  
RS = 10kΩ  
V
Common-Mode Voltage Range  
Common-Mode Rejection  
V
VCM = 0V to 3.4V  
83  
96  
76  
90  
dB  
INPUT BIAS CURRENT  
vs Temperature  
–10  
±40  
±1  
–25  
–50  
nA  
pA/°C  
nA  
Offset Current  
±2  
±5  
vs Temperature  
±40  
pA/°C  
GAIN  
G = 5 to 10k  
V/V  
V/V  
Gain Equation  
Gain Error  
G = 5 + 200k/RG  
G = 5  
G = 5  
±0.05  
5
±0.1  
10  
±0.15  
%
vs Temperature  
Gain Error  
ppm/°C  
%
G = 100  
±0.3  
±0.5  
±1  
vs Temperature  
Nonlinearity  
G = 100  
±25  
±100  
ppm/°C  
%
G = 100, VO = –14.85V to +14.9V  
±0.005  
±0.012  
±0.024  
NOISE (RTI)  
Voltage Noise, f = 1kHz  
f = 100Hz  
60  
100  
110  
2
nV/Hz  
nV/Hz  
nV/Hz  
µVp-p  
f = 10Hz  
fB = 0.1Hz to 10Hz  
Current Noise, f = 1kHz  
fB = 0.1Hz to 10Hz  
80  
2
fA/Hz  
pAp-p  
OUTPUT  
Voltage, Positive  
Negative  
VS = ±15V  
VS = ±15V  
(V+)–0.1 (V+)–0.05  
V
V
(V–)+0.15 (V–)+0.1  
Short-Circuit Current  
Capacitive Load Drive  
Short-Circuit to Ground  
+3/–30  
1
mA  
nF  
FREQUENCY RESPONSE  
Bandwidth, –3dB  
G = 5  
120  
kHz  
kHz  
kHz  
V/µs  
µs  
G = 100  
G = 500  
5
0.9  
Slew Rate  
+0.08/–0.16  
Settling Time, 0.01%  
G = 5  
G = 100  
350  
450  
1.8  
3
µs  
G = 500  
ms  
Overload Recovery  
50% Input Overload  
µs  
POWER SUPPLY  
Voltage Range, Single Supply  
Dual Supplies  
+2.2  
+5  
60  
+36  
±18  
85  
V
V
–0.9/+1.3  
Current  
IO = 0  
µA  
TEMPERATURE RANGE  
Specification  
–40  
–55  
–55  
+85  
+85  
°C  
°C  
°C  
Operation  
Storage  
+125  
Thermal Resistance, θJA  
8-Pin DIP  
150  
150  
°C/W  
°C/W  
SO-8 Surface-Mount  
Specification same as INA122P, INA122U.  
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes  
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change  
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant  
any BURR-BROWN product for use in life support devices and/or systems.  
®
2
INA122  
PIN CONFIGURATION  
ELECTROSTATIC  
DISCHARGE SENSITIVITY  
Top View  
8-Pin DIP, SO-8  
This integrated circuit can be damaged by ESD. Burr-Brown  
recommends that all integrated circuits be handled with ap-  
propriate precautions. Failure to observe proper handling and  
installation procedures can cause damage.  
RG  
1
2
3
4
8
7
6
5
RG  
V+  
VO  
Ref  
VIN  
+
VIN  
ESD damage can range from subtle performance degradation  
to complete device failure. Precision integrated circuits may  
be more susceptible to damage because very small parametric  
changes could cause the device not to meet its published  
specifications.  
V–  
ABSOLUTE MAXIMUM RATINGS(1)  
Supply Voltage, V+ to V– .................................................................... 36V  
Signal Input Terminals, Voltage(2) ....................... (V–)–0.3V to (V+)+0.3V  
Current(2) ...................................................... 5mA  
Output Short Circuit ................................................................. Continuous  
Operating Temperature ................................................. –40°C to +125°C  
Storage Temperature..................................................... –55°C to +125°C  
Lead Temperature (soldering, 10s) ............................................... +300°C  
NOTES: (1) Stresses above these ratings may cause permanent damage.  
(2) Input terminals are internally diode-clamped to the power supply rails.  
Input signals that can exceed the supply rails by more than 0.3V should be  
current-limited to 5mA or less.  
PACKAGE INFORMATION  
PACKAGE DRAWING  
PRODUCT  
PACKAGE  
NUMBER(1)  
INA122PA  
INA122P  
8-Pin DIP  
8-Pin DIP  
006  
006  
INA122UA  
INA122U  
SO-8 Surface Mount  
SO-8 Surface Mount  
182  
182  
NOTE: (1) For detailed drawing and dimension table, see end of data sheet, or  
Appendix C of Burr-Brown IC Data Book.  
®
3
INA122  
TYPICAL PERFORMANCE CURVES  
At TA = +25°C and VS = ±5V, unless otherwise noted.  
GAIN vs FREQUENCY  
70  
COMMON-MODE REJECTION vs FREQUENCY  
110  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
G = 1000  
60  
50  
G = 100  
40  
G = 1000  
G = 100  
G = 5  
30  
20  
10  
0
G = 20  
G = 5  
–10  
100  
1k  
10k  
Frequency (Hz)  
100k  
1M  
1M  
15  
1
10  
100  
1k  
10k  
100k  
Frequency (Hz)  
POSITIVE POWER SUPPLY REJECTION  
vs FREQUENCY  
NEGATIVE POWER SUPPLY REJECTION  
vs FREQUENCY  
100  
80  
60  
40  
20  
0
100  
80  
60  
40  
20  
0
G = 500  
G = 500  
G = 100  
G = 100  
G = 5  
G = 5  
100k  
10  
100  
1k  
10k  
1
10  
100  
1k  
10k  
100k  
Frequency (Hz)  
Frequency (Hz)  
INPUT COMMON-MODE RANGE  
vs OUTPUT VOLTAGE, VS = ±15V, G = 5  
INPUT COMMON-MODE VOLTAGE  
vs OUTPUT VOLTAGE, VS = ±5V, G = 5  
15  
10  
5
5
4
3
VS = ±5V  
2
VS = +5V/0V  
VREF = 2.5V  
+15V  
+
VD/2  
1
VO  
0
+
0
VD/2  
Ref  
+
–1  
–2  
–3  
–4  
–5  
VREF = 0V  
VCM  
–5  
–10  
–15  
–15V  
2
–15  
–10  
–5  
0
5
10  
–5  
–4 –3  
–2  
–1  
0
1
2
3
4
5
Output Voltage (V)  
Output Voltage (V)  
®
4
INA122  
TYPICAL PERFORMANCE CURVES (CONT)  
At TA = +25°C and VS = ±5V, unless otherwise noted.  
VOLTAGE and CURRENT NOISE DENSITY  
vs FREQUENCY (RTI)  
SETTLING TIME vs GAIN  
10  
1000  
100  
10  
10V Step  
1
0.01%  
VN  
0.1%  
IN  
0.1  
1
10  
100  
1k  
1
10  
100  
1k  
10k  
Gain (V/V)  
Frequency (Hz)  
INPUT-REFERRED OFFSET VOLTAGE WARM-UP  
QUIESCENT CURRENT vs TEMPERATURE  
10  
8
80  
Turn-on time 1ms. Settling time to  
final value depends on Gain—see  
settling time.  
6
60  
40  
20  
0
4
2
(Noise)  
0
–2  
–4  
–6  
–8  
–10  
0
1
2
3
4
5
6
7
8
9
10  
–75  
–50  
–25  
0
25  
50  
75  
100  
125  
Time After Turn-On (ms)  
Temperature (°C)  
OUTPUT VOLTAGE SWING  
vs OUTPUT CURRENT  
TOTAL HARMONIC DISTORTION+NOISE  
vs FREQUENCY  
V+  
(V+)–1  
(V+)–2  
(V–)+2  
(V–)+1  
V–  
1
0.1  
Sourcing Current  
G = 100  
0.01  
0.001  
G = 5  
RL = ∞  
RL = 25kΩ  
Sinking Current  
0
5
10  
15  
20  
25  
10  
100  
1k  
10k  
Output Current (mA)  
Frequency (Hz)  
®
5
INA122  
TYPICAL PERFORMANCE CURVES (CONT)  
At TA = +25°C and VS = ±5V, unless otherwise noted.  
SMALL-SIGNAL STEP RESPONSE  
G = 5  
SMALL-SIGNAL STEP RESPONSE  
G = 100  
50µs/div  
100µs/div  
INPUT-REFERRED NOISE VOLTAGE  
0.1Hz to 10Hz  
LARGE-SIGNAL STEP RESPONSE  
G = 5  
500ms/div  
50µs/div  
®
6
INA122  
offset adjustment. Figure 2 shows an optional circuit for  
trimming the output offset voltage. The voltage applied to  
the Ref terminal is added to the output signal. An op amp  
buffer is used to provide low impedance at the Ref terminal  
to preserve good common-mode rejection.  
APPLICATION INFORMATION  
Figure 1 shows the basic connections required for operation  
of the INA122. Applications with noisy or high impedance  
power supplies may require decoupling capacitors close to  
the device pins.  
The output is referred to the output reference (Ref) terminal  
which is normally grounded. This must be a low-impedance  
connection to ensure good common-mode rejection. A resis-  
tance of 10in series with the Ref pin will cause a typical  
device to degrade to approximately 80dB CMR.  
VIN  
V+  
VO  
RG  
INA122  
Ref  
100µA  
1/2 REF200  
+
VIN  
SETTING THE GAIN  
Gain of the INA122 is set by connecting a single external  
resistor, RG, as shown:  
100Ω  
100Ω  
10kΩ  
OPA336  
±10mV  
Adjustment Range  
200kΩ  
(1)  
G = 5 +  
RG  
Commonly used gains and RG resistor values are shown in  
Figure 1.  
100µA  
1/2 REF200  
The 200kterm in equation 1 comes from the internal metal  
film resistors which are laser trimmed to accurate absolute  
values. The accuracy and temperature coefficient of these  
resistors are included in the gain accuracy and drift specifi-  
cations of the INA122.  
V–  
FIGURE 2. Optional Trimming of Output Offset Voltage.  
The stability and temperature drift of the external gain  
setting resistor, RG, also affects gain. RG’s contribution to  
gain accuracy and drift can be directly inferred from the gain  
equation (1).  
INPUT BIAS CURRENT RETURN PATH  
The input impedance of the INA122 is extremely high—  
approximately 1010. However, a path must be provided for  
the input bias current of both inputs. This input bias current  
is approximately –10nA (current flows out of the input  
terminals). High input impedance means that this input bias  
current changes very little with varying input voltage.  
OFFSET TRIMMING  
The INA122 is laser trimmed for low offset voltage and  
offset voltage drift. Most applications require no external  
V+  
0.1µF  
DESIRED GAIN  
(V/V)  
RG  
()  
NEAREST 1%  
RG VALUE  
7
5
10  
20  
NC  
40k  
NC  
40.2k  
13.3k  
4420  
2100  
1020  
402  
200  
100  
40.2  
20  
INA122  
3
8
+
13.33k  
4444  
2105  
1026  
404  
201  
100.3  
40  
VIN  
50  
6
A1  
200kΩ  
RG  
100  
200  
500  
1000  
2000  
5000  
10000  
G = 5 +  
100kΩ  
25kΩ  
+
VO = (VIN – VIN) G  
25kΩ  
+
RG  
20  
Load  
VO  
NC: No Connection.  
1
2
A2  
VIN  
100kΩ  
5
Also drawn in simplified form:  
Ref  
4
+
3
8
VIN  
0.22µF  
6
Single Supply  
VO  
INA122  
RG  
1
2
Ref  
5
VIN  
V–  
Dual Supply  
FIGURE 1. Basic Connections.  
®
7
INA122  
Input circuitry must provide a path for this input bias current  
for proper operation. Figure 3 shows various provisions for an  
input bias current path. Without a bias current path, the inputs  
will float to a potential which exceeds the common-mode  
range of the INA122 and the input amplifiers will saturate.  
INPUT PROTECTION  
The inputs of the INA122 are protected with internal diodes  
connected to the power supply rails (Figure 4). These diodes  
will clamp the applied signal to prevent it from damaging the  
input circuitry. If the input signal voltage can exceed the  
power supplies by more than 0.3V, the input signal current  
should be limited to less than 5mA to protect the internal  
clamp diodes. This can generally be done with a series input  
resistor. Some signal sources are inherently current-limited  
and do not require limiting resistors.  
If the differential source resistance is low, the bias current  
return path can be connected to one input (see the thermo-  
couple example in Figure 3). With higher source impedance,  
using two equal resistors provides a balanced input with  
possible advantages of lower input offset voltage due to bias  
current and better high-frequency common-mode rejection.  
INPUT COMMON-MODE RANGE  
The common-mode range for some common operating con-  
ditions is shown in the typical performance curves. The  
INA122 can operate over a wide range of power supply and  
VREF configurations, making it impractical to provide a  
comprehensive guide to common-mode range limits for all  
possible conditions. The most commonly overlooked over-  
load condition occurs by attempting to exceed the output  
swing of A2, an internal circuit node that cannot be mea-  
sured. Calculating the expected voltages at A2’s output (see  
equation in Figure 4) provides a check for the most common  
overload conditions.  
Microphone,  
Hydrophone  
etc.  
INA122  
47kΩ  
47kΩ  
Thermocouple  
INA122  
The design of A1 and A2 are identical and their outputs can  
swing to within approximately 100mV of the power supply  
rails, depending on load conditions. When A2’s output is  
saturated, A1 can still be in linear operation, responding to  
changes in the non-inverting input voltage. This may give the  
appearance of linear operation but the output voltage is invalid.  
10kΩ  
INA122  
A single supply instrumentation amplifier has special design  
considerations. Using commonly available single-supply op  
amps to implement the two-op amp topology will not yield  
equivalent performance. For example, consider the condition  
where both inputs of common single-supply op amps are  
Center-tap provides  
bias current return.  
FIGURE 3. Providing an Input Common-Mode Current Path.  
V+  
+
V
IN + 0.5V  
+
A1  
VO  
VIN  
(3)  
(8)  
100kΩ  
25kΩ  
V–  
V+  
RG  
25kΩ  
RG  
+
)
25kΩ  
VO2 = 1.25VIN – (VIN – VIN  
+ 0.6V  
(1)  
(Voltages are referred to VREF  
)
(V–) + 0.1V V02 (V+) –0.1V  
V02  
A2  
VIN + 0.5V  
100kΩ  
VIN  
Ref  
(2)  
V–  
FIGURE 4. INA122 Simplified Circuit Diagram.  
®
8
INA122  
equal to 0V. The outputs of both A1 and A2 must be 0V. But  
any small positive voltage applied to VIN+ requires that A2’s  
output must swing below 0V, which is clearly impossible  
without a negative power supply.  
Operation at very low supply voltage requires careful atten-  
tion to ensure that the common-mode voltage remains within  
its linear range.  
To achieve common-mode range that extends to single-  
supply ground, the INA122 uses precision level-shifting  
buffers on its inputs. This shifts both inputs by approxi-  
mately +0.5V, and through the feedback network, shifts A2’s  
output by approximately +0.6V. With both inputs and VREF  
at single-supply, A2’s output is well within its linear range.  
LOW QUIESCENT CURRENT OPERATION  
The INA122 maintains its low quiescent current (60µA)  
while the output is within linear operation (up to 200mV  
from the supply rails). When the input creates a condition  
that overdrives the output into saturation, quiescent current  
increases. With VO overdriven into the positive rail, the  
quiescent current increases to approximately 400µA. Like-  
wise, with VO overdriven into the negative rail (single  
supply ground) the quiescent current increases to approxi-  
mately 200µA.  
+
A positive VIN causes A2’s output to swing below 0.6V.  
As a result of this input level-shifting, the voltages at pin 1  
and pin 8 are not equal to their respective input terminal  
voltages (pins 2 and 3). For most applications, this is not  
important since only the gain-setting resistor connects to  
these pins.  
OUTPUT CURRENT RANGE  
Output sourcing and sinking current values versus the output  
voltage ranges are shown in the typical performance curves.  
The positive and negative current limits are not equal.  
Positive output current sourcing will drive moderate to high  
load impedances. Battery operation normally requires the  
careful management of power consumption to keep load  
impedances very high throughout the design.  
LOW VOLTAGE OPERATION  
The INA122 can be operated on a single power supply as  
low as +2.2V (or a total of +2.2V on dual supplies). Perfor-  
mance remains excellent throughout the power supply range  
up to +36V (or ±18V). Most parameters vary only slightly  
throughout this supply voltage range—see typical perfor-  
mance curves.  
+5V  
REF200  
200µA  
(60µA)  
200mV  
+
VIN  
3
8
7
1kΩ  
VO = 0.1V to 4.9V  
VO  
V
CM 100mV  
6
RG  
INA122  
1
2
5
Ref(1)  
4
NOTE: (1) To accomodate bipolar input signals,  
VREF can be offset to a positive voltage. Output  
voltage is then referred to the voltage applied to Ref.  
VIN  
FIGURE 5. Micropower Single Supply Bridge Amplifier.  
V+  
+5V  
8
Load  
1
IL  
2.5A  
VREF  
+
6
VIN  
3
8
G = 100  
1kΩ  
D
Serial Data  
7
Shunt  
RS  
0.02Ω  
2
3
6
ADS7816  
12-Bit A/D  
50mV  
RG  
INA122  
+IN  
–IN  
1
2
5
0.47µF  
5
7
4
CS  
Chip Select  
Clock  
VIN  
CLK  
4
Differential measurement  
avoids ground loop errors.  
FIGURE 6. Single-Supply Current Shunt Measurement.  
®
9
INA122  
PACKAGE OPTION ADDENDUM  
www.ti.com  
14-Oct-2022  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
INA122P  
ACTIVE  
ACTIVE  
PDIP  
PDIP  
P
P
8
8
50  
50  
RoHS & Green  
RoHS & Green  
Call TI  
N / A for Pkg Type  
N / A for Pkg Type  
-40 to 85  
INA122P  
Samples  
Samples  
INA122PA  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
INA122P  
A
INA122PAG4  
INA122U  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
PDIP  
SOIC  
SOIC  
SOIC  
P
D
D
D
8
8
8
8
50  
75  
RoHS & Green  
RoHS & Green  
N / A for Pkg Type  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
INA122P  
A
Samples  
Samples  
Samples  
Samples  
INA  
122U  
INA122U/2K5  
INA122UA  
2500 RoHS & Green  
75 RoHS & Green  
INA  
122U  
INA  
122U  
A
INA122UA/2K5  
ACTIVE  
SOIC  
D
8
2500 RoHS & Green  
Call TI  
Level-3-260C-168 HR  
INA  
122U  
A
Samples  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
14-Oct-2022  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
3-Jun-2022  
TAPE AND REEL INFORMATION  
REEL DIMENSIONS  
TAPE DIMENSIONS  
K0  
P1  
W
B0  
Reel  
Diameter  
Cavity  
A0  
A0 Dimension designed to accommodate the component width  
B0 Dimension designed to accommodate the component length  
K0 Dimension designed to accommodate the component thickness  
Overall width of the carrier tape  
W
P1 Pitch between successive cavity centers  
Reel Width (W1)  
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE  
Sprocket Holes  
Q1 Q2  
Q3 Q4  
Q1 Q2  
Q3 Q4  
User Direction of Feed  
Pocket Quadrants  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
INA122U/2K5  
SOIC  
SOIC  
D
D
8
8
2500  
2500  
330.0  
330.0  
12.4  
12.4  
6.4  
6.4  
5.2  
5.2  
2.1  
2.1  
8.0  
8.0  
12.0  
12.0  
Q1  
Q1  
INA122UA/2K5  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
3-Jun-2022  
TAPE AND REEL BOX DIMENSIONS  
Width (mm)  
H
W
L
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
INA122U/2K5  
SOIC  
SOIC  
D
D
8
8
2500  
2500  
356.0  
356.0  
356.0  
356.0  
35.0  
35.0  
INA122UA/2K5  
Pack Materials-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
3-Jun-2022  
TUBE  
T - Tube  
height  
L - Tube length  
W - Tube  
width  
B - Alignment groove width  
*All dimensions are nominal  
Device  
Package Name Package Type  
Pins  
SPQ  
L (mm)  
W (mm)  
T (µm)  
B (mm)  
INA122P  
INA122PA  
INA122PAG4  
INA122U  
P
P
P
D
D
PDIP  
PDIP  
PDIP  
SOIC  
SOIC  
8
8
8
8
8
50  
50  
50  
75  
75  
506  
506  
13.97  
13.97  
13.97  
8
11230  
11230  
11230  
3940  
4.32  
4.32  
4.32  
4.32  
4.32  
506  
506.6  
506.6  
INA122UA  
8
3940  
Pack Materials-Page 3  
IMPORTANT NOTICE AND DISCLAIMER  
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE  
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”  
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY  
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD  
PARTY INTELLECTUAL PROPERTY RIGHTS.  
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate  
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable  
standards, and any other safety, security, regulatory or other requirements.  
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an  
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license  
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you  
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these  
resources.  
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with  
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for  
TI products.  
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2022, Texas Instruments Incorporated  

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