DRV5055A1ELPGQ1 [TI]
具有模拟输出的汽车类、比例式线性霍尔效应传感器 | LPG | 3 | -40 to 150;型号: | DRV5055A1ELPGQ1 |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有模拟输出的汽车类、比例式线性霍尔效应传感器 | LPG | 3 | -40 to 150 传感器 |
文件: | 总30页 (文件大小:2194K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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DRV5055-Q1
ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
DRV5055-Q1汽车比例式线性霍尔效应传感器
1 特性
3 说明
1
•
•
•
•
比例式线性霍尔效应磁传感器
DRV5055-Q1 是一款线性霍尔效应传感器,可按比例
响应磁通量密度。该器件可用于进行精确的位置检测,
应用范围 广泛应用中的电源管理要求。
由 3.3V 和 5V 电源供电
模拟输出,提供 VCC/2 静态失调电压
磁性灵敏度选项(VCC = 5V 时):
该器件由 3.3V 或 5V 电源供电。当不存在磁场时,模
拟输出可驱动 1/2 VCC。输出会随施加的磁通量密度呈
线性变化,五个灵敏度选项可以根据所需的感应范围提
供最大的输出电压摆幅。南北磁极产生唯一的电压。
–
–
–
–
–
A1:100mV/mT,±21mT 范围
A2:50mV/mT,±42mT 范围
A3:25mV/mT,±85mT 范围
A4:12.5mV/mT,±169mT 范围
A5:–100mV/mT,±21-mT 范围
它可检测垂直于封装顶部的磁通量,而且两个封装选项
提供不同的检测方向。
•
•
•
•
高速 20kHz 传感带宽
低噪声输出,具有 ±1mA 驱动器
磁体温漂补偿
该器件使用比例式架构,当外部模数转换器 (ADC) 使
用相同的 VCC 作为其基准电压时,可以消除 VCC 容差
产生的误差。此外,该器件 还具有 磁体温度补偿功
能,可以抵消磁体漂移,在较宽的 –40°C 至 +150°C
温度范围内实现线性性能。
符合面向汽车应用的 AEC-Q100 标准:
–
温度等级 0 级:-40°C 至 150°C
•
标准行业封装:
–
–
表面贴装 SOT-23
穿孔 TO-92
器件信息(1)
器件型号
封装
SOT-23 (3)
TO-92 (3)
封装尺寸(标称值)
2.92mm × 1.30mm
4.00mm × 3.15mm
2 应用
DRV5055-Q1
•
•
•
•
•
•
•
汽车位置检测
(1) 要了解所有可用封装,请参阅数据表末尾的可订购产品附录。
制动、加速、离合踏板
扭矩传感器、变速杆
节气门位置、高度找平
动力传动系统和变速系统组件
绝对值角度编码
电流检测
典型原理图
磁响应(A1、A2、A3、A4 版本)
OUT
VCC
VCC
VL (MAX)
DRV5055-Q1
VCC
Controller
OUT
GND
ADC
VCC /2
VL (MIN)
0 V
B
north
0 mT
south
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SBAS639
DRV5055-Q1
ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
www.ti.com.cn
目录
7.4 Device Functional Modes........................................ 13
Application and Implementation ........................ 14
8.1 Application Information............................................ 14
8.2 Typical Application .................................................. 15
8.3 Do's and Don'ts ...................................................... 17
Power Supply Recommendations...................... 18
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 3
6.1 Absolute Maximum Ratings ...................................... 3
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 4
6.6 Magnetic Characteristics........................................... 5
6.7 Typical Characteristics.............................................. 6
Detailed Description .............................................. 9
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................... 9
8
9
10 Layout................................................................... 18
10.1 Layout Guidelines ................................................. 18
10.2 Layout Examples................................................... 18
11 器件和文档支持 ..................................................... 19
11.1 文档支持................................................................ 19
11.2 接收文档更新通知 ................................................. 19
11.3 社区资源................................................................ 19
11.4 商标....................................................................... 19
11.5 静电放电警告......................................................... 19
11.6 术语表 ................................................................... 19
12 机械、封装和可订购信息....................................... 19
7
4 修订历史记录
注:之前版本的页码可能与当前版本有所不同。
Changes from Revision B (January 2018) to Revision C
Page
•
已发布至生产 .......................................................................................................................................................................... 1
2
Copyright © 2017–2018, Texas Instruments Incorporated
DRV5055-Q1
www.ti.com.cn
ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
5 Pin Configuration and Functions
DBZ Package
3-Pin SOT-23
Top View
LPG Package
3-Pin TO-92
Top View
VCC
1
2
3
GND
OUT
1
2
3
VCC GND OUT
Pin Functions
PIN
I/O
DESCRIPTION
NAME
SOT-23
TO-92
Power supply. TI recommends connecting this pin to a ceramic capacitor to ground
with a value of at least 0.01 µF.
VCC
1
1
—
OUT
GND
2
3
3
2
O
Analog output
—
Ground reference
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–0.3
MAX
7
UNIT
V
Power supply voltage
VCC
Output voltage
OUT
VCC + 0.3
V
Magnetic flux density, BMAX
Operating junction temperature, TJ
Storage temperature, Tstg
Unlimited
T
–40
–65
170
150
°C
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Copyright © 2017–2018, Texas Instruments Incorporated
3
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ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
www.ti.com.cn
6.2 ESD Ratings
VALUE
±2500
±750
UNIT
Human body model (HBM), per AEC Q100-002(1)
Charged device model (CDM), per AEC Q100-011
V(ESD)
Electrostatic discharge
V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
3
3.63
5.5
1
VCC
Power-supply voltage(1)
V
4.5
–1
IO
Output continuous current
Operating ambient temperature(2)
mA
°C
TA
–40
150
(1) There are two isolated operating VCC ranges. For more information see the Operating VCC Ranges section.
(2) Power dissipation and thermal limits must be observed.
6.4 Thermal Information
DRV5055-Q1
SOT-23 (DBZ) TO-92 (LPG)
THERMAL METRIC(1)
UNIT
3 PINS
170
66
3 PINS
121
67
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top) Junction-to-case (top) thermal resistance
RθJB
YJT
Junction-to-board thermal resistance
49
97
Junction-to-top characterization parameter
Junction-to-board characterization parameter
1.7
7.6
YJB
48
97
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Electrical Characteristics
for VCC = 3 V to 3.63 V and 4.5 V to 5.5 V, over operating free-air temperature range (unless otherwise noted)
PARAMETER
Operating supply current
Power-on time (see 图 18)
Sensing bandwidth
TEST CONDITIONS(1)
MIN
TYP
6
MAX
10
UNIT
mA
µs
ICC
tON
fBW
td
B = 0 mT, no load on OUT
175
20
330
kHz
µs
Propagation delay time
From change in B to change in OUT
VCC = 5 V
10
130
215
0.12
0.2
BND
Input-referred RMS noise density
Input-referred noise
nT/√Hz
VCC = 3.3 V
VCC = 5 V
BND × 6.6 × √20 kHz
VCC = 3.3 V
BN
mTPP
DRV5055A1,
DRV5055A5
12
Output-referred noise(2)
mVPP
DRV5055A2
BN × S
6
3
VN
DRV5055A3
DRV5055A4
1.5
(1) B is the applied magnetic flux density.
(2) VN describes voltage noise on the device output. If the full device bandwidth is not needed, noise can be reduced with an RC filter.
4
Copyright © 2017–2018, Texas Instruments Incorporated
DRV5055-Q1
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ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
6.6 Magnetic Characteristics
for VCC = 3 V to 3.63 V and 4.5 V to 5.5 V, over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS(1)
MIN
2.43
1.59
TYP
2.5
MAX
2.57
1.71
UNIT
VCC = 5 V
VCC = 3.3 V
VQ
Quiescent voltage
B = 0 mT, TA = 25°C
V
1.65
B = 0 mT,
TA = –40°C to 150°C versus 25°C
VQΔT
VQRE
VQΔL
Quiescent voltage temperature drift
Quiescent voltage ratiometry error(2)
Quiescent voltage lifetime drift
±1% × VCC
±0.2%
V
High-temperature operating stress for
1000 hours
< 0.5%
DRV5055A1
95
47.5
23.8
11.9
–105
57
100
50
105
52.5
26.2
13.2
–95
63
DRV5055A2
VCC = 5 V,
DRV5055A3
TA = 25°C
25
DRV5055A4
DRV5055A5
DRV5055A1
DRV5055A2
12.5
–100
60
S
Sensitivity
mV/mT
28.5
14.3
7.1
30
31.5
15.8
7.9
VCC = 3.3 V,
DRV5055A3
TA = 25°C
15
DRV5055A4
7.5
–60
DRV5055A5
–63
–57
DRV5055A1,
DRV5055A5
±21
VCC = 5 V,
TA = 25°C
DRV5055A2
±42
±85
DRV5055A3
DRV5055A4
±169
BL
Linear magnetic sensing range(3) (4)
mT
DRV5055A1,
DRV5055A5
±22
VCC = 3.3 V,
TA = 25°C
DRV5055A2
±44
±88
DRV5055A3
DRV5055A4
±176
0.2
VL
Linear range of output voltage(4)
VCC – 0.2
V
Sensitivity temperature compensation
for magnets(5)
STC
0.12
%/°C
SLE
SSE
Sensitivity linearity error(4)
Sensitivity symmetry error(4)
VOUT is within VL
VOUT is within VL
±1%
±1%
TA = 25°C,
with respect to VCC = 3.3 V or 5 V
SRE
SΔL
Sensitivity ratiometry error(2)
–2.5%
2.5%
High-temperature operating stress for
1000 hours
Sensitivity lifetime drift
<0.5%
(1) B is the applied magnetic flux density.
(2) See the Ratiometric Architecture section.
(3) BL describes the minimum linear sensing range at 25°C taking into account the maximum VQ and Sensitivity tolerances.
(4) See the Sensitivity Linearity section.
(5) STC describes the rate the device increases Sensitivity with temperature. For more information, see the Sensitivity Temperature
Compensation for Magnets section.
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ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
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6.7 Typical Characteristics
for TA = 25°C (unless otherwise noted)
3000
2500
2000
1500
1000
2800
2600
2400
2200
2000
1800
1600
1400
3.3V
5.0V
-40 -20
0
20
40
60
80 100 120 140 160
3
3.25 3.5 3.75
4
4.25 4.5 4.75
VCC (V)
5
5.25 5.5
Temperature (èC)
Fig1
Fig2
图 1. Quiescent Voltage vs Temperature
图 2. Quiescent Voltage vs Supply Voltage
70
60
50
40
30
20
10
0
120
110
100
90
A1, A5
A1, A5
A2
A3
A4
A2
A3
A4
80
70
60
50
40
30
20
10
3
3.15
3.3
3.45
3.6
4.5 4.6 4.7 4.8 4.9
5
5.1 5.2 5.3 5.4 5.5
Supply Voltage (V)
Supply Voltage (V)
Fig3
Fig4
VCC = 3.3 V
VCC = 5.0 V
图 3. Sensitivity vs Supply Voltage
图 4. Sensitivity vs Supply Voltage
10
9
75
70
65
60
55
50
45
40
35
30
25
8
7
6
5
4
3
AVG
-3STD
+3STD
VCC = 3.3 V
VCC = 5.0 V
2
1
-40 -20
0
20
40
60
80 100 120 140 160
-40 -20
0
20
40
60
80 100 120 140 160
Temperature (èC)
Temperature (èC)
Fig5
Fig6
DRV5055A1, DRV5055A5, VCC = 3.3 V
图 5. Supply Current vs Temperature
图 6. Sensitivity vs Temperature
6
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DRV5055-Q1
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ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
Typical Characteristics (接下页)
for TA = 25°C (unless otherwise noted)
125
50
45
40
35
30
25
20
15
10
5
120
115
110
105
100
95
90
85
AVG
-3STD
+3STD
AVG
-3STD
+3STD
80
75
0
-40 -20
0
20
40
60
80 100 120 140 160
-40 -20
0
20
40
60
80 100 120 140 160
Temperature (èC)
Temperature (èC)
Fig7
Fig8
DRV5055A1, DRV5055A5, VCC = 5.0 V
DRV5055A2, VCC = 3.3 V
图 8. Sensitivity vs Temperature
图 7. Sensitivity vs Temperature
75
70
65
60
55
50
45
40
35
30
25
25
20
15
10
5
AVG
-3STD
+3STD
AVG
-3STD
+3STD
0
-40 -20
0
20
40
60
80 100 120 140 160
-40 -20
0
20
40
60
80 100 120 140 160
Temperature (èC)
Temperature (èC)
Fig9
Fig1
DRV5055A2, VCC = 5.0 V
图 9. Sensitivity vs Temperature
DRV5055A3, VCC = 3.3 V
图 10. Sensitivity vs Temperature
40
35
30
25
20
15
10
8
AVG
-3STD
+3STD
6
4
2
AVG
-3STD
+3STD
0
-40 -20
0
20
40
60
80 100 120 140 160
-40 -20
0
20
40
60
80 100 120 140 160
Temperature (C)
Temperature (èC)
Fig1
Fig1
DRV5055A3, VCC = 5.0 V
图 11. Sensitivity vs Temperature
DRV5055A4, VCC = 3.3 V
图 12. Sensitivity vs Temperature
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DRV5055-Q1
ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
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Typical Characteristics (接下页)
for TA = 25°C (unless otherwise noted)
18
AVG
-3STD
+3STD
16
14
12
10
8
-40 -20
0
20
40
60
80 100 120 140 160
Temperature (èC)
Fig1
DRV5055A4, VCC = 5.0 V
图 13. Sensitivity vs Temperature
8
版权 © 2017–2018, Texas Instruments Incorporated
DRV5055-Q1
www.ti.com.cn
ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
7 Detailed Description
7.1 Overview
The DRV5055-Q1 is a 3-pin linear Hall effect sensor with fully integrated signal conditioning, temperature
compensation circuits, mechanical stress cancellation, and amplifiers. The device operates from 3.3-V and 5-V
(±10%) power supplies, measures magnetic flux density, and outputs a proportional analog voltage that is
referenced to VCC
.
7.2 Functional Block Diagram
VCC
Element Bias
Bandgap
Reference
0.01 ꢀF
(minimum)
Offset
Cancellation
Trim
Registers
GND
Temperature
Compensation
VCC
Optional filter
OUT
Precision
Amplifier
Output
Driver
7.3 Feature Description
7.3.1 Magnetic Flux Direction
As shown in 图 14, the DRV5055-Q1 is sensitive to the magnetic field component that is perpendicular to the top
of the package.
TO-92
B
B
SOT-23
PCB
图 14. Direction of Sensitivity
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ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
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Feature Description (接下页)
Magnetic flux that travels from the bottom to the top of the package is considered positive in this document. This
condition exists when a south magnetic pole is near the top (marked-side) of the package. Magnetic flux that
travels from the top to the bottom of the package results in negative millitesla values.
N
S
S
N
PCB
PCB
图 15. The Flux Direction for Positive B
7.3.2 Magnetic Response
When the DRV5055-Q1 is powered, the DRV5055-Q1 outputs an analog voltage according to 公式 1:
VOUT = VQ + B × Sensitivity(25°C) × (1 + STC × (TA œ 25°C))
(
)
where
•
•
•
•
•
•
VQ is typically half of VCC
B is the applied magnetic flux density
Sensitivity(25°C) depends on the device option and VCC
STC is typically 0.12%/°C
TA is the ambient temperature
VOUT is within the VL range
(1)
As an example, consider the DRV5055A3 with VCC = 3.3 V, a temperature of 50°C, and 67 mT applied.
Excluding tolerances, VOUT = 1650 mV + 67 mT × (15 mV/mT × (1 + 0.0012/°C × (50°C – 25°C))) = 2685 mV.
7.3.3 Sensitivity Linearity
The device produces a linear response when the output voltage is within the specified VL range. Outside this
range, sensitivity is reduced and nonlinear. 图 16 and 图 17 graph the magnetic response.
10
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ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
Feature Description (接下页)
OUT
VCC
VL (MAX)
VCC /2
VL (MIN)
0 V
0 mT
B
north
south
图 16. Magnetic Response of the A1, A2, A3, A4 Versions
OUT
VCC
VL (MAX)
VCC /2
VL (MIN)
0 V
B
north
0 mT
south
图 17. Magnetic Response of the A5 Version
公式 2 calculates parameter BL, the minimum linear sensing range at 25°C taking into account the maximum
quiescent voltage and sensitivity tolerances.
VL(MAX) œ VQ(MAX)
BL(MIN)
=
S(MAX)
(2)
The parameter SLE defines linearity error as the difference in sensitivity between any two positive B values, and
any two negative B values, while the output is within the VL range.
The parameter SSE defines symmetry error as the difference in sensitivity between any positive B value and the
negative B value of the same magnitude, while the output voltage is within the VL range.
7.3.4 Ratiometric Architecture
The DRV5055-Q1 has a ratiometric analog architecture that scales the quiescent voltage and sensitivity linearly
with the power-supply voltage. For example, the quiescent voltage and sensitivity are 5% higher when VCC
=
5.25 V compared to VCC = 5 V. This behavior enables external ADCs to digitize a consistent value regardless of
the power-supply voltage tolerance, when the ADC uses VCC as its reference.
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Feature Description (接下页)
公式 3 calculates the sensitivity ratiometry error:
S(VCC) / S(5V)
S(VCC) / S(3.3V)
VCC / 3.3V
SRE = 1 œ
for VCC = 4.5 V to 5.5 V,
SRE = 1 œ
for VCC = 3 V to 3.63 V
VCC / 5V
where
•
•
•
S(VCC) is the sensitivity at the current VCC voltage
S(5V) or S(3.3V) is the sensitivity when VCC = 5 V or 3.3 V
VCC is the current VCC voltage
(3)
公式 4 calculates quiescent voltage ratiometry error:
VQ(VCC) / VQ(5V)
VQ(VCC) / VQ(3.3V)
VCC / 3.3V
VQRE = 1 œ
for VCC = 4.5 V to 5.5 V,
VQRE = 1 œ
for VCC = 3 V to 3.63 V
VCC / 5V
where
•
•
•
VQ(VCC) is the quiescent voltage at the current VCC voltage
VQ(5V) or VQ(3.3V) is the quiescent voltage when VCC = 5 V or 3.3 V
VCC is the current VCC voltage
(4)
7.3.5 Operating VCC Ranges
The DRV5055-Q1 has two recommended operating VCC ranges: 3 V to 3.63 V and 4.5 V to 5.5 V. When VCC is
in the middle region between 3.63 V to 4.5 V, the device continues to function, but sensitivity is less known
because there is a crossover threshold near 4 V that adjusts device characteristics.
7.3.6 Sensitivity Temperature Compensation for Magnets
Magnets generally produce weaker fields as temperature increases. The DRV5055-Q1 compensates by
increasing sensitivity with temperature, as defined by the parameter STC. The sensitivity at TA = 125°C is typically
12% higher than at TA = 25°C. The DRV5055A5 absolute value of sensitivity increases with temperature.
7.3.7 Power-On Time
After the VCC voltage is applied, the DRV5055-Q1 requires a short initialization time before the output is set. The
parameter tON describes the time from when VCC crosses 3 V until OUT is within 5% of VQ, with 0 mT applied
and no load attached to OUT. 图 18 shows this timing diagram.
VCC
3 V
tON
time
Output
95% × VQ
Invalid
time
图 18. tON Definition
12
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ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
Feature Description (接下页)
7.3.8 Hall Element Location
图 19 shows the location of the sensing element inside each package option.
SOT-23
Top View
SOT-23
Side View
centered
±50 µm
650 µm
±80 µm
TO-92
Top View
2 mm
2 mm
TO-92
Side View
1.54 mm
1.61 mm
±50 µm
1030 µm
±115 µm
图 19. Hall Element Location
7.4 Device Functional Modes
The DRV5055-Q1 has one mode of operation that applies when the Recommended Operating Conditions are
met.
版权 © 2017–2018, Texas Instruments Incorporated
13
DRV5055-Q1
ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
www.ti.com.cn
8 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Selecting the Sensitivity Option
Select the highest DRV5055-Q1 sensitivity option that can measure the required range of magnetic flux density,
so that the output voltage swing is maximized.
Larger-sized magnets and farther sensing distances can generally enable better positional accuracy than very
small magnets at close distances, because magnetic flux density increases exponentially with the proximity to a
magnet. TI created an online tool to help with simple magnet calculations at http://www.ti.com/product/drv5013.
8.1.2 Temperature Compensation for Magnets
The DRV5055-Q1 temperature compensation is designed to directly compensate the average drift of neodymium
(NdFeB) magnets and partially compensate ferrite magnets. The residual induction (Br) of a magnet typically
reduces by 0.12%/°C for NdFeB, and 0.20%/°C for ferrite. When the operating temperature of a system is
reduced, temperature drift errors are also reduced.
8.1.3 Adding a Low-Pass Filter
As shown in the Functional Block Diagram, an RC low-pass filter can be added to the device output for the
purpose of minimizing voltage noise when the full 20-kHz bandwidth is not needed. This filter can improve the
signal-to-noise ratio (SNR) and overall accuracy. Do not connect a capacitor directly to the device output without
a resistor in between because doing so can make the output unstable.
8.1.4 Designing for Wire Break Detection
Some systems must detect if interconnect wires become open or shorted. The DRV5055-Q1 can support this
function.
First, select a sensitivity option that causes the output voltage to stay within the VL range during normal
operation. Second, add a pullup resistor between OUT and VCC. TI recommends a value between 20 kΩ to
100 kΩ, and the current through OUT must not exceed the IO specification, including current going into an
external ADC. Then, if the output voltage is ever measured to be within 150 mV of VCC or GND, a fault condition
exists. 图 20 shows the circuit, and 表 1 describes fault scenarios.
PCB
DRV5055-Q1
VCC
VCC
OUT
Cable
VOUT
GND
图 20. Wire Fault Detection Circuit
14
版权 © 2017–2018, Texas Instruments Incorporated
DRV5055-Q1
www.ti.com.cn
ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
表 1. Fault Scenarios and the Resulting VOUT
FAULT SCENARIO
VCC disconnects
VOUT
Close to GND
Close to VCC
Close to VCC
Close to GND
GND disconnects
VCC shorts to OUT
GND shorts to OUT
8.2 Typical Application
S
N
图 21. Common Magnet Orientation
8.2.1 Design Requirements
Use the parameters listed in 表 2 for this design example.
表 2. Design Parameters
DESIGN PARAMETER
VCC
EXAMPLE VALUE
5 V
Magnet
15 × 5 × 5 mm NdFeB
12 mm
Travel distance
Maximum B at the sensor at 25°C
Device option
±75 mT
DRV5055A3
8.2.2 Detailed Design Procedure
Linear Hall effect sensors provide flexibility in mechanical design, because many possible magnet orientations
and movements produce a usable response from the sensor. 图 21 shows one of the most common orientations,
which uses the full north to south range of the sensor and causes a close-to-linear change in magnetic flux
density as the magnet moves across.
When designing a linear magnetic sensing system, always consider these three variables: the magnet, sensing
distance, and the range of the sensor. Select the DRV5055-Q1 with the highest sensitivity that has a BL (linear
magnetic sensing range) that is larger than the maximum magnetic flux density in the application. To determine
the magnetic flux density the sensor receives, TI recommends using magnetic field simulation software, referring
to magnet specifications, and testing.
版权 © 2017–2018, Texas Instruments Incorporated
15
DRV5055-Q1
ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
www.ti.com.cn
8.2.3 Application Curve
图 22 shows the simulated magnetic flux from a NdFeB magnet.
图 22. Simulated Magnetic Flux
16
版权 © 2017–2018, Texas Instruments Incorporated
DRV5055-Q1
www.ti.com.cn
ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
8.3 Do's and Don'ts
Because the Hall element is sensitive to magnetic fields that are perpendicular to the top of the package, a
correct magnet approach must be used for the sensor to detect the field. 图 23 shows correct and incorrect
approaches.
CORRECT
N
S
S
N
N
S
INCORRECT
N
S
图 23. Correct and Incorrect Magnet Approaches
版权 © 2017–2018, Texas Instruments Incorporated
17
DRV5055-Q1
ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
www.ti.com.cn
9 Power Supply Recommendations
A decoupling capacitor close to the device must be used to provide local energy with minimal inductance. TI
recommends using a ceramic capacitor with a value of at least 0.01 µF.
10 Layout
10.1 Layout Guidelines
Magnetic fields pass through most nonferromagnetic materials with no significant disturbance. Embedding Hall
effect sensors within plastic or aluminum enclosures and sensing magnets on the outside is common practice.
Magnetic fields also easily pass through most printed-circuit boards, which makes placing the magnet on the
opposite side possible.
10.2 Layout Examples
VCC
GND
VCC
GND
OUT
OUT
图 24. Layout Examples
18
版权 © 2017–2018, Texas Instruments Incorporated
DRV5055-Q1
www.ti.com.cn
ZHCSHC2C –OCTOBER 2017–REVISED JULY 2018
11 器件和文档支持
11.1 文档支持
11.1.1 相关文档
请参阅如下相关文档:
•
•
《利用线性霍尔效应传感器测量角度》
《增量旋转编码器设计注意事项》
11.2 接收文档更新通知
要接收文档更新通知,请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我 进行注册,即可每周接收产
品信息更改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。
11.3 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范,
并且不一定反映 TI 的观点;请参阅 TI 的 《使用条款》。
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在
e2e.ti.com 中,您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。
设计支持
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
11.4 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
11.6 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、缩写和定义。
12 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更,恕不另行通知,且
不会对此文档进行修订。如需获取此产品说明书的浏览器版本,请查阅左侧的导航栏。
版权 © 2017–2018, Texas Instruments Incorporated
19
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
DRV5055A1EDBZRQ1
DRV5055A1ELPGMQ1
DRV5055A1ELPGQ1
DRV5055A2EDBZRQ1
DRV5055A2ELPGMQ1
DRV5055A2ELPGQ1
DRV5055A3EDBZRQ1
DRV5055A3ELPGMQ1
DRV5055A3ELPGQ1
DRV5055A4EDBZRQ1
DRV5055A4ELPGMQ1
DRV5055A4ELPGQ1
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
TO-92
TO-92
SOT-23
TO-92
TO-92
SOT-23
TO-92
TO-92
SOT-23
TO-92
TO-92
DBZ
LPG
LPG
DBZ
LPG
LPG
DBZ
LPG
LPG
DBZ
LPG
LPG
3
3
3
3
3
3
3
3
3
3
3
3
3000 RoHS & Green
3000 RoHS & Green
1000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
1000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
1000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
1000 RoHS & Green
SN
Level-3-260C-168 HR
N / A for Pkg Type
N / A for Pkg Type
Level-3-260C-168 HR
N / A for Pkg Type
N / A for Pkg Type
Level-3-260C-168 HR
N / A for Pkg Type
N / A for Pkg Type
Level-3-260C-168 HR
N / A for Pkg Type
N / A for Pkg Type
-40 to 150
-40 to 150
-40 to 150
-40 to 150
-40 to 150
-40 to 150
-40 to 150
-40 to 150
-40 to 150
-40 to 150
-40 to 150
-40 to 150
55A1Z
SN
SN
SN
SN
SN
SN
SN
SN
SN
SN
SN
55A1Z
55A1Z
55A2Z
55A2Z
55A2Z
55A3Z
55A3Z
55A3Z
55A4Z
55A4Z
55A4Z
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Jan-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
DRV5055A1EDBZRQ1 SOT-23
DRV5055A2EDBZRQ1 SOT-23
DRV5055A3EDBZRQ1 SOT-23
DRV5055A4EDBZRQ1 SOT-23
DBZ
DBZ
DBZ
DBZ
3
3
3
3
3000
3000
3000
3000
180.0
180.0
180.0
180.0
8.4
8.4
8.4
8.4
3.15
3.15
3.15
3.15
2.77
2.77
2.77
2.77
1.22
1.22
1.22
1.22
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Jan-2019
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
DRV5055A1EDBZRQ1
DRV5055A2EDBZRQ1
DRV5055A3EDBZRQ1
DRV5055A4EDBZRQ1
SOT-23
SOT-23
SOT-23
SOT-23
DBZ
DBZ
DBZ
DBZ
3
3
3
3
3000
3000
3000
3000
213.0
213.0
213.0
213.0
191.0
191.0
191.0
191.0
35.0
35.0
35.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
LPG0003A
TO-92 - 5.05 mm max height
S
C
A
L
E
1
.
3
0
0
TRANSISTOR OUTLINE
4.1
3.9
3.25
3.05
0.55
0.40
3X
5.05
MAX
3
1
3X (0.8)
3X
15.5
15.1
0.48
0.35
0.51
0.36
3X
3X
2X 1.27 0.05
2.64
2.44
2.68
2.28
1.62
1.42
2X (45 )
1
3
2
0.86
0.66
(0.5425)
4221343/C 01/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
LPG0003A
TO-92 - 5.05 mm max height
TRANSISTOR OUTLINE
FULL R
TYP
0.05 MAX
ALL AROUND
TYP
(1.07)
METAL
TYP
3X ( 0.75) VIA
2X
METAL
(1.7)
2X (1.7)
2X
SOLDER MASK
OPENING
2
3
1
2X (1.07)
(R0.05) TYP
(1.27)
SOLDER MASK
OPENING
(2.54)
LAND PATTERN EXAMPLE
NON-SOLDER MASK DEFINED
SCALE:20X
4221343/C 01/2018
www.ti.com
TAPE SPECIFICATIONS
LPG0003A
TO-92 - 5.05 mm max height
TRANSISTOR OUTLINE
0
1
13.0
12.4
0
1
1 MAX
21
18
2.5 MIN
6.5
5.5
9.5
8.5
0.25
0.15
19.0
17.5
3.8-4.2 TYP
0.45
0.35
6.55
6.15
12.9
12.5
4221343/C 01/2018
www.ti.com
PACKAGE OUTLINE
DBZ0003A
SOT-23 - 1.12 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
2.64
2.10
1.12 MAX
1.4
1.2
B
A
0.1 C
PIN 1
INDEX AREA
1
0.95
(0.125)
3.04
2.80
1.9
3
(0.15)
NOTE 4
2
0.5
0.3
3X
0.10
0.01
(0.95)
TYP
0.2
C A B
0.25
GAGE PLANE
0.20
0.08
TYP
0.6
0.2
TYP
SEATING PLANE
0 -8 TYP
4214838/D 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-236, except minimum foot length.
4. Support pin may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X (0.95)
2
(R0.05) TYP
(2.1)
LAND PATTERN EXAMPLE
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214838/D 03/2023
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X(0.95)
2
(R0.05) TYP
(2.1)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:15X
4214838/D 03/2023
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
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