CY74FCT245ATSOCTG4 [TI]

FCT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SOIC-20;
CY74FCT245ATSOCTG4
型号: CY74FCT245ATSOCTG4
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

FCT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SOIC-20

光电二极管 输出元件 逻辑集成电路
文件: 总21页 (文件大小:868K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CY54FCT245T, CY74FCT245T  
8-BIT TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCCS018B – MAY 1994 – REVISED NOVEMBER 2001  
CY54FCT245T . . . D PACKAGE  
CY74FCT245T . . . P, Q, OR SO PACKAGE  
(TOP VIEW)  
Function, Pinout, and Drive Compatible  
With FCT and F Logic  
Reduced V  
of Equivalent FCT Functions  
(Typically = 3.3 V) Versions  
OH  
T/R  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
A
OE  
Edge-Rate Control Circuitry for  
Significantly Improved Noise  
Characteristics  
0
A
1
B
0
A
B
1
2
A
3
B
2
I
Supports Partial-Power-Down Mode  
off  
A
B
3
Operation  
4
A
5
B
4
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
A
A
GND  
B
B
B
6
5
6
7
7
– 1000-V Charged-Device Model (C101)  
Matched Rise and Fall Times  
CY54FCT245T . . . L PACKAGE  
(TOP VIEW)  
Fully Compatible With TTL Input and  
Output Logic Levels  
CY54FCT245T  
– 48-mA Output Sink Current  
12-mA Output Source Current  
3
2
1
20 19  
18  
A
A
A
A
A
B
B
B
B
B
4
5
6
7
8
2
3
4
5
6
0
1
2
3
4
CY74FCT245T  
– 64-mA Output Sink Current  
32-mA Output Source Current  
17  
16  
15  
14  
3-State Outputs  
9 10 11 12 13  
description  
The ’FCT245T devices contain eight noninverting  
bidirectional buffers with 3-state outputs and are  
intended for bus-oriented applications.  
The transmit/receive (T/R) input determines the direction of data flow through these bidirectional transceivers.  
Transmit (active high) enables data from A ports to B ports. The output enable (OE), when high, disables both  
the A and B ports by putting them in the high-impedance state.  
These devices are fully specified for partial-power-down applications using I . The I circuitry disables the  
off  
off  
outputs, preventing damaging current backflow through the device when it is powered down.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2001, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
unless otherwise noted. On all other products, production  
testing of all parameters.  
processing does not necessarily include testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY54FCT245T, CY74FCT245T  
8-BIT TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCCS018B MAY 1994 REVISED NOVEMBER 2001  
ORDERING INFORMATION  
SPEED  
(ns)  
ORDERABLE  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PART NUMBER  
CY74FCT245DTQCT  
CY74FCT245CTQCT  
CY74FCT245CTSOC  
CY74FCT245CTSOCT  
CY74FCT245ATPC  
CY74FCT245ATQCT  
CY74FCT245ATSOC  
CY74FCT245ATSOCT  
CY74FCT245TQCT  
CY74FCT245TSOC  
CY74FCT245TSOCT  
CY54FCT245CTDMB  
CY54FCT245CTLMB  
CY54FCT245ATDMB  
CY54FCT245ATLMB  
CY54FCT245TDMB  
CY54FCT245TLMB  
QSOP Q  
QSOP Q  
Tape and reel  
Tape and reel  
Tube  
3.8  
4.1  
4.1  
4.1  
4.6  
4.6  
4.6  
4.6  
7
FCT245D  
FCT245C  
SOIC SO  
FCT245C  
Tape and reel  
Tube  
DIP P  
CY74FCT245ATPC  
FCT245A  
40°C to 85°C  
QSOP Q  
Tape and reel  
Tube  
SOIC SO  
QSOP Q  
SOIC SO  
FCT245A  
FCT245  
FCT245  
Tape and reel  
Tape and reel  
Tube  
7
Tape and reel  
Tube  
7
CDIP D  
LCC L  
CDIP D  
LCC L  
CDIP D  
LCC L  
4.5  
4.5  
4.9  
4.9  
7.5  
7.5  
Tube  
Tube  
55°C to 125°C  
Tube  
Tube  
Tube  
Packagedrawings,standardpackingquantities,thermaldata,symbolization,andPCBdesignguidelinesareavailable  
at www.ti.com/sc/package.  
FUNCTION TABLE  
INPUTS  
OPERATION  
OE  
L
T/R  
L
B data to bus A  
A data to bus B  
Z
L
H
H
X
H=Highlogiclevel,L=Lowlogiclevel,  
X = Dont care, Z = High-impedance  
state  
logic diagram (positive logic)  
1
2
T/R  
19  
18  
OE  
A
0
B
0
To Seven Other Channels  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY54FCT245T, CY74FCT245T  
8-BIT TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCCS018B MAY 1994 REVISED NOVEMBER 2001  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA  
Package thermal impedance, θ (see Note 1): P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W  
JA  
Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68°C/W  
SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W  
Ambient temperature range with power applied, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 135°C  
A
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and  
functionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperatingconditionsisnotimplied.  
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.  
recommended operating conditions (see Note 2)  
CY74FCT245T  
CY74FCT245AT  
CY74FCT245CT  
CY74FCT245DT  
CY54FCT245T  
UNIT  
MIN NOM  
MAX  
MIN NOM  
MAX  
V
V
V
Supply voltage  
4.5  
2
5
5.5  
4.75  
2
5
5.25  
V
V
CC  
High-level input voltage  
Low-level input voltage  
High-level output current  
Low-level output current  
Operating free-air temperature  
IH  
0.8  
12  
48  
0.8  
32  
64  
V
IL  
I
I
mA  
mA  
°C  
OH  
OL  
T
A
55  
125  
40  
85  
NOTE 2: All unused inputs of the device must be held at V  
or GND to ensure proper device operation.  
CC  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY54FCT245T, CY74FCT245T  
8-BIT TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCCS018B MAY 1994 REVISED NOVEMBER 2001  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
CY54FCT245T  
CY74FCT245T  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN TYP  
MAX  
MIN TYP  
MAX  
V
V
V
= 4.5 V,  
= 4.75 V,  
= 4.5 V,  
I
I
I
I
I
I
I
= 18 mA  
= 18 mA  
0.7  
1.2  
CC  
CC  
CC  
IN  
V
V
IK  
0.7  
1.2  
IN  
= 12 mA  
= 32 mA  
= 15 mA  
= 48 mA  
= 64 mA  
2.4  
3.3  
OH  
OH  
OH  
OL  
OL  
V
OH  
2
V
V
CC  
= 4.75 V  
2.4  
3.3  
V
V
= 4.5 V,  
0.3  
0.2  
0.55  
CC  
V
V
V
V
OL  
= 4.75 V,  
0.3  
0.2  
0.55  
CC  
All inputs  
hys  
V
V
V
V
V
V
= 5.5 V,  
= 5.25 V,  
= 5.5 V,  
= 5.25 V,  
= 5.5 V,  
= 5.25 V,  
V
V
V
V
V
V
= V  
= V  
5
±1  
CC  
CC  
CC  
CC  
CC  
CC  
IN  
IN  
IN  
IN  
IN  
IN  
CC  
CC  
I
I
I
µA  
I
5
±1  
= 2.7 V  
= 2.7 V  
= 0.5 V  
= 0.5 V  
µA  
µA  
µA  
µA  
IH  
IL  
±1  
±1  
V
V
V
V
5.5 V,  
V
OUT  
V
OUT  
V
OUT  
V
OUT  
= 2.7 V  
= 2.7 V  
= 0.5 V  
= 0.5 V  
= 0 V  
10  
CC =  
I
OZH  
5.25 V,  
10  
CC =  
= 5.5 V,  
= 5.25 V,  
= 5.5 V,  
= 5.25 V,  
= 0 V,  
10  
225  
CC  
CC  
I
OZL  
10  
V
V
60  
120  
CC  
CC  
CC  
CC  
CC  
OUT  
OUT  
OUT  
mA  
µA  
I
I
I
OS  
V
V
= 0 V  
60  
120  
225  
±1  
V
V
V
V
V
V
= 4.5 V  
±1  
off  
= 5.5 V,  
= 5.25 V,  
0.2 V,  
V
V
V  
V  
0.2 V  
0.2 V  
0.1  
0.5  
0.2  
IN  
IN  
IN  
CC  
mA  
CC  
0.2 V,  
0.1  
0.5  
0.2  
2
IN  
CC  
§
2
V
CC  
V
CC  
V
CC  
= 5.5 V, V = 3.4 V , f = 0, Outputs open  
IN  
1
I  
mA  
CC  
§
= 5.25 V, V = 3.4 V , f = 0, Outputs open  
IN  
1
= 5.5 V, One input switching at 50% duty cycle,  
Outputs open, T/R or OE = GND and  
0.06  
0.12  
V
0.2 V or V V  
0.2 V  
mA/  
MHz  
IN  
IN CC  
I
CCD  
V
CC  
= 5.25 V, One input switching at 50% duty cycle,  
Outputs open, T/R or OE = GND and  
0.06  
0.12  
V
IN  
0.2 V or V V  
0.2 V  
IN CC  
Typical values are at V  
= 5 V, T = 25°C.  
CC  
A
Notmorethanoneoutputshouldbeshortedatatime.Durationofshortshouldnotexceedonesecond.Theuseofhigh-speedtestapparatusand/or  
sample-and-holdtechniquesarepreferabletominimizeinternalchipheatingandmoreaccuratelyreflectoperationalvalues.Otherwise,prolonged  
shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence  
of parameter tests, I  
Per TTL-driven input (V = 3.4 V); all other inputs at V  
This parameter is derived for use in total power-supply calculations.  
tests should be performed last.  
OS  
§
or GND  
IN CC  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY54FCT245T, CY74FCT245T  
8-BIT TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCCS018B MAY 1994 REVISED NOVEMBER 2001  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted) (continued)  
CY54FCT245T  
CY74FCT245T  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN TYP  
MAX  
MIN TYP  
MAX  
One bit  
switching  
V
V
0.2 V or  
IN  
IN  
0.7  
1.2  
1.3  
1.4  
V  
0.2 V  
CC  
at f = 10 MHz  
1
at 50% duty  
cycle  
V
IN  
= 3.4 V or GND  
3.4  
V
= 5.5 V,  
CC  
Outputs open,  
Eight bits  
switching  
T/R or OE = GND  
V
IN  
V
IN  
0.2V or  
||  
2.6  
V  
0.2 V  
CC  
at f = 2.5 MHz  
1
at 50% duty  
cycle  
||  
V
= 3.4 V or GND  
3.3 10.6  
IN  
#
I
C
mA  
One bit  
switching  
V
IN  
V
IN  
0.2 V or  
0.7  
1.2  
1.3  
1.4  
3.4  
V  
0.2 V  
CC  
at f = 10 MHz  
1
at 50% duty  
cycle  
V
IN  
= 3.4 V or GND  
V
= 5.25 V,  
CC  
Outputs open,  
T/R or OE = GND  
Eight bits  
switching  
V
IN  
V
IN  
0.2V or  
||  
2.6  
V  
0.2 V  
CC  
at f = 2.5 MHz  
1
at 50% duty  
cycle  
||  
V
IN  
= 3.4 V or GND  
3.3 10.6  
C
C
5
9
10  
12  
5
9
10  
12  
pF  
pF  
i
o
#
Typical values are at V  
CC  
= 5 V, T = 25°C.  
A
I
= I  
+ I  
× D × N + I  
(f /2 + f × N )  
C
CC  
CC  
H
T
CCD 0 1 1  
Where:  
I
I
I  
D
N
= Total supply current  
= Power-supply current with CMOS input levels  
C
CC  
CC  
H
T
= Power-supply current for a TTL high input (V = 3.4 V)  
IN  
= Duty cycle for TTL inputs high  
= Number of TTL inputs at D  
H
I
f
f
= Dynamic current caused by an input transition pair (HLH or LHL)  
= Clock frequency for registered devices, otherwise zero  
= Input signal frequency  
CCD  
0
1
N
= Number of inputs changing at f  
1
1
All currents are in milliamperes and all frequencies are in megahertz.  
||  
Values for these conditions are examples of the I  
CC  
formula.  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY54FCT245T, CY74FCT245T  
8-BIT TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCCS018B MAY 1994 REVISED NOVEMBER 2001  
switching characteristics over operating free-air temperature range (see Figure 1)  
CY54FCT245T  
CY54FCT245AT  
CY54FCT245CT  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
ns  
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
7.5  
7.5  
10  
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
4.9  
4.9  
6.5  
6.5  
6
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
4.5  
4.5  
6.2  
6.2  
5.2  
5.2  
t
t
t
t
t
t
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
A or B  
B or A  
A or B  
A or B  
ns  
OE or T/R  
OE or T/R  
10  
10  
ns  
10  
6
switching characteristics over operating free-air temperature range (see Figure 1)  
CY74FCT245T CY74FCT245AT CY74FCT245CT  
CY74FCT245DT  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
ns  
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
7
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
4.6  
4.6  
6.2  
6.2  
5
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
4.1  
4.1  
5.8  
5.8  
4.8  
4.8  
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
3.8  
3.8  
5
t
t
t
t
t
t
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
A or B  
B or A  
A or B  
A or B  
7
9.5  
9.5  
7.5  
7.5  
ns  
OE or T/R  
OE or T/R  
5
4.3  
4.3  
ns  
5
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY54FCT245T, CY74FCT245T  
8-BIT TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCCS018B MAY 1994 REVISED NOVEMBER 2001  
PARAMETER MEASUREMENT INFORMATION  
7 V  
Open  
GND  
S1  
500 Ω  
From Output  
Under Test  
From Output  
Under Test  
Test  
Point  
TEST  
/t  
S1  
t
Open  
7 V  
PLH PHL  
C
= 50 pF  
C
= 50 pF  
L
L
500 Ω  
500 Ω  
t
/t  
PLZ PZL  
/t  
(see Note A)  
(see Note A)  
t
Open  
PHZ PZH  
LOAD CIRCUIT FOR  
TOTEM-POLE OUTPUTS  
LOAD CIRCUIT FOR  
3-STATE OUTPUTS  
3 V  
0 V  
1.5 V  
Timing Input  
Data Input  
t
w
t
h
t
3 V  
su  
3 V  
0 V  
1.5 V  
Input  
1.5 V  
1.5 V  
1.5 V  
0 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
3 V  
0 V  
3 V  
0 V  
Output  
Control  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
Input  
t
t
t
t
t
t
PLH  
PHL  
PLH  
PZL  
PZH  
PLZ  
3.5 V  
V
Output  
Waveform 1  
(see Note B)  
OH  
In-Phase  
Output  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
V
V
+ 0.3 V  
OL  
V
OL  
V
OL  
t
t
PHL  
PHZ  
V
V
V
OH  
OH  
Output  
Waveform 2  
(see Note B)  
Out-of-Phase  
Output  
0.3 V  
OH  
1.5 V  
1.5 V  
0 V  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. includes probe and jig capacitance.  
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. The outputs are measured one at a time with one input transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
5962-9221401M2A  
ACTIVE  
LCCC  
FK  
20  
1
TBD  
POST-PLATE  
N / A for Pkg Type  
-55 to 125  
5962-  
9221401M2A  
CY54FCT  
245TLMB  
5962-9221401MRA  
5962-9221403M2A  
5962-9221403MRA  
ACTIVE  
ACTIVE  
ACTIVE  
CDIP  
LCCC  
CDIP  
J
FK  
J
20  
20  
20  
1
1
1
TBD  
TBD  
TBD  
A42  
POST-PLATE  
A42  
N / A for Pkg Type  
N / A for Pkg Type  
N / A for Pkg Type  
-55 to 125  
-55 to 125  
-55 to 125  
5962-9221401MR  
A
5962-  
9221403M2A  
5962-9221403MR  
A
CY54FCT245ATDM  
B
5962-9221405M2A  
ACTIVE  
LCCC  
FK  
20  
1
TBD  
POST-PLATE  
N / A for Pkg Type  
-55 to 125  
5962-  
9221405M2A  
CY54FCT  
245CTLMB  
5962-9221405MRA  
ACTIVE  
ACTIVE  
CDIP  
CDIP  
J
J
20  
20  
1
1
TBD  
TBD  
A42  
A42  
N / A for Pkg Type  
N / A for Pkg Type  
-55 to 125  
-55 to 125  
5962-9221405MR  
A
CY54FCT245ATDMB  
5962-9221403MR  
A
CY54FCT245ATDM  
B
CY54FCT245CTLMB  
CY54FCT245TLMB  
ACTIVE  
ACTIVE  
LCCC  
LCCC  
FK  
FK  
20  
20  
1
1
TBD  
TBD  
POST-PLATE  
POST-PLATE  
N / A for Pkg Type  
N / A for Pkg Type  
-55 to 125  
-55 to 125  
5962-  
9221405M2A  
CY54FCT  
245CTLMB  
5962-  
9221401M2A  
CY54FCT  
245TLMB  
CY74FCT245ATPC  
CY74FCT245ATPCE4  
CY74FCT245ATQCT  
ACTIVE  
ACTIVE  
ACTIVE  
PDIP  
PDIP  
SSOP  
N
N
20  
20  
20  
20  
20  
Pb-Free  
(RoHS)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
N / A for Pkg Type  
N / A for Pkg Type  
-40 to 85  
-40 to 85  
-40 to 85  
CY74FCT245ATPC  
CY74FCT245ATPC  
FCT245A  
Pb-Free  
(RoHS)  
DBQ  
2500  
Green (RoHS  
& no Sb/Br)  
Level-2-260C-1 YEAR  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
CY74FCT245ATQCTE4  
CY74FCT245ATQCTG4  
CY74FCT245ATSOC  
CY74FCT245ATSOCE4  
CY74FCT245ATSOCG4  
CY74FCT245ATSOCT  
CY74FCT245ATSOCTE4  
CY74FCT245ATSOCTG4  
CY74FCT245CTQCT  
CY74FCT245CTQCTE4  
CY74FCT245CTQCTG4  
CY74FCT245CTSOC  
CY74FCT245CTSOCE4  
CY74FCT245CTSOCG4  
CY74FCT245DTQCT  
CY74FCT245DTQCTE4  
CY74FCT245DTQCTG4  
CY74FCT245TQCT  
ACTIVE  
SSOP  
SSOP  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SSOP  
SSOP  
SSOP  
SOIC  
SOIC  
SOIC  
SSOP  
SSOP  
SSOP  
SSOP  
DBQ  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
2500  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
FCT245A  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
DBQ  
DW  
2500  
25  
Green (RoHS  
& no Sb/Br)  
FCT245A  
FCT245A  
FCT245A  
FCT245A  
FCT245A  
FCT245A  
FCT245A  
FCT245C  
FCT245C  
FCT245C  
FCT245C  
FCT245C  
FCT245C  
FCT245D  
FCT245D  
FCT245D  
FCT245  
Green (RoHS  
& no Sb/Br)  
DW  
25  
Green (RoHS  
& no Sb/Br)  
DW  
25  
Green (RoHS  
& no Sb/Br)  
DW  
2000  
2000  
2000  
2500  
2500  
2500  
25  
Green (RoHS  
& no Sb/Br)  
DW  
Green (RoHS  
& no Sb/Br)  
DW  
Green (RoHS  
& no Sb/Br)  
DBQ  
DBQ  
DBQ  
DW  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
DW  
25  
Green (RoHS  
& no Sb/Br)  
DW  
25  
Green (RoHS  
& no Sb/Br)  
DBQ  
DBQ  
DBQ  
DBQ  
2500  
2500  
2500  
2500  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Addendum-Page 2  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
CY74FCT245TQCTE4  
CY74FCT245TQCTG4  
CY74FCT245TSOC  
ACTIVE  
SSOP  
SSOP  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
DBQ  
20  
20  
20  
20  
20  
20  
20  
20  
2500  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
FCT245  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
DBQ  
DW  
DW  
DW  
DW  
DW  
DW  
2500  
25  
Green (RoHS  
& no Sb/Br)  
FCT245  
FCT245  
FCT245  
FCT245  
FCT245  
FCT245  
FCT245  
Green (RoHS  
& no Sb/Br)  
CY74FCT245TSOCE4  
CY74FCT245TSOCG4  
CY74FCT245TSOCT  
CY74FCT245TSOCTE4  
CY74FCT245TSOCTG4  
25  
Green (RoHS  
& no Sb/Br)  
25  
Green (RoHS  
& no Sb/Br)  
2000  
2000  
2000  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
Addendum-Page 3  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 4  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
16-Aug-2012  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
CY74FCT245ATQCT  
CY74FCT245ATSOCT  
CY74FCT245CTQCT  
CY74FCT245DTQCT  
CY74FCT245TQCT  
CY74FCT245TSOCT  
SSOP  
SOIC  
SSOP  
SSOP  
SSOP  
SOIC  
DBQ  
DW  
20  
20  
20  
20  
20  
20  
2500  
2000  
2500  
2500  
2500  
2000  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
16.4  
24.4  
16.4  
16.4  
16.4  
24.4  
6.5  
10.8  
6.5  
9.0  
13.0  
9.0  
2.1  
2.7  
2.1  
2.1  
2.1  
2.7  
8.0  
12.0  
8.0  
16.0  
24.0  
16.0  
16.0  
16.0  
24.0  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
DBQ  
DBQ  
DBQ  
DW  
6.5  
9.0  
8.0  
6.5  
9.0  
8.0  
10.8  
13.0  
12.0  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
16-Aug-2012  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
CY74FCT245ATQCT  
CY74FCT245ATSOCT  
CY74FCT245CTQCT  
CY74FCT245DTQCT  
CY74FCT245TQCT  
CY74FCT245TSOCT  
SSOP  
SOIC  
SSOP  
SSOP  
SSOP  
SOIC  
DBQ  
DW  
20  
20  
20  
20  
20  
20  
2500  
2000  
2500  
2500  
2500  
2000  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
38.0  
45.0  
38.0  
38.0  
38.0  
45.0  
DBQ  
DBQ  
DBQ  
DW  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other  
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest  
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and  
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale  
supplied at the time of order acknowledgment.  
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary  
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily  
performed.  
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and  
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TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or  
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