CSD75208W1015T [TI]
采用 1mm x 1.5mm WLP 封装、具有栅极 ESD 保护的双路共源极、108mΩ、-20V、P 沟道 NexFET™ 功率 MOSFET | YZC | 6 | -55 to 150;
| 型号： | CSD75208W1015T |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 采用 1mm x 1.5mm WLP 封装、具有栅极 ESD 保护的双路共源极、108mΩ、-20V、P 沟道 NexFET™ 功率 MOSFET | YZC | 6 | -55 to 150 栅 开关 晶体管 栅极 |
| 文件： | 总13页 (文件大小：1096K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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CSD75208W1015
ZHCSCW3A –JULY 2014–REVISED MAY 2017
CSD75208W1015 双路 20V 共源 P 通道 NexFET™功率金属氧化物半导体
场效应晶体管 (MOSFET)
1 特性
产品概要
1
•
•
•
•
•
•
•
•
双路 P 通道 MOSFET
共源配置
TA = 25°C
VDS
典型值
-20
单位
V
漏源电压
1.5mm x 1mm 小尺寸封装
栅极 - 源电压钳位
栅极静电放电 (ESD) 保护 - 3kV
无铅
Qg
栅极电荷总量 (-4.5V)
栅极电荷（栅极到漏极）
1.9
nC
nC
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
V
Qgd
0.23
VGS = –1.8V
100
70
漏源
导通电阻
RDS(on)
VGS = -2.5V
VGS = -4.5V
VGS = -1.8V
VGS = -2.5V
VGS = -4.5V
56
符合 RoHS 环保标准
无卤素
190
120
90
RD1D2（导 漏极到漏极
导通电阻
通）
2 应用
VGS(th)
阈值电压
-0.8
•
•
•
电池管理
订购信息(1)
负载开关
电池保护
器件
CSD75208W1015 3000 7 英寸卷带
CSD75208W1015T 250 7 英寸卷带
数量
介质
封装
出货
卷带封装
1.0mm × 1.5mm
晶圆级封装
3 说明
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
此器件设计用于在超薄且具有出色散热特性的超小外形
尺寸封装内提供最低的导通电阻和栅极电荷。低导通电
阻与小型低厚度封装结合在一起，使得此器件成为电池
供电运行空间受限应用的 理想选择。
绝对最大额定值
TA = 25°C
值
-20
-6
单位
V
VDS
VGS
漏源电压
顶视图
栅源电压
V
持续漏极到漏极电流，
TC = 25°C 时测得
-1.6
–22
A
A
ID1D2
脉冲漏极到漏极电流，
TC = 25°C(1) 时测得
持续源引脚电流
–3
–39
-0.5
-7
A
A
IS
(1)脉冲源引脚电流
(2)
持续栅极钳位电流
脉冲栅极钳位电流(1)
功率耗散
A
IG
A
PD
0.75
W
TJ，
Tstg
运行结温和
储存温度范围
-55 至 150
°C
P0099-01
(1) 最大 RθJA = 165ºC/W，脉冲持续时间 ≤ 100μs，占空比 ≤ 1%
(2) 两器件并行
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLPS512
CSD75208W1015
ZHCSCW3A –JULY 2014–REVISED MAY 2017
www.ti.com.cn
RD1D2（导通）与 VGS 间的关系
RDS(on) 与 VGS 间的关系
270
240
210
180
150
120
90
150
135
120
105
90
TC = 25°C,I D = −1 A
TC = 125°C,I D = −1 A
TC = 25°C,I D = −1 A
TC = 125°C,I D = −1 A
75
60
45
60
30
30
15
0
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
−VGS - Gate-to- Source Voltage (V)
−VGS - Gate-to- Source Voltage (V)
G001
G001
2
版权 © 2014–2017, Texas Instruments Incorporated
CSD75208W1015
www.ti.com.cn
ZHCSCW3A –JULY 2014–REVISED MAY 2017
目录
6.1 接收文档更新通知 ..................................................... 8
6.2 社区资源.................................................................... 8
6.3 商标........................................................................... 8
6.4 静电放电警告............................................................. 8
6.5 Glossary.................................................................... 8
机械、封装和可订购信息 ......................................... 9
7.1 CSD75208W1015 封装尺寸...................................... 9
7.2 建议印刷电路板 (PCB) 焊盘图案............................. 10
7.3 卷带封装信息........................................................... 10
1
2
3
4
5
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 3
Specifications......................................................... 4
5.1 Electrical Characteristics........................................... 4
5.2 Thermal Information.................................................. 4
5.3 Typical MOSFET Characteristics.............................. 5
器件和文档支持........................................................ 8
7
6
4 修订历史记录
Changes from Original (July 2014) to Revision A
Page
•
•
Changed Figure 1. ................................................................................................................................................................. 5
已添加 社区资源 和接收文档更新通知 部分添加到了器件和文档支持。................................................................................. 8
版权 © 2014–2017, Texas Instruments Incorporated
3
CSD75208W1015
ZHCSCW3A –JULY 2014–REVISED MAY 2017
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5 Specifications
5.1 Electrical Characteristics
TA = 25°C unless otherwise stated
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
STATIC CHARACTERISTICS
BVDSS
BVGSS
IDSS
Drain-to-Source Voltage
VGS = 0 V, IDS = –250 μA
–20
V
Gate-to-Source Voltage
VDS = 0 V, IG = –250 μA
VGS = 0 V, VDS = –16 V
VDS = 0 V, VGS = –6 V
VDS = VGS, IDS = –250 μA
VGS = –1.8 V, ID = –1 A
VGS = –2.5 V, ID = –1 A
VGS = –4.5 V, ID = –1 A
VGS = –1.8 V, ID1D2 = –1 A
VGS = –2.5 V, ID1D2 = –1 A
VGS = –4.5 V, ID1D2 = –1 A
VDS = –2 V, ID = –1 A
–6.1
–7.2
–1
V
Drain-to-Source Leakage Current
Gate-to-Source Leakage Current
Gate-to-Source Threshold Voltage
μA
IGSS
–100
–1.1
150
88
nA
V
VGS(th)
–0.5
–0.8
100
70
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
S
RDS(on)
Drain-to-Source On-Resistance
56
68
190
120
90
285
150
108
RD1D2(on) Drain-to-Drain On-Resistance
gfs
Transconductance
7.5
DYNAMIC CHARACTERISTICS
CISS
COSS
CRSS
Qg
Input Capacitance
315
132
7.7
1.9
0.23
0.48
0.31
2.1
9
410
172
10
pF
pF
pF
nC
nC
nC
nC
nC
ns
VGS = 0 V, VDS = –10 V,
ƒ = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Charge Total (–4.5 V)
Gate Charge, Gate-to-Drain
Gate Charge, Gate-to-Source
Gate Charge at Vth
Output Charge
2.5
Qgd
Qgs
Qg(th)
QOSS
td(on)
tr
VDS = –10 V,
IDS = –1 A
VDS = –10 V, VGS = 0 V
Turn On Delay Time
Rise Time
5
ns
VDS = –10 V, VGS = –4.5 V,
IDS = –1 A, RG = 0 Ω
td(off)
tf
Turn Off Delay Time
Fall Time
29
ns
11
ns
DIODE CHARACTERISTICS
VSD
Qrr
trr
Diode Forward Voltage
Reverse Recovery Charge
Reverse Recovery Time
IDS = –1 A, VGS = 0 V
–0.75
4.3
9
–1
V
nC
ns
VDD = –10 V, IF = –1 A, di/dt = 200 A/μs
5.2 Thermal Information
TA = 25°C unless otherwise stated
THERMAL METRIC
MIN
TYP
165
95
MAX UNIT
(1) (2)
Junction-to-Ambient Thermal Resistance
RθJA
°C/W
Junction-to-Ambient Thermal Resistance(2) (3)
(1) Device mounted on FR4 material with minimum Cu mounting area
(2) Measured with both devices biased in a parallel condition.
(3) Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.
4
Copyright © 2014–2017, Texas Instruments Incorporated
CSD75208W1015
www.ti.com.cn
ZHCSCW3A –JULY 2014–REVISED MAY 2017
P-Chan 1.0x1.5 CSP TTA MAX Rev1
P-Chan 1.0x1.5 CSP TTA MIN Rev1
Typ RθJA = 95°C/W
when mounted on
1 inch2 (6.45 cm2) of
2-oz. (0.071-mm thick)
Cu.
Typ RθJA = 165°C/W
when mounted on
minimum pad area of
2-oz. (0.071-mm thick)
Cu.
M0155-01
M0156-01
5.3 Typical MOSFET Characteristics
(TA = 25°C unless otherwise stated)
Figure 1. Transient Thermal Impedance
Copyright © 2014–2017, Texas Instruments Incorporated
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Typical MOSFET Characteristics (continued)
(TA = 25°C unless otherwise stated)
10
10
8
9
8
7
6
5
4
3
6
4
VGS = −4.5 V
VGS = −2.5 V
VGS = −1.8 V
TC = 125°C
TC = 25°C
TC = −55°C
2
1
0
2
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
0
0
0
0.3
0.6
0.9
1.2
1.5
1.8
2.1
2.4
−VDS - Drain-to-Source Voltage (V)
−VGS - Gate-to-Source Voltage (V)
G001
G001
VDS = –5 V
Figure 2. Saturation Characteristics
Figure 3. Transfer Characteristics
4.5
4
400
350
300
250
200
150
100
50
3.5
3
Ciss = Cgd + Cgs
Coss = Cds + Cgd
Crss = Cgd
2.5
2
1.5
1
0.5
0
0
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
2
4
6
8
10
12
14
16
18
20
Qg - Gate Charge (nC)
−VDS - Drain-to-Source Voltage (V)
G001
G001
VDS = –10 V
ID = –1 A
Figure 4. Gate Charge
Figure 5. Capacitance
1.1
1
270
240
210
180
150
120
90
TC = 25°C,I D = −1 A
TC = 125°C,I D = −1 A
0.9
0.8
0.7
0.6
0.5
0.4
0.3
60
30
0
−75 −50 −25
0
25
50
75 100 125 150 175
1
2
3
4
5
6
TC - Case Temperature (ºC)
−VGS - Gate-to- Source Voltage (V)
G001
G001
ID = –250 µA
Figure 6. Threshold Voltage vs Temperature
Figure 7. On-State Drain-to-Drain Resistance vs
Gate-to-Source Voltage
6
Copyright © 2014–2017, Texas Instruments Incorporated
CSD75208W1015
www.ti.com.cn
ZHCSCW3A –JULY 2014–REVISED MAY 2017
Typical MOSFET Characteristics (continued)
(TA = 25°C unless otherwise stated)
150
1.5
1.4
1.3
1.2
1.1
1
TC = 25°C,I D = −1 A
TC = 125°C,I D = −1 A
VGS = −2.5V
VGS = −4.5V
135
120
105
90
75
60
45
30
15
0
0.9
0.8
0.7
0
1
2
3
4
5
6
−75 −50 −25
0
25
50
75 100 125 150 175
−VGS - Gate-to- Source Voltage (V)
TC - Case Temperature (ºC)
G001
G001
ID = –1 A
Figure 8. On-State Drain-to-Source Resistance vs
Gate-to-Source Voltage
Figure 9. Normalized On-State Resistance vs Temperature
10
100
TC = 25°C
TC = 125°C
1
0.1
10
1
0.01
0.001
0.0001
10us
100us
1ms
10ms
100ms
0.1
0.1
0
0.2
0.4
0.6
0.8
1
1
10
100
−VSD − Source-to-Drain Voltage (V)
−VDS - Drain-to-Source Voltage (V)
G001
G001
Single Pulse, Max RθJA = 165°C/W
Figure 10. Typical Diode Forward Voltage
Figure 11. Maximum Safe Operating Area
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
−50 −25
0
25
50
75 100 125 150 175 200
TC - Case Temperature (ºC)
G001
Figure 12. Maximum Drain Current vs Temperature
Copyright © 2014–2017, Texas Instruments Incorporated
7
CSD75208W1015
ZHCSCW3A –JULY 2014–REVISED MAY 2017
www.ti.com.cn
6 器件和文档支持
将
6.1 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。请单击右上角的通知我进行注册，即可收到任意产品
信息更改每周摘要。有关更改的详细信息，请查看任意已修订文档中包含的修订历史记录。
6.2 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在
e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。
设计支持
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
6.3 商标
NexFET, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
6.4 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
6.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
8
版权 © 2014–2017, Texas Instruments Incorporated
CSD75208W1015
www.ti.com.cn
ZHCSCW3A –JULY 2014–REVISED MAY 2017
7 机械、封装和可订购信息
以下页面包括机械、封装和可订购信息。这些信息是指定器件的最新可用数据。这些数据发生变化时，我们可能不
会另行通知或修订此文档。如欲获取此产品说明书的浏览器版本，请参见左侧的导航栏。
7.1 CSD75208W1015 封装尺寸
NOTE: 全部尺寸单位为 mm（除非另外注明）。
表 1. 引脚分配
位置
B1，B2
C1
名称
源极
栅极 1
漏极 1
栅极 2
漏极 2
C2
A2
A1
版权 © 2014–2017, Texas Instruments Incorporated
9
CSD75208W1015
ZHCSCW3A –JULY 2014–REVISED MAY 2017
www.ti.com.cn
7.2 建议印刷电路板 (PCB) 焊盘图案
Ø 0.25
1
2
A
B
C
0.50
M0158-01
NOTE: 全部尺寸单位为 mm（除非另外注明）。
7.3 卷带封装信息
4.00 0.10
2.00 0.0ꢀ
Ø 1.ꢀ0 0.10
2° Max
+0.0ꢀ
4.00 0.10
Ø 0.60
–0.10
0.86 0.0ꢀ
0.2ꢀ4 0.02
2° Max
1.19 0.0ꢀ
M01ꢀ9-01
NOTE: 全部尺寸单位为 mm（除非另外注明）。
10
版权 © 2014–2017, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
CSD75208W1015
CSD75208W1015T
ACTIVE
ACTIVE
DSBGA
DSBGA
YZC
YZC
6
6
3000 RoHS & Green
250 RoHS & Green
SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 150
-55 to 150
75208
75208
SNAGCU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
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相关型号：
CSD786
Small Signal Bipolar Transistor, 0.3A I(C), 1-Element, NPN, Silicon, TO-92, PLASTIC, TO-92, 3 PIN
CDIL
CSD786Q
Small Signal Bipolar Transistor, 0.3A I(C), 1-Element, NPN, Silicon, TO-92, PLASTIC, TO-92, 3 PIN
CDIL
CSD786R
Small Signal Bipolar Transistor, 0.3A I(C), 1-Element, NPN, Silicon, TO-92, PLASTIC, TO-92, 3 PIN
CDIL
CSD786S
Small Signal Bipolar Transistor, 0.3A I(C), 1-Element, NPN, Silicon, TO-92, PLASTIC, TO-92, 3 PIN
CDIL
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