CLVTH16244AMDGGREP [TI]
3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS; 3.3 -V ABT 16位缓冲器/驱动器,具有三态输出型号: | CLVTH16244AMDGGREP |
厂家: | TEXAS INSTRUMENTS |
描述: | 3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS |
文件: | 总15页 (文件大小:575K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN74LVTH16244A-EP
3.3-V ABT 16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS692F–APRIL 2003–REVISED APRIL 2007
FEATURES
•
Controlled Baseline
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
–
One Assembly/Test Site, One Fabrication
Site
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1Y1
1Y2
GND
1Y3
1Y4
2OE
1A1
1A2
GND
1A3
1A4
•
•
Extended Temperature Performance of up to
–40°C to 85°C, –40°C to 125°C and –55°C to
125°C
2
3
4
Enhanced Diminishing Manufacturing Sources
(DMS) Support
5
6
•
•
•
Enhanced Product-Change Notification
7
V
CC
V
CC
(1)
Qualification Pedigree
8
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
Member of the Texas Instruments Widebus™
Family
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
•
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V Operation
and Low Static-Power Dissipation
•
•
•
•
•
•
•
Supports Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V VCC
)
Supports Unregulated Battery Operation
Down to 2.7 V
V
CC
V
CC
Typical VOLP (Output Ground Bounce) <0.8 V
at VCC = 3.3 V, TA = 25°C
4Y1
4Y2
GND
4Y3
4Y4
4OE
4A1
4A2
GND
4A3
4A4
3OE
Ioff and Power-Up 3-State Support Hot
Insertion
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds JESD 22
–
–
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
DESCRIPTION/ORDERING INFORMATION
The SN74LVTH16244A is a 16-bit buffer and line driver designed for low-voltage (3.3 V) VCC operation, but with
the capability to provide a TTL interface to a 5-V system environment. This device can be used as four 4-bit
buffers, two 8-bit buffers, or one 16-bit buffer. This device provides true outputs and symmetrical active-low
output-enable (OE) inputs.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74LVTH16244A-EP
3.3-V ABT 16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS692F–APRIL 2003–REVISED APRIL 2007
When VCC is between 0 V and 1.5 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the device when it is powered down. The
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
abc
TERMINAL ASSIGNMENTS(1)
(56-Ball GQL/ZQL Package)
GQL OR ZQL PACKAGE
(TOP VIEW)
1 2 3 4 5 6
1
2
3
4
5
6
A
B
C
D
E
F
1OE
1Y2
1Y4
2Y2
2Y4
3Y1
3Y3
4Y1
4Y3
4OE
NC
NC
NC
NC
2OE
1A2
1A4
2A2
2A4
3A1
3A3
4A1
4A3
3OE
A
B
C
D
E
F
G
H
J
1Y1
1Y3
2Y1
2Y3
3Y2
3Y4
4Y2
4Y4
NC
GND
VCC
GND
GND
VCC
GND
1A1
1A3
2A1
2A3
3A2
3A4
4A2
4A4
NC
G
H
J
GND
VCC
GND
NC
GND
VCC
GND
NC
K
abc
abc
abc
K
(1) NC - No internal connection
ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER
CLVTH16244AQDLREP
TOP-SIDE MARKING
SSOP – DL
Tape and reel
LH16244AEP
LH16244AEP
LL244AEP
–40°C to 125°C
TSSOP – DGG
Tape and reel
Tape and reel
CLVTH16244AQDGGREP
CLVTH16244AIDGVREP
CLVTH162244AIGQLREP
CLVTH16244AIZQLREP
CLVTH16244AMDGGREP
TVSOP – DGV
–40°C to 85°C
VFBGA – GQL
Tape and reel
Tape and reel
LL244AEP
VFBGA – ZQL (Pb-free)
–55°C to 125°C TSSOP – DGG
H16244AMEP
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
2
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SN74LVTH16244A-EP
3.3-V ABT 16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS692F–APRIL 2003–REVISED APRIL 2007
FUNCTION TABLE
(each 4-bit buffer)
INPUTS
OUTPUT
Y
OE
L
A
H
L
H
L
L
H
X
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
1
25
1OE
1A1
3OE
47
2
3
5
6
36
35
33
32
13
14
16
17
1Y1
1Y2
1Y3
1Y4
3A1
3A2
3A3
3A4
3Y1
3Y2
3Y3
3Y4
46
44
43
1A2
1A3
1A4
48
41
24
30
2OE
2A1
4OE
4A1
8
9
19
20
22
23
2Y1
2Y2
2Y3
2Y4
4Y1
4Y2
4Y3
4Y4
40
38
37
29
27
26
2A2
2A3
2A4
4A2
4A3
4A4
11
12
Pin numbers shown are for the DGG, DGV, and DL packages.
3
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SN74LVTH16244A-EP
3.3-V ABT 16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS692F–APRIL 2003–REVISED APRIL 2007
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
–0.5
MAX UNIT
VCC
VI
Supply voltage range
Input voltage range(2)
Voltage range applied to any output in the high-impedance or power-off state(2)
Voltage range applied to any output in the high state(2)
4.6
V
V
V
V
7
VO
VO
7
VCC + 0.5
96
SN74LVTH16244AQ
Current into any output in the low state
IO
mA
mA
SN74LVTH16244AI
128
48
SN74LVTH16244AQ
Current into any output in the high state(3)
IO
SN74LVTH16244AI
64
IIK
Input clamp current
Output clamp current
VI < 0
–50
–50
70
mA
mA
IOK
VO < 0
DGG package
DGV package
DL package
GQL/ZQL package
58
θJA
Package thermal impedance(4)
°C/W
°C
63
42
Tstg
Storage temperature range
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3) This current flows only when the output is in the high state and VO > VCC
.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions(1)
MIN
2.7
2
MAX
UNIT
VCC
VIH
VIL
VI
Supply voltage
3.6
V
V
V
V
High-level input voltage
Low-level input voltage
Input voltage
0.8
5.5
–24
–32
–24
24
SN74LVTH16244AQ
SN74LVTH16244AI
SN74LVTH16244AM
SN74LVTH16244AQ
SN74LVTH16244AI
SN74LVTH16244AM
Outputs enabled
IOH
High-level output current
mA
mA
IOL
Low-level output current
64
24
∆t/∆v
Input transition rise or fall rate
10
ns/V
∆t/∆VCC Power-up ramp rate
200
–40
–40
–55
µs/V
SN74LVTH16244AQ
SN74LVTH16244AI
SN74LVTH16244AM
125
85
TA
Operating free-air temperature
°C
125
(1) All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
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SN74LVTH16244A-EP
3.3-V ABT 16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS692F–APRIL 2003–REVISED APRIL 2007
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
TEST CONDITIONS
VCC
2.7 V
MIN
TYP(1)
MAX
UNIT
II = –18 mA
–1.2
V
IOH = –100 µA
IOH = –8 mA
2.7 V to 3.6 V
2.7 V
VCC – 0.2
2.4
2
'LVTH16244AQ
IOH = –24 mA
IOH = –32 mA
'LVTH16244AI
'LVTH16244AM
'LVTH16244AQ
'LVTH16244AI
'LVTH16244AM
VOH
V
2
2
3 V
IOL = 100 µA
IOL = 24 mA
IOL = 16 mA
0.2
0.5
0.4
2.7 V
'LVTH16244AQ
'LVTH16244AI
'LVTH16244AM
'LVTH16244AQ
'LVTH16244AI
'LVTH16244AM
'LVTH16244AQ
'LVTH16244AI
'LVTH16244AM
VOL
IOL = 32 mA
IOL = 64 mA
0.5
V
3 V
0.55
50
10
50
VI = 5.5 V
0 V or 3.6 V
II
µA
Control
inputs
VI = VCC or GND
±1
3.6 V
VI = VCC
VI = 0 V
1
Data
inputs
–5
'LVTH16244AQ
'LVTH16244AI
'LVTH16244AM
Ioff
VI or VO = 0 V to 4.5 V
0 V
3 V
±100
µA
µA
VI = 0.8 V
VI = 2 V
75
–75
Data
inputs
'LVTH16244AQ
'LVTH16244AI
'LVTH16244AM
II(hold)
500
–750
VI = 0 V to 3.6 V
3.6 V(2)
IOZH
VO = 3 V
3.6 V
3.6 V
5
–5
µA
µA
µA
µA
IOZL
VO = 0.5 V
IOZPU
IOZPD
VO = 0.5 V to 3 V, OE = Don't care
VO = 0.5 V to 3 V, OE = Don't care
0 V to 1.5 V
1.5 V to 0 V
±100
±100
0.19
5
Outputs high
Outputs low
IO = 0 ,
VI = VCC or GND
ICC
3.6 V
mA
Outputs disabled
0.19
One input at VCC – 0.6 V,
Other inputs at VCC or GND
(3)
∆ICC
3 V to 3.6 V
0.2
0.2
mA
pF
Ci
VI = 3 V or 0 V
4
(1) All typical values are at VCC = 3.3 V, TA = 25°C.
(2) This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to
another.
(3) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
5
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SN74LVTH16244A-EP
3.3-V ABT 16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS692F–APRIL 2003–REVISED APRIL 2007
Electrical Characteristics (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
Co
TEST CONDITIONS
VCC
MIN
TYP(1)
MAX
UNIT
VO = 3 V or 0 V
9
pF
Switching Characteristics
over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1)
SN74LVTH16244AQ/M
SN74LVTH16244AI
VCC = 3.3 V
FROM
(INPUT)
TO
(OUTPUT)
VCC = 3.3 V
VCC = 2.7 V
± 0.3 V
PARAMETER
VCC = 2.7 V
UNIT
± 0.3 V
TYP
2.5
MIN
1.1
1.1
1.1
1.1
1.6
1.2
MAX
4.4
3.6
4.6
5.4
5.7
5
MIN
MAX
4.6
3.9
5.4
6.2
6.2
4.7
MIN
1.2
1.2
1.2
1.2
2.2
2
MAX
3.2
3.2
4
MIN MAX
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tsk(o)
3.7
3.7
5
A
Y
Y
Y
ns
ns
2
2.6
OE
OE
2.7
4
5
3.3
4.5
4.2
0.5
5
ns
ns
3.1
4.4
6
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SN74LVTH16244A-EP
3.3-V ABT 16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS692F–APRIL 2003–REVISED APRIL 2007
PARAMETER MEASUREMENT INFORMATION
6 V
Open
S1
500 Ω
TEST
/t
S1
From Output
Under Test
GND
t
t
t
Open
6 V
GND
PLH PHL
/t
PLZ PZL
C = 50 pF
L
500 Ω
/t
PHZ PZH
(see Note A)
2.7 V
0 V
LOAD CIRCUIT
Timing Input
Data Input
1.5 V
t
w
t
t
h
su
2.7 V
0 V
2.7 V
0 V
Input
1.5 V
1.5 V
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
2.7 V
0 V
2.7 V
0 V
Output
Control
Input
1.5 V
1.5 V
1.5 V
1.5 V
t
t
PZL
PLZ
t
t
t
PHL
PLH
Output
Waveform 1
S1 at 6 V
V
V
3 V
OH
Output
1.5 V
1.5 V
1.5 V
1.5 V
V
+ 0.3 V
OL
V
OL
(see Note B)
OL
t
t
t
PZH
PHZ
PHL
PLH
Output
Waveform 2
S1 at GND
V
V
V
OH
OH
V
− 0.3 V
OH
1.5 V
VOLTAGE WAVEFORMS
1.5 V
Output
≈0 V
(see Note B)
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time, with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
7
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PACKAGE OPTION ADDENDUM
www.ti.com
13-Oct-2011
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
8W244AMDGGREPG4
CLVTH16244AIDGVREP
CLVTH16244AIZQLREP
ACTIVE
ACTIVE
ACTIVE
TSSOP
TVSOP
DGG
DGV
ZQL
48
48
56
2000
2000
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
SNAGCU Level-1-260C-UNLIM
BGA
Pb-Free (RoHS)
MICROSTAR
JUNIOR
CLVTH16244AMDGGREP
CLVTH16244AQDGGREP
CLVTH16244AQDLREP
V62/04601-01XE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
SSOP
DGG
DGG
DL
48
48
48
48
48
56
2000
2000
1000
1000
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
SSOP
DL
Green (RoHS
& no Sb/Br)
V62/04601-01YE
TSSOP
DGG
GQL
Green (RoHS
& no Sb/Br)
V62/04601-02UA
BGA
TBD
Call TI
Call TI
MICROSTAR
JUNIOR
V62/04601-02ZE
V62/04601-03YE
ACTIVE
ACTIVE
TVSOP
DGV
DGG
48
48
2000
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
TSSOP
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
13-Oct-2011
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVTH16244A-EP :
Catalog: SN74LVTH16244A
•
Military: SN54LVTH16244A
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CLVTH16244AIDGVREP TVSOP
DGV
ZQL
48
56
2000
1000
330.0
330.0
16.4
16.4
7.1
4.8
10.2
7.3
1.6
12.0
8.0
16.0
16.0
Q1
Q1
CLVTH16244AIZQLREP BGA MI
1.45
CROSTA
R JUNI
OR
CLVTH16244AMDGGREP TSSOP
CLVTH16244AQDGGREP TSSOP
DGG
DGG
DL
48
48
48
2000
2000
1000
330.0
330.0
330.0
24.4
24.4
32.4
8.6
8.6
15.8
15.8
1.8
1.8
3.1
12.0
12.0
16.0
24.0
24.0
32.0
Q1
Q1
Q1
CLVTH16244AQDLREP
SSOP
11.35 16.2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
CLVTH16244AIDGVREP
TVSOP
DGV
ZQL
48
56
2000
1000
367.0
333.2
367.0
345.9
38.0
28.6
CLVTH16244AIZQLREP BGA MICROSTAR
JUNIOR
CLVTH16244AMDGGREP
CLVTH16244AQDGGREP
CLVTH16244AQDLREP
TSSOP
TSSOP
SSOP
DGG
DGG
DL
48
48
48
2000
2000
1000
367.0
367.0
367.0
367.0
367.0
367.0
45.0
45.0
55.0
Pack Materials-Page 2
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
M
0,08
0,50
48
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
0,25
1
24
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
48
56
64
DIM
A MAX
12,60
12,40
14,10
13,90
17,10
16,90
A MIN
4040078/F 12/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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