CDC392 [TI]
1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS; 1 - LINE至6线路时钟驱动器，可选的极性和三态输出
| 型号： | CDC392 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS |
| 文件： | 总8页 (文件大小：129K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CDC392
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS
SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995
D PACKAGE
(TOP VIEW)
Low Output Skew for Clock-Distribution
and Clock-Generation Applications
TTL-Compatible Inputs and
CMOS-Compatible Outputs
1Y1
1T/C
GND
1Y2
1Y3
GND
2Y1
2Y2
GND
3Y1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Distributes One Clock Input to Six Clock
Outputs
V
CC
2T/C
A
Polarity Control Selects True or
Complementary Outputs
V
CC
3T/C
OE
Distributed V
Switching Noise
and GND Pins Reduce
CC
High-Drive Outputs (–32-mA I
,
OH
32-mA I
)
OL
State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
Packaged In Plastic Small-Outline Package
description
The CDC392 contains a clock-driver circuit that distributes one input signal to six outputs with minimum skew
for clock distribution. Through the use of the polarity-control (T/C) inputs, various combinations of true and
complementary outputs can be obtained. The output-enable (OE) input is provided to disable the outputs to a
high-impedance state.
The CDC392 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUT
Y
OE
H
L
T/C
X
A
X
L
Z
L
L
L
L
H
L
H
H
L
L
H
L
H
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CDC392
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS
SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995
†
logic symbol
9
OE
EN
16
2
1
1
1
2
2
3
1Y1
1Y2
1Y3
2Y1
2Y2
3Y1
12
15
13
10
A
3
N1
N2
N3
1T/C
5
2T/C
3T/C
6
8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
9
OE
15
1T/C
16
2
1Y1
1Y2
1Y3
3
5
6
8
12
A
2Y1
2Y2
13
10
2T/C
3T/C
3Y1
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CDC392
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS
SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
Voltage range applied to any output in the high state or power-off state, V
. . . . . . . –0.5 V to V
+ 0.5 V
O
CC
Current into any output in the low state, I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 mA
O
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA
IK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
OK
O
Maximum power dissipation at T = 55°C (in still air) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.77 W
A
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 300 mils.
Formoreinformation,refertothePackageThermalConsiderationsapplicationnoteinthe1994ABTAdvancedBiCMOSTechnology
Data Book, literature number SCBD002B.
recommended operating conditions (see Note 3)
MIN NOM
MAX
UNIT
V
V
V
V
V
Supply voltage
4.75
2
5
5.25
CC
High-level input voltage
Low-level input voltage
Input voltage
V
IH
0.8
V
IL
0
V
V
I
CC
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Input clock frequency
Operating free-air temperature
–32
32
5
mA
mA
ns/V
MHz
°C
OH
OL
∆t/∆v
f
90
85
clock
T
–40
A
NOTE 3: Unused inputs must be held high or low to prevent them from floating.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CDC392
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS
SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
PARAMETER
TEST CONDITIONS
I = –18 mA
MIN TYP
MAX
UNIT
V
V
V
V
V
V
V
V
V
= 4.75 V,
= 4.75 V,
= 4.75 V,
= 5.25 V,
= 5.25 V,
–1.2
IK
CC
CC
CC
CC
CC
I
I
I
= – 32 mA
= 32 mA
3.85
V
OH
OL
OH
0.55
±1
V
OL
I
I
V = V
or GND
µA
µA
I
CC
= V or GND
CC
I
V
O
±50
10
OZ
Outputs high
Outputs low
V
= 5.25 V,
I
O
= 0,
CC
I
40
mA
CC
V = V
or GND
I
CC
Outputs disabled
10
C
C
V = 2.5 V or 0.5 V
3
7
pF
pF
i
I
V
O
= V
or GND
o
CC
†
All typical values are at V
= 5 V, T = 25°C
CC
A
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (see Figures 1 and 2)
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
TYP
MAX
UNIT
t
2
1.5
1.5
1.5
1.5
3
6.5
5
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Any Y
Any Y
Any Y
Any Y
ns
t
t
t
t
t
t
t
5
ns
ns
ns
ns
T/C
OE
5
6
8
1.5
1.5
5
OE
A
5
Any Y (same phase)
Any Y (any phase)
0.6
2.2
t
sk(o)
t
t
1.4
ns
ns
r
0.83
f
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CDC392
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS
SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995
PARAMETER MEASUREMENT INFORMATION
2 × V
CC
Open
GND
TEST
S1
Open
2 × V
CC
Open
S1
500 Ω
t
t
t
/t
PLH PHL
/t
From Output
Under Test
PLZ PZL
/t
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
3 V
0 V
Output
Control
(low-level
enabling)
LOAD CIRCUIT FOR OUTPUTS
1.5 V
1.5 V
t
PZL
t
PLZ
3 V
0 V
Input
1.5 V
1.5 V
≈ V
CC
Output
Waveform 1
50% V
CC
CC
V
+ 0.3 V
OL
t
PLH
S1 at 2 × V
(see Note C)
V
CC
OL
t
PHL
t
PHZ
V
t
OH
PZH
70% V
CC
70% V
30% V
CC
Output
Waveform 2
S1 at Open
(see Note C)
Output
50% V
CC
V
OH
30% V
CC
CC
V
OH
– 0.3 V
V
OL
50% V
≈ 0 V
t
t
f
r
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A.
C includes probe and jig capacitance.
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CDC392
1-LINE TO 6-LINE CLOCK DRIVER
WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS
SCAS335A – DECEMBER 1992 – REVISED NOVEMBER 1995
PARAMETER MEASUREMENT INFORMATION
A
1T/C
1Y1
t
t
t
t
t
t
t
t
PLH1
PLH2
PHL1
PHL2
PLH5
PLH6
PHL5
PHL6
1Y2
2T/C
2Y1
2Y2
t
t
t
t
t
t
t
t
PHL7
PHL8
PLH7
PLH8
PLH3
PLH4
PHL3
PHL4
NOTES: A. Output skew, t
from A to any Y (same phase), can be measured only between outputs for which the respective polarity-control
inputs (T/C) are at the same logic level. It is calculated as the greater of:
sk(o),
– The difference between the fastest and slowest of t
– The difference between the fastest and slowest of t
– The difference between the fastest and slowest of t
– The difference between the fastest and slowest of t
from A↑ to any Y (e.g., t
from A↓ to any Y (e.g., t
from A↓ to any Y (e.g., t
from A↑ to any Y (e.g., t
, n = 1 to 4; or t
, n = 1 to 4; or t
, n = 7 to 8)
, n = 5 to 6)
, n = 5 to 6)
PLH
PHL
PLH
PHL
PLHn
PHLn
PLHn
PHLn
PLHn
PHLn
, n = 7 to 8)
B. Output skew, t
from A to any Y (any phase), can be measured between outputs for which the respective polarity-control inputs
(T/C) are at the same or different logic levels. It is calculated as the greater of:
sk(o),
– The difference between the fastest and slowest of t
from A↑ to any Y or t
from A↑ to any Y (e.g., t
, n = 1 to 4;
PLH
PHL
PLHn
or t
, n = 5 to 6, and t
PLHn
, n = 7 to 8)
PHLn
– The difference between the fastest and slowest of t
or t , n = 5 to 6, and t , n = 7 to 8)
from A↓ to any Y or t
from A↓ to any Y (e.g., t
, n = 1 to 4;
PHLn
PHL
PLH
PHLn PLHn
Figure 2. Waveforms for Calculation of t
sk(o)
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
SOIC
SOIC
Drawing
CDC392D
OBSOLETE
OBSOLETE
D
D
16
16
TBD
TBD
Call TI
Call TI
Call TI
Call TI
CDC392DR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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