CD74HCT4066M96E4 [TI]
High-Speed CMOS Logic Quad Bilateral Switch; 高速CMOS逻辑四路双向开关
| 型号： | CD74HCT4066M96E4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | High-Speed CMOS Logic Quad Bilateral Switch |
| 文件： | 总14页 (文件大小：304K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CD54HC4066, CD74HC4066,
CD74HCT4066
Data sheet acquired from Harris Semiconductor
SCHS208D
High-Speed CMOS Logic
Quad Bilateral Switch
February 1998 - Revised August 2003
Features
Description
• Wide Analog-Input-Voltage Range . . . . . . . . . . 0V - 10V The ’HC4066 and CD74HCT4066 contain four independent
digitally controlled analog switches that use silicon-gate
CMOS technology to achieve operating speeds similar to
LSTTL with the low power consumption of standard CMOS
integrated circuits.
• Low “ON” Resistance
[ /Title
(CD74H
C4066,
CD74H
CT4066
)
/Subject
(High-
Speed
CMOS
Logic
- V
- V
= 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25Ω
= 9V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15Ω
CC
CC
• Fast Switching and Propagation Delay Times
These switches feature the characteristic linear “ON”
resistance of the metal-gate CD4066B. Each switch is
turned on by a high-level voltage on its control input.
• Low “OFF” Leakage Current
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C
Ordering Information
• HC Types
TEMP. RANGE
o
- 2V to 10V Operation
PART NUMBER
CD54HC4066F3A
CD74HC4066E
( C)
PACKAGE
14 Ld CERDIP
14 Ld PDIP
- High Noise Immunity: N = 30%, N = 30% of V
IL IH CC
at V
= 5V and 10V
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
CC
• HCT Types
- Direct LSTTL Input Logic Compatibility,
V = 0.8V (Max), V = 2V (Min)
Quad
CD74HC4066M
14 Ld SOIC
14 Ld SOIC
14 Ld SOIC
14 Ld TSSOP
14 Ld TSSOP
14 Ld TSSOP
14 Ld PDIP
IL
IH
CD74HC4066MT
CD74HC4066M96
CD74HC4066PW
CD74HC4066PWR
CD74HC4066PWT
CD74HCT4066E
CD74HCT4066M
CD74HCT4066MT
CD74HCT4066M96
- CMOS Input Compatibility, I ≤ 1µA at V , V
OL OH
l
14 Ld SOIC
14 Ld SOIC
14 Ld SOIC
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
Pinout
CD54HC4066 (CERDIP)
CD74HC4066 (PDIP, SOIC, TSSOP)
CD74HCT4066 (PDIP, SOIC)
TOP VIEW
1Y
1Z
1
2
3
4
5
6
7
14 V
CC
13 1E
12 4E
11 4Y
10 4Z
2Z
2Y
2E
3E
9
8
3Z
3Y
GND
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
1
CD54HC4066, CD74HC4066, CD74HCT4066
Functional Diagram
13
5
1
1Y
1Z
2Y
2Z
3Y
3Z
4Y
4Z
1E
2E
3E
4E
2
4
3
6
8
9
12
11
10
GND = 7
= 14
V
CC
TRUTH TABLE
INPUT
nE
SWITCH
Off
L
On
H
H= High Level
L= Low Level
Logic Diagram
nY
p
p
n
n
nZ
nE
2
CD54HC4066, CD74HC4066, CD74HCT4066
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage, V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 10.5V
DC Input Diode Current, I
Thermal Resistance (Typical, Note 2)
θ
CC
JA
o
E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . .
M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . .
PW (TSSOP) Package . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Hermetic Package or Die) . . . 175 C
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150 C
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300 C
(SOIC - Lead Tips Only)
80 C/W
o
86 C/W
o
IK
113 C/W
o
For V < -0.5V or V > V
+ 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
I
I
CC
o
DC Switch Current, I (Note 1)
O
o
o
For -0.5V < V < V
+ 0.5V. . . . . . . . . . . . . . . . . . . . . . . . . .±25mA
O
CC
o
DC Output Diode Current, I
OK
For V < -0.5V or V > V
+ 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
O
O
CC
DC Output Source or Sink Current per Output Pin, I
O
For V > -0.5V or V < V
+ 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
O
O
CC
DC V
or Ground Current, I
. . . . . . . . . . . . . . . . . . . . . . . . .±50mA
CC
CC
Operating Conditions
o
o
Temperature Range, T . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C
A
Supply Voltage Range, V
CC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 10V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V , V . . . . . . . . . . . . . . . . . 0V to V
I
O
CC
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. In certain applications, the external load-resistor current may include both V and signal-line components. To avoid drawing V current
CC CC
when switch current flows into the transmission gate inputs, (terminals 1, 4, 8 and 11) the voltage drop across the bidirectional switch
must not exceed 0.6V (calculated from R values shown in the DC Electrical Specifications Table). No V current will flow through
ON
CC
R if the switch current flows into terminals 2, 3, 9 and 10.
L
2. The package thermal impedance is calculated in accordance with JESD 51-7.
DC Electrical Specifications
TEST
CONDITIONS
o
o
o
o
o
25 C
-40 C TO 85 C
-55 C TO 125 C
PARAMETER
HC TYPES
SYMBOL V (V)
V
(V)
V
(V) MIN TYP MAX
MIN
MAX
MIN
MAX
UNITS
I
IS
CC
High Level Input
Voltage
V
-
-
-
2
1.5
-
-
-
-
-
-
-
-
-
1.5
-
-
1.5
-
-
V
V
IH
4.5
3.15
3.15
3.15
9
2
6.3
-
6.3
-
6.3
-
V
Low Level Input
Voltage
V
-
-
-
-
-
0.5
1.35
2.7
±0.1
-
-
-
-
0.5
1.35
2.7
±1
-
-
-
-
0.5
1.35
2.7
±1
V
IL
4.5
9
V
V
Input Leakage
Current
I
V
or
-
10
µA
IL
CC
GND
(Any Control)
Off-Switch Leakage
Current
I
V
V
GND
or
10
-
-
±0.1
-
±1
-
±1
µA
Z
IL
CC
3
CD54HC4066, CD74HC4066, CD74HCT4066
DC Electrical Specifications (Continued)
TEST
CONDITIONS
o
o
o
o
o
25 C
-40 C TO 85 C
-55 C TO 125 C
PARAMETER
SYMBOL V (V)
V
(V)
V
(V) MIN TYP MAX
MIN
MAX
106
94
78
118
105
88
-
MIN
MAX
128
113
95
UNITS
Ω
I
IS
CC
“ON” Resistance
= 1mA
(Figure 1)
R
V
V
or
4.5
-
-
-
-
-
-
-
-
-
-
-
25
20
15
35
24
16
1
80
75
60
95
84
70
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ON
CC
CC
I
GND
O
6
9
Ω
Ω
V
GND
to
4.5
6
142
126
105
-
Ω
CC
Ω
9
Ω
“ON” Resistance
Between Any Two
Switches
∆R
ON
V
-
-
4.5
6
Ω
CC
0.75
0.5
-
-
-
-
Ω
9
-
-
-
Ω
Quiescent Device
Current
I
V
or
6
2
20
160
40
µA
µA
CC
CC
GND
10
-
16
320
HCT TYPES
High Level Input
Voltage
V
-
-
-
-
-
4.5 to
5.5
2
-
-
-
-
-
2
-
-
2
-
-
V
V
IH
Low Level Input
Voltage
V
4.5 to
5.5
0.8
±0.1
0.8
±1
0.8
±1
IL
Input Leakage
Current
I
V
or
5.5
-
-
-
µA
IL
CC
GND
(Any Control)
Off-Switch Leakage
Current
I
V
V
GND
or
5.5
4.5
4.5
4.5
-
-
-
-
-
±0.1
80
95
-
-
-
-
-
±1
106
118
-
-
-
-
-
±1
128
142
-
µA
Ω
Z
IL
CC
“ON” Resistance
R
V
V
or
25
35
1
ON
CC
CC
CC
I
= 1mA
GND
O
(Figure 1)
V
GND
to
Ω
CC
“ON” Resistance
Between Any Two
Switches
∆R
V
-
Ω
ON
Quiescent Device
Current
I
V
or
-
-
5.5
-
-
-
2
-
-
20
-
-
40
µA
µA
CC
CC
GND
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
∆I
V
4.5 to
5.5
100
360
450
490
CC
CC
- 2.1
(Note 3)
NOTE:
3. For dual-supply systems theoretical worst case (V = 2.4V, V
I
= 5.5V) specification is 1.8mA.
CC
HCT Input Loading Table
INPUT
All
UNIT LOADS
1
NOTE: Unit Load is ∆I
tions table, e.g., 360µA max at 25 C.
limit specified in DC Electrical Specifica-
CC
o
4
CD54HC4066, CD74HC4066, CD74HCT4066
Switching Specifications Input t , t = 6ns
r
f
o
o
o
o
o
25 C
-40 C TO 85 C -55 C TO 125 C
TEST
V
CC
PARAMETER
HC TYPES
SYMBOL CONDITIONS (V)
MIN TYP MAX
MIN
MAX
MIN
MAX
UNITS
Propagation Delay Time
Switch In to Out
t
, t
C = 50pF
2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
60
12
8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
75
15
11
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
90
18
13
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
PLH PHL
L
4.5
9
-
C = 15pF
5
4
-
-
L
Propagation Delay Time
Switch Turn On Delay
t
, t
PZH PZL
C = 50pF
2
100
20
12
-
125
25
15
-
150
30
18
-
L
4.5
9
-
-
C = 15pF
5
8
-
L
Propagation Delay Time
Switch Turn Off Delay
t
, t
PHZ PLZ
C = 50pF
2
150
30
24
-
190
38
30
-
225
45
36
-
L
4.5
9
-
-
C = 15pF
L
5
12
-
Input (Control) Capacitance
C
-
-
-
10
-
10
-
10
-
I
Power Dissipation Capacitance
(Notes 4, 5)
C
5
25
PD
HCT TYPES
Propagation Delay Time
Switch In to Out
t
, t
C = 50pF
4.5
5
-
-
-
-
-
-
-
-
-
4
12
-
-
-
-
-
-
-
-
-
15
-
-
-
-
-
-
-
-
-
18
-
ns
ns
ns
ns
ns
ns
pF
pF
PLH PHL
L
C = 15pF
L
Propagation Delay Time
Switch Turn On Delay
t
, t
PZH PZL
C = 50pF
4.5
5
-
24
-
30
-
36
-
L
C = 15pF
9
L
Propagation Delay Time
Switch Turn Off Delay
t
, t
PHZ PLZ
C = 50pF
4.5
5
-
35
-
44
-
53
-
L
C = 15pF
L
14
-
Input (Control) Capacitance
C
-
-
-
10
-
10
-
10
-
I
Power Dissipation Capacitance
(Notes 4, 5)
C
5
38
PD
NOTES:
4. C
is used to determine the dynamic power consumption, per package.
PD
5. P = C
2
2
V
f + Σ (C + C ) V
f where f = input frequency, f = output frequency, C = output load capacitance, C = switch
D
PD CC
i
L
S
CC
o
i
o
L
S
capacitance, V
= supply voltage.
CC
o
Analog Channel Specifications T = 25 C
A
PARAMETER
TEST CONDITIONS
V
(V)
HC4066
CD74HCT4066
UNITS
CC
Switch Frequency Response Bandwidth at -3dB Figure 5, Notes 6, 7
Figure 2
4.5
200
200
MHz
Cross Talk Between Any Two Switches Figure 3 Figure 4, Notes 7, 8
4.5
4.5
-72
-72
dB
%
Total Harmonic Distortion
Figure 6, 1kHz,
= 4V
0.022
0.023
V
IS
P-P
Figure 6, 1kHz,
= 8V
9
0.008
N/A
%
V
IS
P-P
5
CD54HC4066, CD74HC4066, CD74HCT4066
o
Analog Channel Specifications T = 25 C (Continued)
A
PARAMETER
TEST CONDITIONS
V
(V)
HC4066
200
550
-72
CD74HCT4066
UNITS
mV
CC
Control to Switch Feedthrough Noise
Figure 7
4.5
130
N/A
-72
5
9
mV
Switch “OFF” Signal Feedthrough Figure 3
Figure 8, Notes 7, 8
4.5
-
dB
Switch Input Capacitance, C
NOTES:
5
pF
S
6. Adjust input level for 0dBm at output, f = 1MHz.
7. V is centered at V /2.
IS CC
8. Adjust input for 0dBm at V
.
IS
Typical Performance Curves
o
T
= 25 C, GND = 0V
A
50
40
30
20
0
V
= 4.5V, PIN 1 TO 2
CC
-1
-2
-3
-4
V
= 9V, PIN 1 TO 3
CC
C
= 10pF
L
V
= 4.5V
CC
10
0
R
= 50Ω
L
o
T
= 25 C
A
PIN 4 TO 3
0
1
2
3
4 4.5 5
6
7
8
9
10
4
5
6
7
8
10
10
10
FREQUENCY, f (Hz)
10
10
INPUT SIGNAL VOLTAGE, V (V)
IS
FIGURE 1. TYPICAL “ON” RESISTANCE vs INPUT SIGNAL
VOLTAGE
FIGURE 2. SWITCH FREQUENCY RESPONSE, V
= 4.5V
CC
0
C
= 10pF
L
V
= 4.5V
CC
R
= 50Ω
L
o
-20
T
= 25 C
A
PIN 4 TO 3
-40
-60
-80
-100
4
5
6
7
8
10
10
10
10
10
FREQUENCY, f (Hz)
FIGURE 3. SWITCH-OFF SIGNAL FEEDTHROUGH AND CROSSTALK vs FREQUENCY, V
= 4.5V
CC
6
CD54HC4066, CD74HC4066, CD74HCT4066
Analog Test Circuits
V
V
CC
IS
V
CC
0.1µF
R
SWITCH
ON
V
OS2
V
V
SWITCH
OFF
OS1
IS
R
R
C
R
C
V
/2
CC
dB
METER
V
/2
CC
V
/2
CC
f
= 1MHz SINEWAVE
IS
R = 50Ω
C = 10pF
FIGURE 4. CROSSTALK BETWEEN TWO SWITCHES TEST CIRCUIT
V
V
CC
CC
V
IS
SINE
10µF
V = V
0.1µF
WAVE
I
IH
V
OS
SWITCH
ON
SWITCH
ON
V
V
IS
IS
V
OS
10kΩ
50pF
50Ω
10pF
DISTORTION
METER
dB
METER
V
/2
V
/2
CC
CC
f
= 1kHz TO 10kHz
IS
FIGURE 5. FREQUENCY RESPONSE TEST CIRCUIT
FIGURE 6. TOTAL HARMONIC DISTORTION TEST CIRCUIT
f
≥ 1MHz SINEWAVE
IS
E
V
V
CC
CC
R = 50Ω
C = 10pF
V
= V
C
IL
V
P-P
V
OS
0.1µF
SWITCH
ALTERNATING
ON AND OFF
600Ω
V
OS
SWITCH
OFF
V
IS
V
OS
t , t ≤ 6ns
600Ω
r
f
R
R
C
V
/2
CC
50pF
f
= 1MHz
CONT
dB
METER
50% DUTY
CYCLE
SCOPE
V
/2
V
/2
V
/2
CC
CC
CC
FIGURE 7. CONTROL-TO-SWITCH FEEDTHROUGH NOISE
TEST CIRCUIT
FIGURE 8. SWITCH OFF SIGNAL FEEDTHROUGH
Test Circuits and Waveforms
t = 6ns
t = 6ns
t = 6ns
t = 6ns
r
f
r
f
V
3V
CC
90%
50%
10%
2.7V
1.3V
0.3V
INPUT
INPUT
GND
GND
t
t
t
t
THL
TLH
THL
TLH
90%
1.3V
90%
50%
10%
INVERTING
OUTPUT
INVERTING
OUTPUT
10%
t
t
PLH
PHL
t
t
PLH
PHL
FIGURE 9. HC TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
FIGURE 10. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
7
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
CDIP
CDIP
PDIP
Drawing
5962-8950701CA
CD54HC4066F3A
CD74HC4066E
ACTIVE
ACTIVE
ACTIVE
J
J
14
14
14
1
1
TBD
TBD
Call TI
Call TI
Level-NC-NC-NC
Level-NC-NC-NC
N
25
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
CD74HC4066EE4
CD74HC4066M
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PDIP
SOIC
N
D
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
25
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD74HC4066M96
CD74HC4066M96E4
CD74HC4066M96G4
CD74HC4066ME4
CD74HC4066MG4
CD74HC4066MT
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD74HC4066MTE4
CD74HC4066PW
SOIC
D
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
PDIP
PW
PW
PW
PW
PW
PW
N
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD74HC4066PWE4
CD74HC4066PWR
CD74HC4066PWRE4
CD74HC4066PWT
CD74HC4066PWTE4
CD74HCT4066E
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
CD74HCT4066EE4
CD74HCT4066M
PDIP
N
25
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SOIC
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD74HCT4066M96
CD74HCT4066M96E4
CD74HCT4066M96G4
CD74HCT4066ME4
CD74HCT4066MG4
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2005
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
no Sb/Br)
CD74HCT4066MT
ACTIVE
ACTIVE
SOIC
SOIC
D
D
14
14
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD74HCT4066MTE4
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Audio
Amplifiers
amplifier.ti.com
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
Digital Control
Military
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
Logic
interface.ti.com
logic.ti.com
Power Mgmt
Microcontrollers
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
Telephony
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2005, Texas Instruments Incorporated
相关型号：
©2020 ICPDF网 联系我们和版权申明