CD74AC238M96 [TI]

3-LINE TO 8-LINE DECODER/DEMULTIPLEXER; 3线至8线译码器/多路解复用器
CD74AC238M96
型号: CD74AC238M96
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
3线至8线译码器/多路解复用器

解码器 驱动器 解复用器 逻辑集成电路 光电二极管 输入元件
文件: 总11页 (文件大小:219K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CD74AC238  
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER  
SCHS331 – FEBRUARY 2003  
M PACKAGE  
(TOP VIEW)  
AC Types Feature 1.5-V to 5.5-V Operation  
and Balanced Noise Immunity at 30% of the  
Supply Voltage  
A
B
V
CC  
1
2
3
4
5
6
7
8
16  
Speed of Bipolar F, AS, and S, With  
Significantly Reduced Power Consumption  
15 Y0  
14  
13  
12  
11  
10  
9
C
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
Designed Specifically for High-Speed  
Memory Decoders and Data-Transmission  
Systems  
G2A  
G2B  
G1  
Incorporates Three Enable Inputs to  
Simplify Cascading and/or Data Reception  
Y7  
GND  
Balanced Propagation Delays  
±24-mA Output Drive Current  
– Fanout to 15 F Devices  
SCR-Latchup-Resistant CMOS Process and  
Circuit Design  
Exceeds 2-kV ESD Protection Per  
MIL-STD-883, Method 3015  
description/ordering information  
The CD74AC238 decoder/demultiplexer is designed for high-performance memory-decoding and data-routing  
applications that require very short propagation-delay times. In high-performance memory systems, this  
decoder can be used to minimize the effects of system decoding. When employed with high-speed memories  
utilizing a fast enable circuit, the delay times of this decoder and the enable time of the memory usually are less  
than the typical access time of the memory. This means that the effective system delay introduced by the  
decoder is negligible.  
The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two  
active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.  
A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one  
inverter. An enable input can be used as a data input for demultiplexing applications (see Application  
Information).  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
–55°C to 125°C  
SOIC – M  
Tape and reel CD74AC238M96  
AC238M  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CD74AC238  
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER  
SCHS331 FEBRUARY 2003  
FUNCTION TABLE  
ENABLE INPUTS  
SELECT INPUTS  
OUTPUTS  
G1  
G2A  
H
X
X
L
G2B  
C
X
X
X
L
B
X
X
X
L
A
X
X
X
L
Y0  
L
Y1  
L
Y2  
L
Y3  
L
Y4  
L
Y5  
L
Y6  
L
Y7  
L
X
X
L
X
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
L
L
L
L
H
H
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
H
L
L
L
L
L
L
H
H
H
H
L
L
L
H
L
L
L
L
L
L
H
L
L
L
L
L
H
L
L
L
L
H
H
L
L
L
L
L
H
L
L
L
H
L
L
L
L
L
L
H
logic diagram (positive logic)  
15  
Y0  
1
A
14  
13  
12  
11  
Y1  
Y2  
Y3  
Y4  
2
3
Select  
Inputs  
B
C
Data  
Outputs  
10  
9
Y5  
Y6  
Y7  
4
5
6
7
G2A  
G2B  
Enable  
Inputs  
G1  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CD74AC238  
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER  
SCHS331 FEBRUARY 2003  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 6 V  
CC  
I
Input clamp current, I (V < 0 V or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA  
IK  
I
CC  
Output clamp current, I  
(V < 0 V or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA  
OK  
O O CC  
Continuous output current, I (V > 0 V or V < V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA  
Continuous current through V  
Package thermal impedance, θ (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W  
Storage temperature range, T  
O
O
CC  
O
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA  
JA  
stg  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
recommended operating conditions (see Note 3)  
55°C to  
125°C  
40°C to  
85°C  
T
A
= 25°C  
UNIT  
MIN  
1.5  
MAX  
MIN  
1.5  
MAX  
MIN  
MAX  
V
V
Supply voltage  
5.5  
5.5  
1.5  
1.2  
5.5  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 1.5 V  
= 3 V  
1.2  
1.2  
High-level input voltage  
2.1  
2.1  
2.1  
V
V
IH  
= 5.5 V  
= 1.5 V  
= 3 V  
3.85  
3.85  
3.85  
0.3  
0.9  
0.3  
0.9  
0.3  
0.9  
V
IL  
Low-level input voltage  
= 5.5 V  
1.65  
1.65  
1.65  
V
V
Input voltage  
0
0
V
V
0
0
V
0
0
V
V
V
V
I
CC  
CC  
CC  
Output voltage  
V
CC  
O
CC  
CC  
I
High-level output current  
Low-level output current  
V
CC  
V
CC  
V
CC  
V
CC  
= 4.5 V to 5.5 V  
= 4.5 V to 5.5 V  
= 1.5 V to 3 V  
24  
24  
24  
24  
24  
24  
mA  
mA  
OH  
OL  
I
50  
50  
50  
t/v  
Input transition rise or fall rate  
ns/V  
= 3.6 V to 5.5 V  
20  
20  
20  
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CD74AC238  
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER  
SCHS331 FEBRUARY 2003  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
55°C to  
125°C  
40°C to  
85°C  
T
A
= 25°C  
PARAMETER  
TEST CONDITIONS  
V
CC  
UNIT  
MIN  
1.4  
MAX  
MIN  
1.4  
MAX  
MIN  
1.4  
MAX  
1.5 V  
3 V  
I
= 50 µA  
2.9  
2.9  
2.9  
OH  
4.5 V  
3 V  
4.4  
4.4  
4.4  
V
OH  
V = V or V  
I IH  
I
I
I
I
= 4 mA  
2.58  
3.94  
2.4  
2.48  
3.8  
V
IL  
OH  
OH  
OH  
OH  
= 24 mA  
= 50 mA  
= 75 mA  
4.5 V  
5.5 V  
5.5 V  
1.5 V  
3 V  
3.7  
3.85  
3.85  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
I
= 50 µA  
OL  
4.5 V  
3 V  
0.1  
0.1  
0.1  
V
OL  
V = V or V  
I
I
I
I
= 12 mA  
= 24 mA  
0.36  
0.36  
0.5  
0.44  
0.44  
V
I
IH  
IL  
OL  
OL  
OL  
OL  
4.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
0.5  
= 50 mA  
= 75 mA  
1.65  
1.65  
±1  
I
I
V = V  
or GND  
or GND,  
±0.1  
8
±1  
160  
10  
µA  
µA  
pF  
I
I
CC  
CC  
V = V  
I
O
= 0  
80  
CC  
I
C
10  
10  
i
Testoneoutputatatime, notexceeding1-secondduration. Measurementismadebyforcingindicatedcurrentandmeasuringvoltagetominimize  
power dissipation. Test verifies a minimum 50-transmission-line drive capability at 85°C and 75-transmission-line drive capability at 125°C.  
switching characteristics over recommended operating free-air temperature range,  
V
= 1.5 V, C = 50 pF (unless otherwise noted) (see Figure 1)  
CC  
L
55°C to  
125°C  
40°C to  
85°C  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
MAX  
MIN  
MAX  
t
t
t
t
t
t
187  
187  
208  
208  
149  
149  
170  
170  
189  
189  
135  
135  
PLH  
PHL  
PLH  
PHL  
PLH  
PHL  
A, B, C  
Any Y  
Any Y  
Any Y  
ns  
ns  
ns  
G1  
G2A, G2B  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CD74AC238  
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER  
SCHS331 FEBRUARY 2003  
switching characteristics over recommended operating free-air temperature range,  
V
= 3.3 V ± 0.3 V, C = 50 pF (unless otherwise noted) (see Figure 1)  
CC  
L
55°C to  
125°C  
40°C to  
85°C  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
5.3  
5.3  
5.8  
5.8  
4.2  
4.2  
MAX  
MIN  
5.4  
5.4  
6
MAX  
t
t
t
t
t
t
21  
21  
19.1  
19.1  
21.1  
21.1  
15.2  
15.2  
PLH  
PHL  
PLH  
PHL  
PLH  
PHL  
A, B, C  
Any Y  
Any Y  
Any Y  
ns  
ns  
ns  
23.2  
23.2  
16.7  
16.7  
G1  
6
4.3  
4.3  
G2A, G2B  
switching characteristics over recommended operating free-air temperature range,  
V
= 5 V ± 0.5 V, C = 50 pF (unless otherwise noted) (see Figure 1)  
CC  
L
55°C to  
125°C  
40°C to  
85°C  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
3.8  
3.8  
4.2  
4.2  
3
MAX  
MIN  
MAX  
13.6  
13.6  
15.1  
15.1  
10.7  
10.7  
t
t
t
t
t
t
15  
15  
3.9  
3.9  
4.3  
4.3  
3.1  
3.1  
PLH  
PHL  
PLH  
PHL  
PLH  
PHL  
A, B, C  
Any Y  
Any Y  
Any Y  
ns  
ns  
ns  
16.6  
16.6  
11.9  
11.9  
G1  
G2A, G2B  
3
operating characteristics, V  
= 5 V, T = 25°C  
CC  
A
PARAMETER  
TYP  
UNIT  
C
Power dissipation capacitance  
110  
pF  
pd  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CD74AC238  
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER  
SCHS331 FEBRUARY 2003  
PARAMETER MEASUREMENT INFORMATION  
2 × V  
TEST  
S1  
CC  
Open  
GND  
S1  
R1 = 500 Ω  
t
/t  
Open  
PLH PHL  
From Output  
Under Test  
t
/t  
2 × V  
CC  
GND  
PLZ PZL  
t
/t  
PHZ PZH  
C
= 50 pF  
L
R2 = 500 Ω  
(see Note A)  
t
w
V
CC  
When V  
= 1.5 V, R1 = R2 = 1 kΩ  
CC  
Input  
50% V  
50% V  
CC  
CC  
0 V  
LOAD CIRCUIT  
VOLTAGE WAVEFORMS  
PULSE DURATION  
V
CC  
Reference  
Input  
V
CC  
50% V  
CC  
CLR  
Input  
50% V  
CC  
0 V  
0 V  
t
t
h
su  
t
rec  
V
CC  
CC  
0 V  
Data  
Input  
90%  
90%  
V
CC  
50%  
10%  
50% V  
10%  
50% V  
CC  
CLK  
t
t
f
0 V  
r
VOLTAGE WAVEFORMS  
RECOVERY TIME  
VOLTAGE WAVEFORMS  
SETUP AND HOLD AND INPUT RISE AND FALL TIMES  
V
CC  
V
CC  
Input  
50% V  
50% V  
CC  
CC  
Output  
Control  
50% V  
50% V  
CC  
CC  
0 V  
0 V  
t
t
PLH  
PHL  
90%  
t
t
PLZ  
PZL  
V
OH  
In-Phase  
Output  
Output  
Waveform 1  
90%  
V  
CC  
50%  
10%  
50% V  
10%  
CC  
V
50% V  
20% V  
CC  
CC  
S1 at 2 × V  
(see Note B)  
OL  
CC  
V
OL  
t
t
f
r
t
t
PHL  
90%  
PLH  
t
t
PHZ  
PZH  
V
V
OH  
Output  
Waveform 2  
S1 at GND  
90%  
Out-of-Phase  
Output  
50% V  
10%  
50%  
10%  
V
OH  
CC  
80% V  
50% V  
CC  
OL  
CC  
t
f
t
0 V  
r
(see Note B)  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES  
VOLTAGE WAVEFORMS  
OUTPUT ENABLE AND DISABLE TIMES  
NOTES: A.  
C includes probe and test-fixture capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z = 50 , t = 3 ns, t = 3 ns.  
O
r
f
Phase relationships between waveforms are arbitrary.  
D. For clock inputs, f is measured with the input duty cycle at 50%.  
max  
E. The outputs are measured one at a time with one input transition per measurement.  
F.  
G.  
H.  
t
t
t
and t  
and t  
and t  
are the same as t  
.
pd  
PLH  
PZL  
PLZ  
PHL  
PZH  
PHZ  
are the same as t  
are the same as t  
.
en  
dis  
.
I. All parameters and waveforms are not applicable to all devices.  
Figure 1. Load Circuit and Voltage Waveforms  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CD74AC238  
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER  
SCHS331 FEBRUARY 2003  
APPLICATION INFORMATION  
CD74AC238  
BIN/OCT  
15  
14  
13  
12  
11  
10  
9
1
2
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
1
2
3
4
6
4
5
&
V
CC  
EN  
7
CD74AC238  
BIN/OCT  
15  
14  
13  
12  
11  
10  
9
1
2
0
1
2
3
4
5
6
7
8
A0  
A1  
A2  
1
2
9
10  
11  
12  
13  
14  
15  
3
4
6
4
5
&
A3  
A4  
EN  
7
CD74AC238  
BIN/OCT  
15  
14  
13  
12  
11  
10  
9
1
2
0
1
2
3
4
5
6
7
16  
17  
18  
19  
20  
21  
22  
23  
1
2
3
4
6
4
5
&
EN  
7
Figure 2. 24-Bit Decoding Scheme  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CD74AC238  
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER  
SCHS331 FEBRUARY 2003  
APPLICATION INFORMATION  
CD74AC238  
BIN/OCT  
15  
14  
13  
12  
11  
10  
9
1
2
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
A0  
A1  
A2  
1
2
3
4
6
4
5
&
V
CC  
A3  
EN  
A4  
7
CD74AC238  
BIN/OCT  
15  
14  
13  
12  
11  
10  
9
1
2
0
1
2
3
4
5
6
7
8
1
2
9
10  
11  
12  
13  
14  
15  
3
4
6
4
5
&
EN  
7
CD74AC238  
BIN/OCT  
15  
14  
13  
12  
11  
10  
9
1
2
0
1
2
3
4
5
6
7
16  
17  
18  
19  
20  
21  
22  
23  
1
2
3
4
6
4
5
&
EN  
7
CD74AC238  
BIN/OCT  
15  
14  
13  
12  
11  
10  
9
1
2
0
1
2
3
4
5
6
7
24  
25  
26  
27  
28  
29  
30  
31  
1
2
3
4
6
4
5
&
EN  
7
Figure 3. 32-Bit Decoding Scheme  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Mar-2005  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
CD74AC238M96  
ACTIVE  
SOIC  
D
16  
2500  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-260C-1 YEAR/  
Level-1-235C-UNLIM  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan  
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS  
&
no Sb/Br)  
-
please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
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