CD74AC02M96E4 [TI]

QUADRUPLE 2-INPUT POSITIVE-NOR GATES; 四路2输入正或非门
CD74AC02M96E4
型号: CD74AC02M96E4
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

QUADRUPLE 2-INPUT POSITIVE-NOR GATES
四路2输入正或非门

输入元件
文件: 总13页 (文件大小:480K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CD54AC02, CD74AC02  
QUADRUPLE 2-INPUT POSITIVE-NOR GATES  
SCHS304C – JANUARY 2001 – REVISED JUNE 2002  
CD54AC02 . . . F PACKAGE  
CD74AC02 . . . E OR M PACKAGE  
(TOP VIEW)  
AC Types Feature 1.5-V to 5.5-V Operation  
and Balanced Noise Immunity at 30% of the  
Supply Voltage  
Speed of Bipolar F, AS, and S, With  
Significantly Reduced Power Consumption  
1Y  
1A  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
4Y  
4B  
4A  
Balanced Propagation Delays  
1B  
2Y  
±24-mA Output Drive Current  
– Fanout to 15 F Devices  
2A  
10 3Y  
9
8
2B  
3B  
3A  
SCR-Latchup-Resistant CMOS Process and  
Circuit Design  
GND  
Exceeds 2-kV ESD Protection Per  
MIL-STD-883, Method 3015  
description  
The ’AC02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A  
or Y = A + B in positive logic.  
B
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP – E  
Tube  
Tube  
CD74AC02E  
CD74AC02E  
CD74AC02M  
CD74AC02M96  
CD54AC02F3A  
–55°C to 125°C  
SOIC – M  
AC02M  
Tape and reel  
Tube  
CDIP – F  
CD54AC02F3A  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB  
design guidelines are available at www.ti.com/sc/package.  
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
A
B
X
H
L
H
X
L
L
L
H
logic diagram (positive logic)  
2
8
1A  
3
1
3A  
9
10  
13  
1Y  
2Y  
3Y  
4Y  
1B  
3B  
5
11  
4A  
2A  
6
4
12  
2B  
4B  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2002, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CD54AC02, CD74AC02  
QUADRUPLE 2-INPUT POSITIVE-NOR GATES  
SCHS304C JANUARY 2001 REVISED JUNE 2002  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 6 V  
CC  
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA  
IK  
I
CC  
Output clamp current, I  
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA  
Continuous current through V  
Package thermal impedance, θ (see Note 2): E package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA  
JA  
M package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
recommended operating conditions (see Note 3)  
40°C TO  
85°C  
55°C TO  
125°C  
T
A
= 25°C  
UNIT  
MIN  
1.5  
MAX  
MIN  
1.5  
MAX  
MIN  
MAX  
V
V
Supply voltage  
5.5  
5.5  
1.5  
1.2  
5.5  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 1.5 V  
= 3 V  
1.2  
1.2  
High-level input voltage  
2.1  
2.1  
2.1  
V
V
IH  
= 5.5 V  
= 1.5 V  
= 3 V  
3.85  
3.85  
3.85  
0.3  
0.9  
0.3  
0.9  
0.3  
0.9  
V
IL  
Low-level input voltage  
= 5.5 V  
1.65  
1.65  
1.65  
V
V
Input voltage  
0
0
V
V
0
0
V
0
0
V
V
V
V
I
CC  
CC  
CC  
Output voltage  
V
CC  
O
CC  
CC  
I
High-level output current  
Low-level output current  
V
CC  
V
CC  
V
CC  
V
CC  
= 4.5 V to 5.5 V  
= 4.5 V to 5.5 V  
= 1.5 V to 3 V  
24  
24  
24  
24  
24  
24  
mA  
mA  
OH  
OL  
I
50  
50  
50  
t/v Input transition rise or fall rate  
ns/V  
= 3.6 V to 5.5 V  
20  
20  
20  
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CD54AC02, CD74AC02  
QUADRUPLE 2-INPUT POSITIVE-NOR GATES  
SCHS304C JANUARY 2001 REVISED JUNE 2002  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
40°C TO  
85°C  
55°C TO  
125°C  
T
A
= 25°C  
PARAMETER  
TEST CONDITIONS  
V
CC  
UNIT  
MIN  
1.4  
MAX  
MIN  
1.4  
MAX  
MIN  
1.4  
MAX  
1.5 V  
3 V  
I
= 50 µA  
2.9  
2.9  
2.9  
OH  
4.5 V  
3 V  
4.4  
4.4  
4.4  
V
OH  
V = V or V  
I IH  
I
I
I
I
= 4 mA  
2.58  
3.94  
2.48  
3.8  
2.4  
V
IL  
OH  
OH  
OH  
OH  
= 24 mA  
= 50 mA  
= 75 mA  
4.5 V  
5.5 V  
5.5 V  
1.5 V  
3 V  
3.7  
3.85  
3.85  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
I
= 50 µA  
OL  
4.5 V  
3 V  
0.1  
0.1  
0.1  
V
OL  
V = V or V  
I
I
I
I
= 12 mA  
= 24 mA  
0.36  
0.36  
0.44  
0.44  
0.5  
V
I
IH  
IL  
OL  
OL  
OL  
OL  
4.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
0.5  
= 50 mA  
= 75 mA  
1.65  
1.65  
±1  
I
I
V = V  
or GND  
or GND,  
±0.1  
4
±1  
80  
10  
µA  
µA  
pF  
I
I
CC  
CC  
V = V  
I
O
= 0  
40  
CC  
I
C
10  
10  
i
Testoneoutputatatime, notexceeding1-secondduration. Measurementismadebyforcingindicatedcurrentandmeasuringvoltagetominimize  
power dissipation. Test verifies a minimum 50-transmission-line drive capability at 85°C and 75-transmission-line drive capability at 125°C.  
switching characteristics over recommended operating free-air temperature range,  
= 1.5 V, C = 50 pF (unless otherwise noted) (see Figure 1)  
V
CC  
L
40°C TO  
85°C  
55°C TO  
125°C  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
MAX  
MIN  
MAX  
t
t
131  
131  
144  
144  
PLH  
A or B  
Y
ns  
PHL  
switching characteristics over recommended operating free-air temperature range,  
= 3.3 V ± 0.3 V, C = 50 pF (unless otherwise noted) (see Figure 1)  
V
CC  
L
40°C TO  
85°C  
55°C TO  
125°C  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
4.1  
MAX  
MIN MAX  
t
t
14.6  
14.6  
4
4
16.1  
16.1  
PLH  
A or B  
Y
ns  
4.1  
PHL  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CD54AC02, CD74AC02  
QUADRUPLE 2-INPUT POSITIVE-NOR GATES  
SCHS304C JANUARY 2001 REVISED JUNE 2002  
switching characteristics over recommended operating free-air temperature range,  
V
= 5 V ± 0.5 V, C = 50 pF (unless otherwise noted) (see Figure 1)  
CC  
L
40°C TO  
85°C  
55°C TO  
125°C  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
3
MAX  
MIN  
2.9  
MAX  
t
t
10.4  
10.4  
11.5  
11.5  
PLH  
A or B  
Y
ns  
3
2.9  
PHL  
operating characteristics, V  
= 5 V, T = 25°C  
CC  
A
PARAMETER  
TYP  
UNIT  
C
Power dissipation capacitance  
55  
pF  
pd  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CD54AC02, CD74AC02  
QUADRUPLE 2-INPUT POSITIVE-NOR GATES  
SCHS304C JANUARY 2001 REVISED JUNE 2002  
PARAMETER MEASUREMENT INFORMATION  
2 × V  
TEST  
S1  
CC  
Open  
GND  
S1  
R1 = 500 Ω  
t
/t  
Open  
PLH PHL  
From Output  
Under Test  
t
/t  
2 × V  
CC  
GND  
PLZ PZL  
t
/t  
PHZ PZH  
C
= 50 pF  
L
R2 = 500 Ω  
(see Note A)  
t
w
V
CC  
When V  
= 1.5 V, R1 = R2 = 1 kΩ  
CC  
Input  
50% V  
50% V  
CC  
CC  
0 V  
LOAD CIRCUIT  
VOLTAGE WAVEFORMS  
PULSE DURATION  
V
CC  
Reference  
Input  
V
CC  
50% V  
CC  
CLR  
Input  
50% V  
CC  
0 V  
0 V  
t
t
h
su  
t
rec  
V
CC  
CC  
0 V  
Data  
Input  
90%  
90%  
V
CC  
50%  
10%  
50% V  
10%  
50% V  
CC  
CLK  
t
t
f
0 V  
r
VOLTAGE WAVEFORMS  
RECOVERY TIME  
VOLTAGE WAVEFORMS  
SETUP AND HOLD AND INPUT RISE AND FALL TIMES  
V
CC  
V
CC  
Input  
50% V  
50% V  
CC  
CC  
Output  
Control  
50% V  
50% V  
CC  
CC  
0 V  
0 V  
t
t
PLH  
PHL  
90%  
t
t
PLZ  
PZL  
V
OH  
In-Phase  
Output  
Output  
Waveform 1  
90%  
V  
CC  
50%  
10%  
50% V  
10%  
CC  
V
50% V  
20% V  
CC  
CC  
S1 at 2 × V  
(see Note B)  
OL  
CC  
V
OL  
t
t
f
r
t
t
PHL  
90%  
PLH  
t
t
PHZ  
PZH  
V
V
OH  
Output  
Waveform 2  
S1 at GND  
90%  
Out-of-Phase  
Output  
50% V  
10%  
50%  
10%  
V
OH  
CC  
80% V  
50% V  
CC  
OL  
CC  
t
f
t
0 V  
r
(see Note B)  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES  
VOLTAGE WAVEFORMS  
OUTPUT ENABLE AND DISABLE TIMES  
NOTES: A.  
C includes probe and test-fixture capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z = 50 , t = 3 ns, t = 3 ns.  
O
r
f
Phase relationships between waveforms are arbitrary.  
D. For clock inputs, f is measured with the input duty cycle at 50%.  
max  
E. The outputs are measured one at a time with one input transition per measurement.  
F.  
G.  
H.  
t
t
t
and t  
and t  
and t  
are the same as t  
.
pd  
PLH  
PZL  
PLZ  
PHL  
PZH  
PHZ  
are the same as t  
are the same as t  
.
en  
dis  
.
Figure 1. Load Circuit and Voltage Waveforms  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
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Copyright © 2007, Texas Instruments Incorporated  
PACKAGE OPTION ADDENDUM  
www.ti.com  
9-Oct-2007  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
CDIP  
PDIP  
Drawing  
CD54AC02F3A  
CD74AC02E  
ACTIVE  
ACTIVE  
J
14  
14  
1
TBD  
A42 SNPB  
N / A for Pkg Type  
N
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
CD74AC02EE4  
CD74AC02M  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
PDIP  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
N
D
D
D
D
D
D
14  
14  
14  
14  
14  
14  
14  
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
CD74AC02M96  
CD74AC02M96E4  
CD74AC02M96G4  
CD74AC02ME4  
CD74AC02MG4  
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
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for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
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Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
4-Oct-2007  
TAPE AND REEL BOX INFORMATION  
Device  
Package Pins  
Site  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) (mm) Quadrant  
(mm)  
(mm)  
CD74AC02M96  
D
14  
SITE 41  
330  
16  
6.5  
9.0  
2.1  
8
16  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
4-Oct-2007  
Device  
Package  
Pins  
Site  
Length (mm) Width (mm) Height (mm)  
CD74AC02M96  
D
14  
SITE 41  
346.0  
346.0  
33.0  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,  
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Customers should obtain the latest relevant information before placing orders and should verify that such information is current and  
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s  
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Amplifiers  
Data Converters  
DSP  
Applications  
Audio  
amplifier.ti.com  
dataconverter.ti.com  
dsp.ti.com  
www.ti.com/audio  
Automotive  
Broadband  
Digital Control  
Military  
www.ti.com/automotive  
www.ti.com/broadband  
www.ti.com/digitalcontrol  
www.ti.com/military  
Interface  
interface.ti.com  
logic.ti.com  
Logic  
Power Mgmt  
Microcontrollers  
RFID  
power.ti.com  
Optical Networking  
Security  
www.ti.com/opticalnetwork  
www.ti.com/security  
www.ti.com/telephony  
www.ti.com/video  
microcontroller.ti.com  
www.ti-rfid.com  
www.ti.com/lpw  
Telephony  
Low Power  
Wireless  
Video & Imaging  
Wireless  
www.ti.com/wireless  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2007, Texas Instruments Incorporated  

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