C13 [TI]
Quad General Purpose, Low Voltage, Tiny Pack Comparators; 四路通用，低电压，微小的包比较
| 型号： | C13 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Quad General Purpose, Low Voltage, Tiny Pack Comparators |
| 文件： | 总22页 (文件大小：483K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LMV331,LMV339,LMV393
LMV331 Single / LMV393 Dual / LMV339 Quad General Purpose, Low Voltage,
Tiny Pack Comparators
Literature Number: SNOS018F
May 2007
LMV331 Single / LMV393 Dual / LMV339 Quad
General Purpose, Low Voltage, Tiny Pack Comparators
General Description
Features
The LMV393 and LMV339 are low voltage (2.7-5V) versions
of the dual and quad comparators, LM393/339, which are
specified at 5-30V. The LMV331 is the single version, which
is available in space saving 5-pin SC70 and 5-pin SOT23
packages. The 5-pin SC70 is approximately half the size of
the 5-pin SOT23.
(For 5V supply, typical unless otherwise noted)
Guaranteed 2.7V and 5V performance
Industrial temperature range
Low supply current
Input common mode voltage range includes ground
Low output saturation voltage
Propagation delay
■
−40°C to +85°C
60 µA/Channel
■
■
■
■
■
■
200 mV
200 ns
The LMV393 is available in 8-pin SOIC and MSOP. The
LMV339 is available in 14-pin SOIC and TSSOP.
Space saving 5-pin SC70 and 5-Pin SOT23 packages
The LMV331/393/339 is the most cost-effective solution
where space, low voltage, low power and price are the pri-
mary specification in circuit design for portable consumer
products. They offer specifications that meet or exceed the
familiar LM393/339 at a fraction of the supply current.
Applications
Mobile communications
■
■
■
■
Notebooks and PDA's
The chips are built with National's advanced Submicron Sili-
con-Gate BiCMOS process. The LMV331/393/339 have bipo-
lar input and output stages for improved noise performance.
Battery powered electronics
General purpose portable device
General purpose low voltage applications
■
Typical Applications
Squarewave Oscillator
10008017
Positive Peak Detector
10008008
10008024
© 2007 National Semiconductor Corporation
100080
www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Operating Ratings (Note 1)
Supply Voltage
2.7V to 5.0V
Temperature Range (Note 3)
LMV393. LMV339, LMV331
−40°C to +85°C
ESD Tolerance (Note 2)
Human Body Model
LMV331/393/339
Machine Model
LMV331/339/393
Differential Input Voltage
Voltage on any pin
(referred to V− pin)
Thermal Resistance (θJA
5-Pin SC70
5-Pin SOT23
8-Pin SOIC
8-Pin MSOP
)
478°C/W
265°C/W
190°C/W
235°C/W
145°C/W
155°C/W
800V
120V
±Supply Voltage
5.5V
14-Pin SOIC
14-Pin TSSOP
Soldering Information
Infrared or Convection (20 sec)
Storage Temp. Range
Junction Temperature (Note 3)
235°C
−65°C to +150°C
150°C
2.7V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 2.7V, V− = 0V. Boldface limits apply at the temperature
extremes.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 5)
(Note 4)
(Note 5)
VOS
Input Offset Voltage
1.7
5
7
mV
TCVOS
IB
Input Offset Voltage Average Drift
Input Bias Current
µV/°C
10
250
400
nA
nA
IOS
Input Offset Current
Input Voltage Range
5
50
150
VCM
−0.1
2.0
V
V
VSAT
IO
Saturation Voltage
Output Sink Current
Supply Current
120
mV
ISINK ≤ 1 mA
5
23
mA
VO ≤ 1.5V
LMV331
LMV393
IS
40
70
100
140
µA
µA
Both Comparators
LMV339
All four Comparators
140
200
µA
µA
Output Leakage Current
.003
1
2.7V AC Electrical Characteristics
TJ = 25°C, V+ = 2.7V, RL = 5.1 kΩ, V− = 0V.
Symbol
tPHL
tPLH
Parameter
Conditions
Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
Propagation Delay (High to Low)
Input Overdrive = 10 mV
Input Overdrive = 100 mV
Input Overdrive = 10 mV
Input Overdrive = 100 mV
1000
350
500
400
ns
ns
ns
ns
Propagation Delay (Low to High)
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2
5V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 5V, V− = 0V. Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
Typ
max
Units
(Note 5)
(Note 4)
(Note 5)
VOS
Input Offset Voltage
1.7
7
9
mV
µV/°C
nA
TCVOS
IB
Input Offset Voltage Average Drift
Input Bias Current
5
25
250
400
IOS
Input Offset Current
Input Voltage Range
2
50
150
nA
VCM
−0.1
4.2
V
V
AV
Voltage Gain
20
50
V/mV
Vsat
Saturation Voltage
200
400
700
ISINK ≤ 4 mA
mV
mA
IO
IS
Output Sink Current
Supply Current
84
60
10
VO ≤ 1.5V
LMV331
120
150
µA
µA
LMV393
Both Comparators
100
170
.003
200
250
LMV339
All four Comparators
300
350
µA
µA
Output Leakage Current
1
5V AC Electrical Characteristics
TJ = 25°C, V+ = 5V, RL = 5.1 kΩ, V− = 0V.
Symbol
tPHL
tPLH
Parameter
Conditions
Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
Propagation Delay (High to Low)
Input Overdrive = 10 mV
Input Overdrive = 100 mV
Input Overdrive = 10 mV
Input Overdrive = 100 mV
600
200
450
300
ns
ns
ns
ns
Propagation Delay (Low to High)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical characteristics.
Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)
Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 3: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PC board.
Note 4: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 5: All limits are guaranteed by testing or statistical analysis.
3
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Typical Performance Characteristics Unless otherwise specified, VS = +5V, single supply, TA = 25°C
Supply Current vs. Supply Voltage Output High (LMV331) Supply Current vs. Supply Voltage Output Low (LMV331)
10008034
10008033
Output Voltage vs. Output Current at 5V Supply
Output Voltage vs. Output Current at 2.7 Supply
10008037
10008038
Input Bias Current vs. Supply Voltage
Response Time vs. Input Overdrives Negative Transition
10008042
10008036
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4
Response Time for Input Overdrive Positive Transition
Response Time vs. Input Overdrives Negative Transition
10008043
10008041
Response Time for Input Overdrive Positive Transition
10008040
5
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Simplified Schematic
10008047
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6
COMPARATOR WITH HYSTERESIS
Application Circuits
The basic comparator configuration may oscillate or produce
a noisy output if the applied differential input voltage is near
the comparator's offset voltage. This usually happens when
the input signal is moving very slowly across the comparator's
switching threshold. This problem can be prevented by the
addition of hysteresis or positive feedback.
BASIC COMPARATOR
A basic comparator circuit is used for converting analog sig-
nals to a digital output. The LMV331/393/339 have an open-
collector output stage, which requires a pull-up resistor to a
positive supply voltage for the output to switch properly. When
the internal output transistor is off, the output voltage will be
pulled up to the external positive voltage.
INVERTING COMPARATOR WITH HYSTERESIS
The inverting comparator with hysteresis requires a three re-
sistor network that are referenced to the supply voltage VCC
of the comparator. When Vin at the inverting input is less than
Va, the voltage at the non-inverting node of the comparator
(Vin < Va), the output voltage is high (for simplicity assume
VO switches as high as VCC). The three network resistors can
be represented as R1//R3 in series with R2. The lower input
trip voltage Va1 is defined as
The output pull-up resistor should be chosen high enough so
as to avoid excessive power dissipation yet low enough to
supply enough drive to switch whatever load circuitry is used
on the comparator output. On the LMV331/393/339 the pull-
up resistor should range between 1k to 10kΩ.
The comparator compares the input voltage (VIN) at the non-
inverting pin to the reference voltage (VREF) at the inverting
pin. If VIN is less than VREF, the output voltage (VO) is at the
saturation voltage. On the other hand, if VIN is greater than
VREF, the output voltage (VO) is at VCC
.
When Vin is greater than Va (Vin > Va), the output voltage is
low very close to ground. In this case the three network re-
sistors can be presented as R2//R3 in series with R1. The
upper trip voltage Va2 is defined as
The total hysteresis provided by the network is defined as
10008026
ΔVa = Va1 - Va2
To assure that the comparator will always switch fully to VCC
and not be pulled down by the load the resistors values should
be chosen as follow:
RPULL-UP << RLOAD
and R1 > RPULL-UP
.
10008004
FIGURE 1. Basic Comparator
7
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10008025
FIGURE 2. Inverting Comparator with Hysteresis
NON-INVERTING COMPARATOR WITH HYSTERESIS
Non inverting comparator with hysteresis requires a two re-
sistor network, and a voltage reference (Vref) at the inverting
input. When Vin is low, the output is also low. For the output
to switch from low to high, Vin must rise up to Vin1 where
Vin1 is calculated by
When Vin is high, the output is also high, to make the com-
parator switch back to it's low state, Vin must equal Vref before
VA will again equal Vref. Vin can be calculated by:
10008022
FIGURE 3.
The hysteresis of this circuit is the difference between Vin1 and
Vin2
.
ΔVin = VCCR1/R2
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8
To analyze the circuit, assume that the output is initially high.
For this to be true, the voltage at the inverting input Vc has to
be less than the voltage at the non-inverting input Va. For Vc
to be low, the capacitor C1 has to be discharged and will
charge up through the negative feedback resistor R4. When
it has charged up to value equal to the voltage at the positive
input Va1, the comparator output will switch.
Va1 will be given by:
10008023
FIGURE 4.
SQUAREWAVE OSCILLATOR
If:
R1 = R2 = R3
Then:
Comparators are ideal for oscillator applications. This square
wave generator uses the minimum number of components.
The output frequency is set by the RC time constant of the
capacitor C1 and the resistor in the negative feedback R4. The
maximum frequency is limited only by the large signal prop-
agation delay of the comparator in addition to any capacitive
loading at the output, which would degrade the output slew
rate.
Va1 = 2VCC/3
When the output switches to ground, the value of Va is re-
duced by the hysteresis network to a value given by:
Va2 = VCC/3
Capacitor C1 must now discharge through R4 towards ground.
The output will return to its high state when the voltage across
the capacitor has discharged to a value equal to Va2.
For the circuit shown, the period for one cycle of oscillation
will be twice the time it takes for a single RC circuit to charge
up to one half of its final value. The time to charge the capac-
itor can be calculated from
Where Vmax is the max applied potential across the capacitor
= (2VCC/3)
and VC = Vmax/2 = VCC/3
One period will be given by:
1/freq = 2t
or calculating the exponential gives:
1/freq = 2(0.694) R4 C1
Resistors R3 and R4 must be at least two times larger than
R5 to insure that VO will go all the way up to VCC in the high
state. The frequency stability of this circuit should strictly be
a function of the external components.
10008008
FREE RUNNING MULTIVIBRATOR
A simple yet very stable oscillator that generates a clock for
slower digital systems can be obtained by using a resonator
as the feedback element. It is similar to the free running mul-
tivibrator, except that the positive feedback is obtained
through a quartz crystal. The circuit oscillates when the trans-
mission through the crystal is at a maximum, so the crystal in
its series-resonant mode.
The value of R1 and R2 are equal so that the comparator will
switch symmetrically about +VCC/2. The RC constant of R3
and C1 is set to be several times greater than the period of
the oscillating frequency, insuring a 50% duty cycle by main-
taining a DC voltage at the inverting input equal to the abso-
lute average of the output waveform.
10008024
FIGURE 5. Squarewave Oscillator
When specifying the crystal, be sure to order series resonant
with the desired temperature coefficient
9
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Solving these equations for t1 and t2
t1 =R4C1ln2
10008007
FIGURE 6. Crystal controlled Oscillator
t2 =R5C1ln2
These terms will have a slight error due to the fact that Vmax
is not exactly equal to 2/3 VCC but is actually reduced by the
diode drop to:
PULSE GENERATOR WITH VARIABLE DUTY CYCLE
The pulse generator with variable duty cycle is just a minor
modification of the basic square wave generator. Providing a
separate charge and discharge path for capacitor C1gener-
ates a variable duty cycle. One path, through R2 and D2 will
charge the capacitor and set the pulse width (t1). The other
path, R1 and D1 will discharge the capacitor and set the time
between pulses (t2).
By varying resistor R1, the time between pulses of the gen-
erator can be changed without changing the pulse width.
Similarly, by varying R2, the pulse width will be altered without
affecting the time between pulses. Both controls will change
the frequency of the generator. The pulse width and time be-
tween pulses can be found from:
POSITIVE PEAK DETECTOR
Positive peak detector is basically the comparator operated
as a unit gain follower with a large holding capacitor from the
output to ground. Additional transistor is added to the output
to provide a low impedance current source. When the output
of the comparator goes high, current is passed through the
transistor to charge up the capacitor. The only discharge path
will be the 1 MΩ resistor shunting C1 and any load that is
connected to the output. The decay time can be altered simply
by changing the 1 MΩ resistor. The output should be used
through a high impedance follower to a avoid loading the out-
put of the peak detector.
10008009
FIGURE 7. Pulse Generator
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10
10008006
FIGURE 11. Driving TTL
AND GATES
The comparator can be used as three input AND gate. The
operation of the gate is as follow:
10008017
The resistor divider at the inverting input establishes a refer-
ence voltage at that node. The non-inverting input is the sum
of the voltages at the inputs divided by the voltage dividers.
The output will go high only when all three inputs are high,
casing the voltage at the non-inverting input to go above that
at inverting input. The circuit values shown work for a "0"
equal to ground and a "1" equal to 5V.
FIGURE 8. Positive Peak Detector
NEGATIVE PEAK DETECTOR
For the negative detector, the output transistor of the com-
parator acts as a low impedance current sink. The only dis-
charge path will be the 1 MΩ resistor and any load impedance
used. Decay time is changed by varying the 1 MΩ resistor
The resistor values can be altered if different logic levels are
desired. If more inputs are required, diodes are recommend-
ed to improve the voltage margin when all but one of the
inputs are high.
10008018
FIGURE 9. Negative Peak Detector
DRIVING CMOS AND TTL
The comparator's output is capable of driving CMOS and TTL
Logic circuits.
10008011
FIGURE 12. AND Gate
OR GATES
A three input OR gate is achieved from the basic AND gate
simply by increasing the resistor value connected from the
inverting input to Vcc, thereby reducing the reference voltage.
A logic "1" at any of the inputs will produce a logic "1" at the
output.
10008005
FIGURE 10. Driving CMOS
11
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10008010
FIGURE 13. OR Gate
ORing THE OUTPUT
10008013
By the inherit nature of an open collector comparator, the out-
puts of several comparators can be tied together with a pull
up resistor to VCC. If one or more of the comparators outputs
goes low, the output VO will go low.
FIGURE 15. Large Fan-In AND Gate
10008012
FIGURE 14. ORing the Outputs
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12
Connection Diagrams
5-Pin SC70/SOT23
8-Pin SOIC/MSOP
14-Pin SOIC/TSSOP
10008001
10008002
10008003
Top View
Top View
Top View
Ordering Information
Package
Temperature Range
Packaging
Marking
Transport Media
NSC
Drawing
Industrial
−40°C to +85°C
LMV331M7
LMV331M7X
LMV331M5
LMV331M5X
LMV393M
C13
C13
1k Units Tape and Reel
3k Units Tape and Reel
1k Units Tape and Reel
3k Units Tape and Reel
Rails
5-Pin SC70
5-Pin SOT23
8-Pin SOIC
MAA05A
MF05A
M08A
C12
C12
LMV393M
LMV393M
V393
LMV393MX
LMV393MM
LMV393MMX
LMV339M
2.5k Units Tape and Reel
1k Units Tape and Reel
3.5k Units Tape and Reel
Rails
8-Pin MSOP
14-Pin SOIC
14-Pin TSSOP
MUA08A
M14A
V393
LMV339M
LMV339M
LMV339MT
LMV339MT
LMV339MX
LMV339MT
LMV339MTX
2.5k Units Tape and Reel
Rails
MTC14
2.5k Units Tape and Reel
13
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SC70-5 Tape and Reel Specification
10008044
SOT-23-5 Tape and Reel
Specification
TAPE FORMAT
Tape Section
Leader
# Cavities
0 (min)
75 (min)
3000
Cavity Status
Empty
Cover Tape Status
Sealed
(Start End)
Carrier
Empty
Sealed
Filled
Sealed
250
Filled
Sealed
Trailer
125 (min)
0 (min)
Empty
Sealed
(Hub End)
Empty
Sealed
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14
TAPE DIMENSIONS
10008045
8 mm
0.130
0.124
(3.15)
0.130
(3.3)
0.126
(3.2)
0.138 ±0.002
(3.5 ±0.05)
DIM F
0.055 ±0.004
(1.4 ±0.11)
DIM Ko
0.157
(4)
0.315 ±0.012
(8 ±0.3)
(3.3)
Tape Size
DIM A
DIM Ao
DIM B
DIM Bo
DIM P1
DIM W
15
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REEL DIMENSIONS
10008046
8 mm
7.00 0.059 0.512 0.795 2.165 0.331 + 0.059/−0.000 0.567
W1+ 0.078/−0.039
W1 + 2.00/−1.00
W3
330.00 1.50 13.00 20.20 55.00
8.40 + 1.50/−0.00
14.40
Tape Size
A
B
C
D
N
W1
W2
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16
Physical Dimensions inches (millimeters) unless otherwise noted
5-Pin SC70
NS Package Number MAA05A
5-Pin SOT23
NS Package Number MF05A
17
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8-Pin SOIC
NS Package Number M08A
8-Pin MSOP
NS Package Number MUA08A
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18
14-Pin SOIC
NS Package Number M14A
14-Pin TSSOP
NS Package Number MTC14
19
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