ADS1174IPAP [TI]

Contains all support circuitry needed for the ADS1174/ADS1274;
ADS1174IPAP
型号: ADS1174IPAP
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

Contains all support circuitry needed for the ADS1174/ADS1274

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User's Guide  
SBAU134AAugust 2008Revised May 2009  
ADS1174EVM, ADS1274EVM, ADS1174EVM-PDK, and  
ADS1274EVM-PDK  
Figure 1. ADS1274EVM (Left) and ADS1274EVM-PDK (Right)  
This user's guide describes the characteristics, operation, and use of the ADS1174EVM and  
ADS1274EVM, both by themselves and as part of the ADS1174EVM-PDK or ADS1274EVM-PDK. These  
evaluation modules (EVMs) are evaluation boards for the ADS1274, a 24-bit multi-channel, delta-sigma  
analog-to-digital converter (ADC), and the ADS1174, a 16-bit version of the ADS1274. The EVM allows  
evaluation of all aspects of the ADS1174 or ADS1274 devices. Complete circuit descriptions, schematic  
diagrams, and bills of material are included in this document.  
The following related documents are available through the Texas Instruments web site at www.ti.com.  
EVM-Compatible Device Data Sheets  
Device  
Literature Number  
SBAS367B  
Device  
OPA1632  
Literature Number  
SBOS286A  
ADS1274  
ADS1174  
REF5025  
REF3125  
OPA2350  
SBAS373A  
SN74LVC2G157  
TPS73018  
TPS65131  
PCA9535  
SCES207K  
SBOS410  
SBVS054H  
SBVS046C  
SBOS099C  
SLVS493B  
SCPS129H  
ADCPro is a trademark of Texas Instruments.  
Microsoft, Windows are registered trademarks of Microsoft Corporation.  
SPI is a trademark of Motorola.  
I2C is a trademark of NXP Semiconductors.  
NI-VISA is a trademark of National Instruments.  
All other trademarks are the property of their respective owners.  
SBAU134AAugust 2008Revised May 2009  
ADS1174EVM, ADS1274EVM, ADS1174EVM-PDK, and ADS1274EVM-PDK  
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Contents  
1
2
3
4
5
6
7
8
EVM Overview ............................................................................................................... 3  
Analog Interface.............................................................................................................. 4  
Digital Interface .............................................................................................................. 4  
Power Supplies .............................................................................................................. 6  
Voltage Reference........................................................................................................... 7  
Power-Down, Mode and Format Control ................................................................................. 8  
Clock Source ................................................................................................................. 8  
EVM Operation............................................................................................................... 9  
ADS1274EVM-PDK Kit Operation ....................................................................................... 12  
Evaluating Performance with the ADCPro Software................................................................... 24  
Schematics and Layout.................................................................................................... 28  
9
10  
11  
List of Figures  
1
2
3
4
5
6
7
8
ADS1274EVM (Left) and ADS1274EVM-PDK (Right).................................................................. 1  
Connector J2 ................................................................................................................. 5  
Connectors J15, J16 ........................................................................................................ 7  
Connector J1 ................................................................................................................. 7  
Switch S1 ..................................................................................................................... 7  
Jumper J19 ................................................................................................................... 9  
Amplifier Selection Switches ............................................................................................... 9  
ADS1274EVM Default Jumper Locations............................................................................... 11  
MMB0 Initial Setup ........................................................................................................ 13  
Connecting ADS1274EVM to MMB0 ................................................................................... 14  
Connecting an AC Adapter ............................................................................................... 15  
Laboratory Power-Supply Connection................................................................................... 16  
NI-VISA Driver Installation ................................................................................................ 17  
NI-VISA Driver Installation Question .................................................................................... 18  
NI-VISA Driver Installing .................................................................................................. 18  
NI-VISA Driver Complete Installation ................................................................................... 19  
NI-VISA Driver Verification Using Device Manager ................................................................... 19  
ADCPro Software Start-up Display Window ............................................................................ 20  
ADS1274EVM-PDK Plug-In Display Window........................................................................... 21  
Install New Driver Wizard Screen 1...................................................................................... 22  
Install New Driver Wizard Screen 2...................................................................................... 22  
Install New Driver Wizard Screen 3...................................................................................... 23  
Install New Driver Wizard Screen 4...................................................................................... 23  
Install New Driver Wizard Screen 5...................................................................................... 24  
USBSytx Driver Verification Using Device Manager .................................................................. 24  
Channel Enable............................................................................................................. 25  
Manual Channel Control................................................................................................... 25  
Clock Settings and Mode.................................................................................................. 26  
Operating Mode ............................................................................................................ 26  
Output Data Format........................................................................................................ 27  
Progress Bar While Collecting Data ..................................................................................... 27  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
List of Tables  
1
2
3
4
5
6
7
J9/J7:Analog Interface Pinout.............................................................................................. 4  
J5: Serial Interface Pins..................................................................................................... 4  
J3 Configuration: Power-Supply Input .................................................................................... 6  
J15 +10V Selection.......................................................................................................... 6  
J16 –10V Selection.......................................................................................................... 6  
List of Switches............................................................................................................. 11  
Operating Modes: Clock Frequency ..................................................................................... 26  
2
ADS1174EVM, ADS1274EVM, ADS1174EVM-PDK, and ADS1274EVM-PDK  
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EVM Overview  
ADS1174EVM/ADS1274EVM Bill of Materials ......................................................................... 28  
1
EVM Overview  
1.1 Features  
ADS1174EVM/ADS1274EVM Features:  
Contains all support circuitry needed for the ADS1174/ADS1274  
+10V and –10V generated from the +5V supply or supplied externally  
Voltage reference options: external or onboard  
Clock options: External clock source or 27MHz onboard crystal oscillator  
GPIO access  
Compatible with the TI Modular EVM System  
ADS1174EVM-PDK/ADS1274EVM-PDK Features:  
®
®
Easy-to-use evaluation software for Microsoft Windows XP  
Data collection to text files  
Built-in analysis tools including scope, FFT, and histogram displays  
Complete control of board settings  
Easily expandable with new analysis plug-in tools from Texas Instruments  
For use with a computer, the ADS1174EVM-PDK or ADS1274EVM-PDK is available. This kit combines  
the ADS1174EVM/ADS1274EVM board with the DSP-based MMB0 motherboard, and includes ADCPro™  
software for evaluation.  
The MMB0 motherboard allows the ADS1174EVM/ADS1274EVM to be connected to the computer via an  
available USB port. This manual shows how to use the MMB0 as part of the  
ADS1174EVM-PDK/ADS1274EVM-PDK, but does not provide technical details about the MMB0 itself.  
ADCPro™ is a program for collecting, recording, and analyzing data from ADC evaluation boards. It is  
based on a number of plug-in programs, so it can be expanded easily with new test and data collection  
plug-ins. The ADS1174EVM-PDK/ADS1274EVM-PDK is controlled by a plug-in running in ADCPro. For  
more information about ADCPro, see the ADCProAnalog-to-Digital Converter Evaluation Software  
User's Guide (literature number SBAU128), available for download from the TI web site.  
This manual covers the operation of both the ADS1174EVM/ADS1274EVM and the  
ADS1174EVM-PDK/ADS1274EVM-PDK. Throughout this document, the abbreviation EVM and the term  
evaluation module are synonymous with the ADS1174EVM and the ADS1274EVM. For clarity of reading,  
the remainder of this manual will refer only to the ADS1274EVM or ADS1274EVM-PDK, but operation of  
the EVM and kit for the ADS1174 is identical, unless otherwise noted.  
1.2 Introduction  
The ADS1274EVM is an evaluation module built to the TI Modular EVM System specification. It can be  
connected to any modular EVM system interface card.  
The ADS1274EVM is available as a stand-alone printed circuit board (PCB) or as part of the  
ADS1274EVM-PDK, which includes an MMB0 motherboard and related software. As a stand-alone PCB,  
the ADS1274EVM is useful for prototyping designs and firmware.  
Note that the ADS1274EVM has no microprocessor and cannot run software. To connect it to a computer,  
some type of interface is required.  
SBAU134AAugust 2008Revised May 2009  
ADS1174EVM, ADS1274EVM, ADS1174EVM-PDK, and ADS1274EVM-PDK  
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Analog Interface  
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2
Analog Interface  
For maximum flexibility, the ADS1274EVM is designed for easy interfacing to multiple analog sources.  
Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin,  
dual-row, header/socket combination at J9. This header/socket provides access to the analog input pins of  
the ADS1274. Consult Samtec at http://www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating  
connector options. These signals can also be connected to the terminal block J7.  
Most of the pins on J7 and J9 are directly connected, with no filtering or protection. Use appropriate  
caution when handling these pins. Table 1 summarizes the pinouts for analog interfaces J9 and J7.  
Table 1. J9/J7:Analog Interface Pinout  
Pin Number  
J9.1, J7-2  
J9.2, J7-3  
J9.3, J7-4  
J9.4, J7-5  
J9.5, J7-6  
J9.6, J7-7  
J9.7, J7-8  
J9.8, J7-9  
J9.18  
Signal  
A1N  
Description  
AINN1, ADS1274  
AINP1, ADS1274  
AINN2, ADS1274  
AINP2, ADS1274  
AINN3, ADS1274  
AINP3, ADS1274  
AINN4, ADS1274  
AINP4, ADS1274  
A1P  
A2N  
A2P  
A3N  
A3P  
A4N  
A4P  
EXTREFN  
External Reference source input  
(– side of differential input)  
J9.20  
EXTREFP  
External Reference source input  
(+ side of differential input)  
J9.10-16 (even)  
J9.15  
Unused  
Unused  
AGND  
J9.9-19 (odd), J7-1  
Analog ground connections (except J1.15)  
3
Digital Interface  
3.1 Serial Data Interface  
The ADS1274EVM is designed to easily interface with multiple control platforms. Samtec part numbers  
SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin, dual-row, header/socket  
combination at J5. This header/socket provides access to the digital control and serial data pins of the  
ADC. Consult Samtec at http://www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating  
connector options.  
All logic levels on J5 are 3.3V CMOS, except for the I2C™ pins. These pins conform to 3.3V I2C rules.  
Table 2 describes the J5 serial interface pins.  
Table 2. J5: Serial Interface Pins  
Pin No.  
J5.1  
Pin Name  
CNTL  
Signal Name  
SYNC  
I/O Type  
Pullup  
High  
Function  
In  
In  
In  
J5.2  
GPIO0  
CLKX  
MODE0  
SCLK  
High  
J5.3  
None  
ADS1274 SPI™  
clock  
J5.4  
J5.5  
J5.6  
J5.7  
J5.8  
DGND  
CLKR  
GPIO1  
FSX  
DGND  
In/Out  
Out  
In  
None  
None  
High  
Low  
Digital Ground  
SCLK clock  
CLKR  
MODE1  
/DRDY/FSYNC  
FORMAT0  
In/Out  
In  
GPIO2  
High  
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Digital Interface  
Table 2. J5: Serial Interface Pins (continued)  
Pin No.  
Pin Name  
FSR  
Signal Name  
/DRDY/FSYNC  
DGND  
I/O Type  
In/Out  
In/Out  
In  
Pullup  
None  
None  
None  
Function  
J5.9  
J5.10  
J5.11  
DGND  
DX  
Digital Ground  
DIN  
ADS1274 SPI data  
in  
J5.12  
J5.13  
J5.14  
J5.15  
J5.16  
J5.17  
GPIO3  
DR  
FORMAT1  
DOUT1  
In  
High  
None  
None  
None  
n/a  
Out  
In  
ADS1274 data out  
GPIO4  
/INT  
FORMAT2  
/DRDY/FSYNC  
SCL  
Out  
I2C  
In  
SCL  
I2C clock  
TOUT  
CLK  
None  
Can be used to  
provide a clock from  
a processor  
J5.18  
J5.19  
J5.20  
DGND  
GPIO5  
SDA  
DGND  
In/Out  
I2C  
None  
None  
n/a  
Digital Ground  
CLK Select  
SDA  
I2C data  
Many pins on J5 have weak pull-up/pull-down resistors. These resistors provide default settings for many  
of the control pins. Many pins on J5 correspond directly to ADS1274 pins. See the ADS1274 product data  
sheet for complete details on these pins.  
3.2 Data Output  
Most data communications are directed through DOUT1. The data from all eight channels can be  
observed on the DOUT1 pin using the TDM mode. That is the signal used by the ADS1274EVM-PDK to  
read back and display all the channels. All the data output signals (DOUT1 to DOUT4) can be monitored  
on J2. Figure 2 illustrates the pinout for J2.  
Figure 2. Connector J2  
SBAU134AAugust 2008Revised May 2009  
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Power Supplies  
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4
Power Supplies  
J3 is the power-supply input connector. Table 3 lists the configuration details for J3. Analog inputs to the  
ADC can be applied directly to the device (see Section 8.1, Analog Input), bypassing the onboard  
amplifiers, and in this case only +5V and +3.3V are required to power the EVM. If the amplifiers are used,  
an additional bipolar supply is needed to power them. The EVM includes a switching power supply to  
generate a +10V and –10V supply. For optimum noise performance, the external supplies (+VA and –VA)  
should be used.  
Table 3. J3 Configuration: Power-Supply Input  
Pin No.  
Pin Name  
Function  
Required  
J3.1  
+VA  
+10V to +15V  
Yes, unless onboard +10V is  
used.  
J3.2  
–VA  
–10V to –15V  
Yes, unless onboard –10V is  
used.  
J3.3  
J3.4  
J3.5  
J3.6  
J3.7  
J3.8  
J3.9  
J3.10  
+5VA  
+5V analog supply  
–5V analog supply  
Digital ground input  
Analog ground input  
1.8V digital supply  
3.3V digital supply  
Not used  
Always  
–5VA  
No  
DGND  
AGND  
+1.8VD  
+3.3VD  
VD1  
Yes  
Yes  
No  
Always  
No  
+5VD  
+5V  
Used to generate +10V/–10V  
The 1.8V for DVDD comes from the voltage regulator U16 using 3.3V as the source voltage input.  
All of the power supplies AVDD (+5V), DVDD (1.8V), and IOVDD (3.3V) have corresponding jumpers J10,  
J11(AVDD), J13(DVDD) and J14(IOVDD) that can be replaced with a current meter to measure the  
respective supply currents.  
4.1 Bipolar Power Options  
J15 and J16 require a jumper to select the voltage used by the onboard amplifiers. The external voltages  
can range from 10V to 15V. The onboard voltage is always 10V. Table 4 and Table 5 list the options for  
J15 and J16, respectively. Figure 3 shows the pinout for connectors J15 and J16.  
Table 4. J15 +10V Selection  
Jumper  
Name  
Function  
1-2 (OB)  
+10V  
Select the +10V that is generated on the  
EVM  
2-3 (EXT)  
+VA  
Select the external +VA voltage  
Table 5. J16 –10V Selection  
Jumper  
Name  
Function  
1-2  
–10V  
Select the –10V that is generated on the  
EVM  
2-3  
–VA  
Select the external –VA voltage  
6
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Voltage Reference  
Figure 3. Connectors J15, J16  
5
Voltage Reference  
The ADS1274EVM has three sources for the reference voltage. Jumper J1 can select the voltage from  
either the REF3125(U1) or REF5025(U2). The reference from either source is filtered and buffered by  
U3A. Switch S1 chooses either the onboard reference or the external reference voltage that is connected  
to the reference pins of J9. Figure 4 illustrates the pinout for connector J1. Figure 5 shows switch S1 as it  
appears on the EVM.  
Figure 4. Connector J1  
Figure 5. Switch S1  
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Power-Down, Mode and Format Control  
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Power-Down, Mode and Format Control  
The ADS1274 has several pins to control power-down of individual channels, and mode and format for the  
digital interface. These pins are controlled on the EVM either through software or hardware (using  
switches S10 and S11).  
For users of the ADS1274EVM as a stand-alone module, these pins may be pulled high or low through  
DIP switches S10 and S11. Refer to the ADS1274 product data sheet for complete details on these pins  
and which state sets which options.  
For use in the ADS1274EVM-PDK, the state of these pins is controlled by software, using the I2C port  
expander on the EVM. When used in the ADS1274EVM-PDK, DIP switches S10 and S11 must all be  
switched so that they are down, toward the center of the board. The ADS1274EVM-PDK software will  
check at startup to verify that these switches are set correctly, and will generate an error message if they  
are not. However, it cannot detect if the switches are changed after startup.  
CAUTION  
When using the EVM as part of the ADS1274EVM-PDK, DIP switches S10 and  
S11 must all be switched so that they are down, toward the center of the board.  
Failure to do so may damage the EVM.  
7
Clock Source  
The ADS1274 clock can come from one of several sources: the onboard 27MHz crystal oscillator, a clock  
supplied by a processor on the TOUT pin (J5.17), or an external clock source connected to J18.1 (ground)  
and J18.2 (signal).  
If the onboard 27MHz oscillator is selected, the device can be run in the high-speed mode, the  
high-resolution mode, the low-power mode, or low-speed mode with CLKDIV set to 1. If the performance  
of the device must be explored with CLKDIV set to 0 in the low-power and low-speed modes, an external  
clock must be provided to the board, either using the TOUT connection or having an external clock source  
connected to J18. The same is true if frequencies other than the 27MHz provided by the onboard oscillator  
must be investigated.  
7.1 Usage in PDK  
If using the ADS1274EVM as part of the ADS1274EVM-PDK, J19 should not have any pins shorted.  
Remove any shorting blocks on jumper J19. The ADS1274EVM-PDK software will allow selection of the  
clock source under software control (this option is accomplished by using port 05 of the I2C expander  
U17). The software allows selection of the onboard 27MHz oscillator, or a clock provided by a PLL on the  
MMB0 which directly drives the appropriate CLK pins of the interface, or an external, customer supplied  
clock. If an external clock is selected with the software, this clock must be provided on J18. Note that if the  
external clock is selected and no clock is provided, the software may hang waiting for data from the  
converter.  
7.2 Usage as a Stand-Alone EVM  
If using the EVM in your own system and not with the PDK hardware and software, observe the following  
recommendations:  
J17 should be removed if the external clock source is used and the TOUT pin is still driven by a  
processor in order to avoid conflicts.  
Jumper J19 can be used to always select the 27MHz crystal (IOVDD position) or allow the  
onboard/external clock selection to be controlled by GPIO5 (J5.19) as shown in Figure 6.  
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EVM Operation  
Figure 6. Jumper J19  
8
EVM Operation  
The following section provides information on the analog input, digital control, and general operating  
conditions of the ADS1274EVM.  
8.1 Analog Input  
The analog input sources (channels 1-4) can be applied directly to J9 (top or bottom side) or through  
signal-conditioning modules available for the the modular EVM system. Terminal block J7 is connected in  
parallel with the analog signal connections to J9.  
Each input signal can be selected to connect directly to the analog inputs of the ADS1274 or they can use  
the OPA1632 buffers that are provided. Switches S2-5 can be switched away from the ADS1274 to select  
the Terminal Block (TBK) or towards the ADS1274 to select the Amplifier (AMP) for the analog inputs 1  
through 4 as shown in Figure 7.  
Figure 7. Amplifier Selection Switches  
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8.2 Digital Control  
The digital control signals can be applied directly to J5 (top or bottom side). The modular ADS1274EVM  
can also be connected directly to a DSP or microcontroller interface board, such as the 5-6KINTERFACE  
or HPA-MCUINTERFACE boards available from Texas Instruments, or the MMB0 if purchased as part of  
the ADS1274EVM-PDK. For a list of compatible interface and/or accessory boards for the EVM or the  
ADS1274, see the relevant product folder on the TI web site. Some of the digital signals are controlled  
directly with pins on J5. Other signals such as the Power Down controls can only be controlled with slide  
switches or by U17 and U18 that are set up and read using the I2C signals on pins 16 and 18 of J5. The  
Format and Mode pins can be controlled by all three methods (slide switches, GPIO pins on J5, and the  
I2C control from U17).  
The ADS1274 allows the serial interface to be used in two different formats: an SPI-compatible mode and  
a frame-sync format. Switch S12 can be used to switch between these two formats. The left position,  
marked SPI, selects the SPI format. In this format, the signals are connected in this configuration:  
The SCLK input of the converter is driven by the serial port signal CLKX, pin J5.3.  
The signal from the selected source for the clock (see Section 7, Clock Source) is connected to the  
CLKR pin (J5.5) allowing the serial port of a processor to be synchronized to the converter master  
clock.  
The signal from the selected clock source is routed to the CLK input of the converter.  
Port P10 of the I2C port expander U18 is connected to a logic high level, so that the position of switch  
S12 can be read back by software.  
The right position of S12, marked FS, selects the frame-sync format. In this format, the signals are  
connected in this configuration:  
The SCLK input of the converter is driven by the serial port signal CLKR, pin J5.5.  
The signal from the selected clock source is connected to the CLKX pin (J5.3), allowing the serial port  
of a processor to be synchronized to the converter master clock.  
The CLK input of the converter is driven by the CLKR signal (J5.5). This connection ensures that the  
CLK and SCLK signals have the same phase and the correct ratio as outlined in the data sheet of the  
device.  
Port P10 of the I2C port expander U18 is connected to a logic low level, so that the position of switch  
S12 can be read back by software.  
For use in the ADS1274EVM-PDK, S12 must be in the right (FS) position, which is the default factory  
setting.  
Switching to SPI format will allow the EVM to connect to any SPI-compatible processor that does not  
support the frame-sync mode. If this format is selected, keep in mind that the high-speed mode will not  
work at full speed (32.768MHz) because of the limitations outlined in the device product data sheet.  
8.3 ADS1274EVM-PDK Power Supply  
The ADS1274EVM can either be powered by an AC adapter or by applying the 5V, +10V and –10V to the  
connectors on the MMB0 board. The MMB0 board will provide the 5V and 3.3V to the ADS1274EVM  
along with the +10V and –10V signals. Because the circuitry is provided on the ADS1274EVM to generate  
+10V and –10V, the complete system can be powered from the supplied AC adapter that supplies +6V  
and 3A.  
10  
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EVM Operation  
8.4 Default Jumper Settings and Switch Positions  
Figure 8 shows the jumpers found on the EVM and the respective factory default conditions for each.  
Figure 8. ADS1274EVM Default Jumper Locations  
Table 6 lists the switches found on the EVM and the respective factory default conditions for each.  
Table 6. List of Switches  
Switch  
S1  
Default Position  
Switch Description  
Left  
Left  
Onboard Reference  
S2–S4  
AIN2–4 Terminal Block (amplifiers  
bypassed)  
S5  
Down  
Right  
AIN1 Terminal Block (amplifiers bypassed)  
Frame-sync format  
S12  
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9
ADS1274EVM-PDK Kit Operation  
This section provides information on using the ADS1274EVM-PDK, including setup, program installation,  
and program usage.  
To prepare to evaluate the ADS1274 with the ADS1274EVM-PDK, complete the following steps:  
Step 1. Install the ADCPro software (if not already installed) on a PC.  
Step 2. Install the ADS1274EVM-PDK EVM plug-in software.  
Step 3. Set up the ADS1274EVM-PDK.  
Step 4. Connect a proper power supply or use the included AC adapter.  
Step 5. Complete the NI-VISA™ USB driver installation process.  
Step 6. Run the ADCPro software.  
Step 7. Complete the Microsoft Windows USB driver installation process.  
Each task is described in the subsequent sections of this document.  
9.1 Installing the ADCPro Software  
CAUTION  
Do not connect the ADS1274EVM-PDK before installing the software on a  
suitable PC. Failure to observe this caution may cause Microsoft Windows to  
not recognize the ADS1274EVM-PDK.  
The latest software is available from the TI website at www.ti.com/. The CD-ROM shipped with the  
ADS1274EVM may not contain the latest software, but the ADCPro installer will check for updates when  
executed (if connected to the Internet), and then give you the option of downloading and installing the  
latest version. Refer to the ADCPro User Guide for instructions on installing and using ADCPro.  
To install the ADS1274EVM-PDK plug-in, run the file: ads1274evm-pdk-plugin-1.0.0.exe (1.0.0 is the  
version number, and increments with software version releases: you may have a different version on your  
CD). Double-click the file to run it; then follow the instructions shown. You can also utilize the ADCPro  
Update Check feature to check for newer versions of the ADS1274EVM-PDK plug-in, once you have  
installed one version of it.  
The software should now be installed, but the USB drivers may not yet have been loaded by the PC  
operating system. This step will complete when the ADCPro software is executed; see Section 9.4,  
Running the Software and Completing Driver Installation.  
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9.2 Setting Up the ADS1274EVM-PDK  
The ADS1274EVM-PDK contains both the ADS1274EVM and the MMB0 motherboard; however, the  
devices are shipped unconnected. Follow these steps to set up the ADS1274EVM-PDK.  
Step 1. Unpack the ADS1274EVM-PDK kit.  
Step 2. Set the jumpers and switches on the MMB0 as shown in Figure 9.  
Set the Boot Mode switch to USB.  
Connect +5V and +5VA on jumper block J13 (if +5V is supplied from J14 +5VA).  
Leave +5V and +VA disconnected on jumper block J13.  
If the PDK will be powered from an AC adapter, connect J12. If the PDK will be powered  
through the terminal block, disconnect J12. (See Section 9.3 for details on connecting the  
power supply.)  
Figure 9. MMB0 Initial Setup  
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space  
Step 3. Plug the ADS1274EVM into the MMB0 as Figure 10 illustrates.  
Figure 10. Connecting ADS1274EVM to MMB0  
CAUTION  
Do not misalign the pins when plugging the ADS1274EVM into the MMB0.  
Check the pin alignment carefully before applying power to the PDK.  
Step 4. Set the jumpers and switches on the ADS1274EVM as shown in Figure 7 (note that these  
settings are the factory-configured settings for the EVM). Note that the default configuration  
for the EVM is to use external ±10V supplies for the input amplifiers.  
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ADS1274EVM-PDK Kit Operation  
9.2.1  
About the MMB0  
The MMB0 is a Modular EVM System motherboard. It is designed around the TMS320VC5507 , a DSP  
with an onboard USB interface from Texas Instruments. The MMB0 also has 16MB of SDRAM installed.  
The MMB0 is not sold as a DSP development board, and it is not available separately. TI cannot offer  
support for the MMB0 except as part of an EVM kit. For schematics or other information about the MMB0,  
contact Texas Instruments.  
9.3 Connecting the Power Supply  
The ADS1274EVM-PDK can be operated with a unipolar +5V supply or a combination of +5V and bipolar  
±(10V to 15V) supply.  
When the MMB0 DSP is powered properly, LED D2 glows green. The green light indicates that the 3.3V  
supply for the MMB0 is operating properly. (It does not indicate that the EVM power supplies are  
operating properly.)  
9.3.1  
Connecting an AC Adapter  
An AC adapter can be connected to barrel jack J2 on the MMB0. J2 is located next to the USB connector.  
The adapter must output 6V to 7V dc. The connector must be sleeve-negative, tip-positive. It should have  
a current rating of at least 2A.  
Jumper J12 on the MMB0 connects a wall-mounted power supply to the board. To use the wall-mount  
supply, J12 must be shorted. Figure 11 illustrates how to connect an AC adapter to the MMB0.  
Figure 11. Connecting an AC Adapter  
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9.3.2  
Connecting a Laboratory Power Supply  
A laboratory power supply can be connected through terminal block J14 on the MMB0, as shown in  
Figure 12. Both unipolar and bipolar configurations are supported.  
To use a unipolar lab power supply configuration:  
Disconnect J12 on the MMB0.  
Connect a +5V dc supply to the +5VD terminal on J14.  
Connect ground of the dc supply to the GND terminal on J14.  
For bipolar mode, also connect a –10V dc supply to the –VA, and +10V on the +VA terminals on J14.  
It is not necessary to connect a +5V dc supply voltage to the +5VA terminal on J14 if the +5V/+5VA  
position on J13 is shorted.  
Figure 12. Laboratory Power-Supply Connection  
9.4 Running the Software and Completing Driver Installation  
Note: The software is continually under development. These instructions and screen images are  
current at the time of this writing, but may not exactly match future releases.  
The program for evaluating the ADS1274EVM-PDK is called ADCPro. This program uses plug-ins to  
communicate with the EVM. The ADS1274EVM-PDK plug-in is included in the ADS1274EVM-PDK  
package.  
The program currently runs only on Microsoft Windows platforms of Windows XP; Windows Vista is NOT  
supported.  
If this is the first time installing ADCPro and plug-ins, follow these procedures to run ADCPro and  
complete the necessary driver installation. Make sure the ADCPro software and device plug-in software  
are installed from the CD-ROM as described in Section 9.1.  
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ADS1274EVM-PDK Kit Operation  
9.4.1  
NI-VISA USB Device Driver Installation  
1. After the ADCPro software is installed, apply power to the PDK and connect the board to an available  
PC USB port.  
2. The computer should recognize new hardware and begin installing the drivers for the hardware.  
Figure 13 through Figure 16 are provided for reference to show the installation steps.  
For the first screen, Figure 13, it is not necessary to search for the software; it has already been  
installed to your PC.  
For the remaining steps, accept the default settings.  
Figure 13. NI-VISA Driver Installation  
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Figure 14. NI-VISA Driver Installation Question  
Figure 15. NI-VISA Driver Installing  
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Figure 16. NI-VISA Driver Complete Installation  
This should complete the installation of the NI-VISA drivers. You can verify proper installation by opening  
the Device Manager and locating as shown in Figure 17.  
Figure 17. NI-VISA Driver Verification Using Device Manager  
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9.4.2  
USBStyx Driver Installation  
Step 1. Start the software by selecting ADCPro from the Windows Start menu. The screen in  
Figure 18 appears.  
Figure 18. ADCPro Software Start-up Display Window  
Step 2. Select ADS1274EVM from the EVM drop-down menu. The ADS1274EVM-PDK plug-in  
appears in the left pane, as shown in Figure 19.  
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Figure 19. ADS1274EVM-PDK Plug-In Display Window  
Step 3. The ADS1274EVM-PDK plug-in window has a status area at the top of the screen. When the  
plug-in is first loaded, the plug-in searches for the board. You will see a series of messages  
in the status area indicating this action.  
Step 4. If you have not yet loaded the operating system drivers, Windows will display the Windows  
Install New Driver Wizard sequence (illustrated in Figure 20 through Figure 24). Accept the  
default settings.  
Note: During the driver installation, a message may appear indicating the firmware load has TIMED  
OUT. Click OK and continue driver installation. The plug-in will attempt to download the  
firmware again once the driver installation completes.  
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Figure 20. Install New Driver Wizard Screen 1  
Figure 21. Install New Driver Wizard Screen 2  
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Figure 22. Install New Driver Wizard Screen 3  
Figure 23. Install New Driver Wizard Screen 4  
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Figure 24. Install New Driver Wizard Screen 5  
Step 5. Once Windows finishes installing the software driver, the plug-in downloads the firmware to  
the MMB0. The status area will display Connected to EVM when the device is connected and  
ready to use. If the firmware does not load properly, you can try resetting the MMB0 by  
pressing reset and then reloading the plug-in.  
Step 6. You can verify the proper installation of the USBStyx driver using the Device Manager. Note  
that the first driver item, NI-VISA USB Devices, will disappear and a new item, LibUSB-Win32  
Devices will appear, as Figure 25 shows.  
Figure 25. USBSytx Driver Verification Using Device Manager  
The driver installation wizard sequence should not appear again, unless you connect the board to a  
different USB port.  
10  
Evaluating Performance with the ADCPro Software  
The evaluation software is based on ADCPro, a program that operates using a variety of plug-ins. (The  
ADS1274EVM plug-in is installed as described in the installation section, .)  
To use ADCPro, load an EVM plug-in and a test plug-in. To load an EVM plug-in, select it from the EVM  
menu. To load a test plug-in, select it from the Test menu. To unload a plug-in, select the Unload option  
from the corresponding menu.  
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Evaluating Performance with the ADCPro Software  
Only one of each kind of plug-in can be loaded at a time. If you select a different plug-in, the previous  
plug-in is unloaded.  
10.1 Using the ADS1274EVM-PDK Plug-in  
The ADS1274EVM-PDK plug-in for ADCPro provides complete control over all settings of the ADS1274. It  
consists of a tabbed interface (see Figure 19), with different functions available on different tabs. These  
controls are described in this section.  
You can adjust the ADS1274EVM settings when it is not acquiring data. During acquisition, all controls are  
disabled and settings may not be changed.  
When you change a setting on the ADS1274EVM plug-in, the setting immediately updates on the board.  
Settings on the ADS1274EVM correspond to settings described in the ADS1274 product data sheet; see  
the ADS1274 data sheet for details.  
Because the effective data rate of the ADS1274 depends upon settings of the Clock Freq and Operating  
Mode, the Data Rate indicator in the upper right corner of the plug-in interface is always visible and  
updates whenever a setting changes that affects the data rate.  
10.1.1 Channel Enable Tab  
The ADS1274 can acquire from one to four channels simultaneously. The Channel Enable tab (as shown  
in Figure 26) provides the control to turn each channel on or off.  
Figure 26. Channel Enable  
In addition, the Manual Control button (shown in Figure 27) can be used to enable or disable all the  
channels.  
Figure 27. Manual Channel Control  
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10.1.2 Settings Tab  
The ADS1274 requires a clock to operate. The maximum frequency is selected for the different operating  
modes, as shown in Table 7.  
Table 7. Operating Modes: Clock Frequency  
Operating Mode  
High-Speed  
High-Resolution  
Low-Power  
CLKDIV  
Frequency (MHz)  
32.768  
27  
1
0
1
0
27  
Low-Power  
13.5  
27  
Low-Speed  
Low-Speed  
5.4  
If the PLL is selected as the clock source, a frequency can be entered in the Clock Frequency box; the  
software will find the closest frequency that is possible for the PLL to synthesize (and which is within the  
maximum allowable frequency for the mode selected) and will set the clock to that frequency, as well as  
display the actual frequency used in the Clock Frequency box once focus has moved from that control.  
Figure 28. Clock Settings and Mode  
The Operating Mode control (illustrated in Figure 29) can select from High-Speed, High-Resolution,  
Low-Power, or Low-Speed.  
Figure 29. Operating Mode  
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The CLKDIV control can be selected to be 0 or 1. The Data Output Formats are limited to the Frame  
Sync, TDM Format, but both Dynamic and Fixed Mode can be selected. Figure 30 shows the output data  
format options.  
Figure 30. Output Data Format  
10.1.3 Collecting Data  
Once you have configured the ADS1274 for your test scenario, press the ADCPro Acquire button to start  
the collection of the number of datapoints specified in the Test plug-in Block Size control. The  
ADS1274EVM-PDK plug-in disables all the front panel controls while acquiring, and displays a progress  
bar as shown in Figure 31.  
Figure 31. Progress Bar While Collecting Data  
For more information on testing analog-to-digital converters in general and using ADCPro and Test  
plug-ins, refer to the ADCPro User Guide.  
10.2 Troubleshooting  
If ADCPro stops responding while the ADS1274EVM-PDK is connected, try unplugging the power supply  
from the PDK. Unload and reload the plug-in before reapplying power to the PDK.  
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11  
Schematics and Layout  
Schematics for the ADS1174EVM and ADS1274EVM are appended to this user's guide. The bill of  
materials is provided in Table 8.  
11.1 Bill of Materials  
Note: All components should be compliant with the European Union Restriction on Use of  
Hazardous Substances (RoHS) Directive. Some part numbers may be either leaded or  
RoHS. Verify that purchased components are RoHS-compliant. (For more information about  
TI's position on RoHS compliance, see the Texas Instruments web site.)  
Table 8. ADS1174EVM/ADS1274EVM Bill of Materials  
Item  
No.  
Qty  
Value  
Ref Des  
Description  
Vendor  
Part Number  
1
6
47  
R39-R45. R44, Resistor, Thick Film Chip 47 ,  
Panasonic  
ERJ-3GEYJ470V  
R45  
5%, 1/10W, Size = 0603  
2
16  
1
49.9  
100  
R36, R46,  
R56-R69  
Resistor, Thick Film Chip 49.9 ,  
1%, 1/16W, Size = 0603  
Panasonic  
Panasonic  
Panasonic  
Panasonic  
ERJ-3EKF49R9V  
ERJ-3GEYJ101V  
ERJ-3EKF1001V  
ERJ-3GEYJ202V  
ERJ-3EKF4221V  
ERJ-3GEYJ103V  
ERJ-3GEYJ473V  
ERJ-3GEYJ104V  
ERJ-3GEYJ154V  
ERJ-3GEYJ474V  
MCR10EZHF1104  
MCR10EZHF1244  
745C101104JPTR  
GRM1885C1H6R2DZ01D  
C1608C0G1H152JT  
C1608C0G1H222JT  
C1608X7R1H472KT  
C1608X7R1H103KT  
C1608X7R1H104KT  
3
R37  
R2-R19  
R38  
Resistor, Thick Film Chip 100 ,  
5%, 1/10W, Size = 0603  
4
18  
1
1K  
Resistor, Thick Film Chip 1 k,  
1%, 1/16W, Size = 0603  
5
2K  
Resistor, Thick Film Chip 2 k,  
5%, 1/10W, Size = 0603  
6
1
4.22K  
10K  
R71  
Resistor, Thick Film Chip 4.22 k, Panasonic  
1%, 1/16W, Size = 0603  
7
3
R50, R51, R70 Resistor, Thick Film Chip 10 k,  
Panasonic  
Panasonic  
5%, 1/10W, Size = 0603  
9
1
47K  
R47  
R1,R72  
R53, R54  
R48, R49  
R52  
Resistor, Thick Film Chip 47 k,  
5%, 1/10W, Size = 0603  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
2
100K  
150K  
470K  
1.1M  
1.24M  
100K  
6.2pF  
1.5nF  
2.2nF  
4.7nF  
10nF  
0.1 µF  
Resistor, Thick Film Chip 100 k, Panasonic  
5%, 1/10W, Size = 0603  
2
Resistor, Thick Film Chip 150 k, Panasonic  
5%, 1/10W, Size = 0603  
2
Resistor, Thick Film Chip 470 k, Panasonic  
5%, 1/10W, Size = 0603  
1
Resistor, Thick Film Chip 1.1 M, Rohm  
5%, 1/8W, Size = 0805  
1
R55  
Resistor, Thick Film Chip 1.24 M, Rohm  
5%, 1/8W, Size = 0805  
2
RA1, RA2  
C28, C29  
C36-C43  
C17-C20  
C33  
Resistor, Chip Array 10 Terminal  
Bus 100 k, 5%, 1/16W, SMD  
CTS  
2
Capacitor, C0G Ceramic 6.2 pF  
±0.5pF, 50WV, Size = 0603  
Murata  
8
Capacitor, C0G Ceramic 1500 pF TDK  
±5%, 50WV, Size = 0603  
4
Capacitor, C0G Ceramic 2200  
pF±5%, 50WV, Size = 0603  
TDK  
TDK  
TDK  
TDK  
1
Capacitor, X7R Ceramic 4700 pF  
±10%, 50WV, Size = 0603  
3
C32, C34, C76 Capacitor, X7R Ceramic 0.01 µF  
±5%, 50WV, Size = 0603  
28  
C4-C12, C26, Capacitor, X7R Ceramic 0.1 µF  
C52-C63,  
C77-C80, C83,  
C84  
±10%, 50WV, Size = 0603  
28  
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Table 8. ADS1174EVM/ADS1274EVM Bill of Materials (continued)  
Item  
No.  
Qty  
Value  
Ref Des  
Description  
Vendor  
Part Number  
22  
1
0.15 µF  
C3  
Capacitor, X7R Ceramic 0.15 µF  
±10%, 25WV, Size = 0603  
TDK  
TDK  
TDK  
TDK  
C1608X7R1E154KT  
23  
24  
25  
26  
27  
28  
29  
30  
1
1
2
1
5
2
1
1
0.22 µF  
0.47 µF  
1 µF  
C35  
C1  
Capacitor, X7R Ceramic 0.22 µF  
±10%, 16WV, Size = 0603  
C1608X7R1C224KT  
C1608X5R1A474KT  
C1608X7R1C105KT  
GRM21BR61C475KA88L  
C3216X5R1C106MT  
C3225X5R1C226MT  
C3225X5R0J107MT  
Capacitor, X5R Ceramic 0.47 µF  
±10%, 10WV, Size = 0603  
C27, C81  
C25  
Capacitor, X7R Ceramic 1 µF  
±10%, 16WV, Size = 0603  
4.7 µF  
10 µF  
Capacitor, X7R Ceramic 4.7 µF  
±10%, 6.3WV, Size = 0805  
Murata  
TDK  
C21-C24, C82 Capacitor, X5R Ceramic 10 µF  
±20%, 16WV, Size = 1206  
22 µF  
C30, C31  
Capacitor, X5R Ceramic 22 µF  
±20%, 16WV, Size = 1210  
TDK  
100 µF  
C2  
Capacitor, X5R Ceramic 100 µF  
±20%, 6.3WV, Size = 1210  
TDK  
U4  
Precision Delta-Sigma ADC, 4  
Differential Input  
Texas  
Instruments  
ADS1274IPAP  
(ADS1274EVM) or  
ADS1174IPAP  
(ADS1174EVM)  
31  
32  
33  
34  
35  
36  
35  
36  
37  
38  
1
1
1
4
1
1
1
1
1
2
U2  
U3  
Precision Voltage Reference, 2.5V Texas  
Instruments  
REF5025ID  
Operational Amplifier, Dual  
Precision Voltage Reference  
Fully-Differential Amplifier  
Single, Inverter  
Texas  
Instruments  
OPA2350EA  
U1  
Texas  
Instruments  
REF3125AIDBZ  
OPA1632DGN  
U8-U11  
U19  
Texas  
Instruments  
Texas  
SN74LVC1G04DBVR  
SN74LVC2G74DCTR  
SN74LVC2G157DCT  
TPS73018DBV  
TPS65131RGET  
PCA9535RGE  
Instruments  
U20  
Single, D Flip-Flop  
Texas  
Instruments  
U6  
Single, 2-Line to 1 Data  
Selector/Multiplexer  
Texas  
Instruments  
U16  
LDO Voltage Regulator, 1.8 V, 200 Texas  
mA  
Instruments  
U5  
Dual output 800-mA DC/DC Switch Texas  
boost converter  
Instruments  
U17, U18  
16-Bit I2C I/O Expander  
Texas  
Instruments  
39  
39  
40  
41  
42  
43  
44  
46  
47  
1
1
2
2
1
1
2
3
4
U21  
U7  
EEPROM, 1.8V, 256K  
3.3-V Oscillator  
Microchip  
CTS  
24AA256-I/ST  
27 MHz  
CB3LV-3I-27M0000  
TSM-110-01-L-DV-P  
SSW-110-22-F-D-VS-K  
TSM-105-01-L-DV-P  
SSW-105-22-F-D-VS-K  
TSW-102-07-L-D  
J5A, J9A  
J5B, J9B  
J3A  
20-pin SMT Plug  
Samtec  
Samtec  
Samtec  
Samtec  
Samtec  
Samtec  
Samtec  
20-pin SMT Socket  
10-pin SMT Plug  
J3B  
10-pin SMT Socket  
Header Strip, 4-pin ( )  
Header Strip, 2-pin ( )  
Header Strip, 4-pin ( )  
J2, J6  
J4, J17, J18  
TSW-102-07-L-S  
J1, J15, J16,  
J19  
TSW-103-07-L-S  
48  
1
J7  
Terminal Block 3.5-mm 9-Position On Shore  
PCB Technology  
ED555/9DS  
SBAU134AAugust 2008Revised May 2009  
ADS1174EVM, ADS1274EVM, ADS1174EVM-PDK, and ADS1274EVM-PDK  
29  
Submit Documentation Feedback  
Schematics and Layout  
www.ti.com  
Table 8. ADS1174EVM/ADS1274EVM Bill of Materials (continued)  
Item  
No.  
Qty  
Value  
Ref Des  
Description  
Vendor  
Texas  
Instruments  
Part Number  
49  
1
N/A  
ADS1274EVM or ADS1174EVM  
PWB  
6492532 or 6496219  
50  
2
D1, D2  
Schottky Diode, 20V, 1A  
ON  
MBRM120LT1G  
Semiconductor  
51  
52  
5
2
J10-J14  
L1, L2  
Bus Wire (18-22 Gauge)  
Inductor, 4.7 µH, 1.8 A, 6x6mm,  
EPCOS  
B82462G4472M  
SMD  
53  
54  
55  
56  
56  
5
1
1
1
1
S1-S5  
S10  
Switch, Mini Slide, DPDT  
NKK  
C&K  
C&K  
SS22SDP2  
DIP Switch, Half-Pitch, 8-Position  
DIP Switch, Half-Pitch, 6-Position  
4PDT Slide Switch, Top Actuator  
TDA08H0SB1  
TDA06H0SB1  
S11  
S12  
Tyco/Alcoswitch MMS42  
TP8  
PCB Test Point, Large Loop,  
Through-hole  
Keystone  
Electronics  
5011  
57  
7
N/A  
Shorting Blocks  
Samtec  
SNT-100-BK-G-H  
30  
ADS1174EVM, ADS1274EVM, ADS1174EVM-PDK, and ADS1274EVM-PDK  
SBAU134AAugust 2008Revised May 2009  
Submit Documentation Feedback  
1
2
3
4
5
6
REVISION HISTORY  
ENGINEERING CHANGE NUMBER  
APPROVED  
R38  
2K  
AVDD  
REFP  
REFN  
S1  
U1  
IN  
C3  
1
3
2
OUT  
C21  
GND  
150nF  
10uF  
AVDD  
U18  
PCA9535RGE  
C1  
0.47uF  
REF3125AIDBZ  
C4  
0.1uF  
U3A  
IOVDD  
SW-DPDT  
C79  
7
8
9
10  
11  
12  
24  
23  
22  
21  
20  
19  
P06  
P07  
GND  
P10  
P11  
P12  
A2  
A1  
INT  
VCC  
SDA  
SCL  
R39  
47  
IOVDD  
AVDD  
D
C
B
A
0.1uF  
D
C
B
A
IOVDD RA1  
S10  
2
3
1
2
3
4
8
7
6
5
1
C12  
0.1uF  
S11  
DIPSWITCH-6  
R2  
1K  
J12  
OPA2350  
RA2  
100K  
DIPSWITCH-4  
C2  
100uF  
TP2 TP3  
TP5  
TP6  
TP7  
TP11  
J1  
JPR-1X3  
C6  
0.1uF  
100K  
AVDD  
U2  
VIN  
TEMP  
GND  
R1  
IOVDD  
2
3
4
6
5
VOUT  
TRIM  
100K  
C81  
1uF  
C82  
10uF  
REF5025  
U4  
ADS1174IPAP  
J5  
SYNC  
SCLK  
1
3
5
7
9
11  
13  
15  
17  
19  
2
4
6
8
10  
12  
14  
16  
18  
20  
CNTL  
CLKX  
CLKR  
FSX  
FSR  
DX  
DR  
INT  
TOUT  
GPIO5  
GPIO0  
S12  
DGND  
GPIO1  
GPIO2  
DGND  
GPIO3  
GPIO4  
SCL  
AVDD  
J6  
U3B  
6
5
ALC_MMS42  
1
3
2
4
7
R41  
47  
J10  
49  
50  
51  
52  
32  
NC  
NC  
NC  
NC  
FORMAT0  
FORMAT1  
FORMAT2  
OPA2350  
R40  
47  
31  
30  
29  
C5  
0.1uF  
IOVDD  
DRDY/FSYNC  
DGND  
SDA  
SheetB  
SheetB.Sch  
SN74LVC2G74DCTR  
C83  
53  
54  
55  
56  
28  
27  
SN74LVC1G04DBV  
2
DVDD  
AVDD  
AGND  
VCOM  
VREFP  
SCLK  
CLK  
SERIALHDR  
4
J13  
C7  
0.1uF  
R42  
47  
AINP4  
AINN4  
0.1uF  
AP4  
26  
25  
24  
23  
22  
21  
1
2
U19  
U20  
J5A (TOP) = SAM_TSM-110-01-L-DV-P  
J5B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K  
DVDD  
DGND  
DGND  
IOVDD  
IOVDD  
DGND  
J14  
IOVDD  
2
C17  
57  
58  
59  
60  
C10  
0.1uF  
1
2.2nF C0G  
VREFN  
AGND  
AGND  
AVDD  
AN4  
2
1
5
3
C8  
0.1uF  
D
Q
Q
C11  
0.1uF  
R49  
CLK  
U17  
470K  
J18  
TP4  
AINP3  
AINN3  
AP3  
AN3  
AINP4  
AINN4  
AINP3  
AINN3  
61  
62  
63  
64  
20  
19  
18  
17  
AINP4  
AINN4  
AINP3  
AINN3  
DOUT1  
DOUT2  
DOUT3  
DOUT4  
IOVDD  
7
24  
23  
22  
21  
20  
19  
C18  
2
8
1
9
P06  
P07  
GND  
P10  
P11  
P12  
A2  
A1  
2.2nF C0G  
DOUT  
INT  
EXT CLK  
D1 10  
D2 11  
D3 12  
VCC  
SDA  
SCL  
J19  
1
2
3
R47  
47K  
AINP2  
AINN2  
AP2  
AN2  
J2  
IOVDD  
C19  
D2  
D4  
JPR-1X3 EXT  
C78  
2.2nF C0G  
TP8  
GND  
2
4
1
3
GPIO5  
IOVDD  
U6  
0.1uF  
DOUT  
8
5
3
7
6
U7  
IOVDD  
4
2
VCC A/B  
1
2
4
1
3
C34  
10 nF  
AINP1  
AINN1  
GND  
Y
Y
G
A
B
EOH  
OUT  
VCC  
GND  
AP1  
AN1  
OBCLK  
R48  
470K  
PCA9535RGE  
C20  
GND  
C27  
1uF  
CTS_CB3LV-3I-27.0000-T  
2.2nF C0G  
SN74LVC2G157DCT  
DVDD  
R44  
IOVDD  
U16  
AVDD  
J11  
47  
1
3
2
5
4
IN  
EN  
OUT  
NR  
1
2
+10V  
IOVDD  
IOVDD  
C23  
10uF  
TP9  
+10V  
R45  
47  
R72  
GND  
C77  
0.1uF  
+VA  
C9  
0.1uF  
100k  
TPS73018DBV  
C76  
RA3  
10nF  
100K  
R50  
10K  
J15  
TP1  
R3  
1K  
R52  
1.1M  
J20  
U21  
IOVDD  
VA+  
C28  
6.2 pF  
C30  
22 uF 16V  
1
2
3
7
8
1
3
5
2
4
6
A0  
A1  
A2  
WP  
VCC  
5
R70  
10K  
R53  
SDA  
6
+VA  
-VA  
C84  
0.1uF  
D1  
R71  
4.22K  
SCL  
4
150K  
EPC_B82462-G4472-M  
L1  
C80  
0.1uF  
GND  
HEADER-3X2  
J3  
MCP_24LC256-I/ST  
AVDD  
1
3
5
7
9
2
4
6
8
+VA  
-VA  
MBRM120  
C29  
6.2 pF  
R51  
10K  
R55  
J4  
JPR-2X1  
+5VA  
-5VA  
AGND  
VD1  
U5  
INP  
INP  
BSW  
INN  
C25  
4.7 uF  
C35  
0.22 uF  
R54  
150K  
IOVDD  
DGND  
+1.8VD  
+3.3VD  
1
24  
7
5
6
4
8
9
10  
11  
19  
12  
23  
22  
17  
16  
15  
13  
14  
21  
18  
2
C24  
10uF  
VPOS  
FBP  
VREF  
FBN  
VNEG  
OUTN  
OUTN  
CP  
10  
-10V  
+5VD  
TP10  
-10V  
1.24M  
C22  
10uF  
POWERHDR  
D2  
-VA  
INN  
VIN  
R37  
100  
ti  
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA  
J3A (TOP) = SAM_TSM-105-01-L-DV-P  
J3B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K  
ENP  
PSP  
ENN  
PSN  
AGND  
NC  
DATA ACQUISITION PRODUCTS  
J16  
C31  
22 uF 16V  
MBRM120  
L2  
EPC_B82462-G4472-M  
HIGH-PERFORMANCE ANALOG DIVISION  
SEMICONDUCTOR GROUP  
CN  
VA-  
C32  
PGND  
PGND  
NC  
10 nF  
3
20  
C33  
4.7 nF  
C26  
0.1uF  
TITLE  
ENGINEER RUSSELL ANDERSON  
DRAWN BY RUSSELL ANDERSON  
DOCUMENT CONTROL NO. 6496220  
ADS1174EVM  
TPS65131RGE  
SIZE  
B
DATE 29 AUG 2008  
REV  
B
SHEET  
1
OF  
2
FILE  
1
2
3
4
5
6
1
2
3
4
5
6
REVISION HISTORY  
ENGINEERING CHANGE NUMBER  
REV  
APPROVED  
1K  
C36  
1.5nF C0G  
U8  
R4  
D
C
B
A
D
C
B
A
+10V  
C52  
0.1uF  
R5  
S2  
8
1
3
CHAN-P4  
CHAN-N4  
49.9  
+
R56  
5
2
4
ANP4  
ANN4  
1K  
-
VOCM  
+
6
R6  
1K  
R57 49.9  
C53  
-
SW-DPDT  
OPA1632  
C37  
C54  
CM  
1K  
C38  
R8  
VCOM  
0.1uF  
0.1uF  
-10V  
+10V  
C55  
1.5nF C0G  
1.5nF C0G  
R7  
1K  
0.1uF  
U9  
R9  
1K  
8
1
3
49.9  
+
-
R58  
S3  
5
2
4
CHAN-P3  
CHAN-N3  
-
ANP3  
ANN3  
VOCM  
+
6
R10  
1K  
R59 49.9  
C56  
OPA1632  
C39  
SW-DPDT  
C57  
0.1uF  
0.1uF  
-10V  
ANP4  
ANN4  
ANP3  
1.5nF C0G  
R11  
1K  
1K  
C40  
1.5nF C0G  
U10  
R12  
ANN3  
+10V  
C58  
J7  
0.1uF  
R13  
1K  
S4  
8
1
3
CHAN-P2  
CHAN-N2  
49.9  
+
R60  
5
2
4
ANP2  
ANN2  
-
VOCM  
+
6
R14  
1K  
R61 49.9  
C59  
-
SW-DPDT  
CHAN-P4  
CHAN-N4  
CHAN-P3  
CHAN-N3  
CHAN-P2  
CHAN-N2  
CHAN-P1  
CHAN-N1  
AP4  
AN4  
AP3  
AN3  
AP2  
AN2  
AP1  
AN1  
OPA1632  
C60  
0.1uF  
0.1uF  
-10V  
C41  
TERMBLOCK-MINI-9  
1.5nF C0G  
R15  
ANP2  
ANN2  
ANP1  
ANN1  
1K  
1K  
C42  
R16  
+10V  
C61  
1.5nF C0G  
0.1uF  
U11  
+
R17  
1K  
S5  
8
1
3
CHAN-P1  
CHAN-N1  
49.9  
R62  
J9  
5
2
4
ANP1  
ANN1  
-
1
2
4
6
8
VOCM  
AN0-  
3
AN0+  
+
6
AN1-  
5
AN1+  
AN2+  
AN3+  
AN4+  
AN5+  
AN6+  
AN7+  
REF-  
R18  
1K  
R63 49.9  
C62  
AN2-  
7
-
SW-DPDT  
AN3-  
9
OPA1632  
10  
12  
14  
16  
18  
20  
AGND  
11  
C63  
0.1uF  
AGND  
13  
0.1uF  
-10V  
C43  
AGND  
15  
VCOM  
17  
REFN  
REFP  
AGND  
19  
1.5nF C0G  
AGND  
REF+  
R19  
ANALOGHDR  
1K  
J9A (TOP) = SAM_TSM-110-01-L-DV-P  
J9B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K  
ti  
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA  
DATA ACQUISITION PRODUCTS  
HIGH-PERFORMANCE ANALOG DIVISION  
SEMICONDUCTOR GROUP  
TITLE  
SIZE  
ENGINEER RUSSELL ANDERSON  
DRAWN BY RUSSELL ANDERSON  
DOCUMENT CONTROL NO. 6496220  
ADS1174EVM  
B
DATE 29 AUG 2008  
REV  
B
SHEET  
2
OF  
2
FILE  
1
2
3
4
5
6
1
2
3
4
5
6
REVISION HISTORY  
ENGINEERING CHANGE NUMBER  
APPROVED  
R38  
2K  
AVDD  
REFP  
REFN  
S1  
U1  
IN  
C3  
1
3
2
OUT  
C21  
GND  
150nF  
10uF  
AVDD  
U18  
PCA9535RGE  
C1  
0.47uF  
REF3125AIDBZ  
C4  
0.1uF  
U3A  
IOVDD  
SW-DPDT  
C79  
7
8
9
10  
11  
12  
24  
23  
22  
21  
20  
19  
P06  
P07  
GND  
P10  
P11  
P12  
A2  
A1  
INT  
VCC  
SDA  
SCL  
R39  
47  
IOVDD  
AVDD  
D
C
B
A
0.1uF  
D
C
B
A
IOVDD RA1  
S10  
2
3
1
2
3
4
8
7
6
5
1
C12  
0.1uF  
S11  
DIPSWITCH-6  
R2  
1K  
J12  
OPA2350  
RA2  
100K  
DIPSWITCH-4  
C2  
100uF  
TP2 TP3  
TP5  
TP6  
TP7  
TP11  
J1  
JPR-1X3  
C6  
0.1uF  
100K  
AVDD  
U2  
VIN  
TEMP  
GND  
R1  
IOVDD  
2
3
4
6
5
VOUT  
TRIM  
100K  
C81  
1uF  
C82  
10uF  
REF5025  
U4  
ADS1274IPAP  
J5  
SYNC  
SCLK  
1
3
5
7
9
11  
13  
15  
17  
19  
2
4
6
8
10  
12  
14  
16  
18  
20  
CNTL  
CLKX  
CLKR  
FSX  
FSR  
DX  
DR  
INT  
TOUT  
GPIO5  
GPIO0  
S12  
DGND  
GPIO1  
GPIO2  
DGND  
GPIO3  
GPIO4  
SCL  
AVDD  
J6  
U3B  
6
5
ALC_MMS42  
1
3
2
4
7
R41  
47  
J10  
49  
50  
51  
52  
32  
NC  
NC  
NC  
NC  
FORMAT0  
FORMAT1  
FORMAT2  
OPA2350  
R40  
47  
31  
30  
29  
C5  
0.1uF  
IOVDD  
DRDY/FSYNC  
DGND  
SDA  
SheetB  
SheetB.Sch  
SN74LVC2G74DCTR  
C83  
53  
54  
55  
56  
28  
27  
SN74LVC1G04DBV  
2
DVDD  
AVDD  
AGND  
VCOM  
VREFP  
SCLK  
CLK  
SERIALHDR  
4
J13  
C7  
0.1uF  
R42  
47  
AINP4  
AINN4  
0.1uF  
AP4  
26  
25  
24  
23  
22  
21  
1
2
U19  
U20  
J5A (TOP) = SAM_TSM-110-01-L-DV-P  
J5B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K  
DVDD  
DGND  
DGND  
IOVDD  
IOVDD  
DGND  
J14  
IOVDD  
2
C17  
57  
58  
59  
60  
C10  
0.1uF  
1
2.2nF C0G  
VREFN  
AGND  
AGND  
AVDD  
AN4  
2
1
5
3
C8  
0.1uF  
D
Q
Q
C11  
0.1uF  
R49  
CLK  
U17  
470K  
J18  
TP4  
AINP3  
AINN3  
AP3  
AN3  
AINP4  
AINN4  
AINP3  
AINN3  
61  
62  
63  
64  
20  
19  
18  
17  
AINP4  
AINN4  
AINP3  
AINN3  
DOUT1  
DOUT2  
DOUT3  
DOUT4  
IOVDD  
7
24  
23  
22  
21  
20  
19  
C18  
2
8
1
9
P06  
P07  
GND  
P10  
P11  
P12  
A2  
A1  
2.2nF C0G  
DOUT  
INT  
EXT CLK  
D1 10  
D2 11  
D3 12  
VCC  
SDA  
SCL  
J19  
1
2
3
R47  
47K  
AINP2  
AINN2  
AP2  
AN2  
J2  
IOVDD  
C19  
D2  
D4  
JPR-1X3 EXT  
C78  
2.2nF C0G  
TP8  
GND  
2
4
1
3
GPIO5  
IOVDD  
U6  
0.1uF  
DOUT  
8
5
3
7
6
U7  
IOVDD  
4
2
VCC A/B  
1
2
4
1
3
C34  
10 nF  
AINP1  
AINN1  
GND  
Y
Y
G
A
B
EOH  
OUT  
VCC  
GND  
AP1  
AN1  
OBCLK  
R48  
470K  
PCA9535RGE  
C20  
GND  
C27  
1uF  
CTS_CB3LV-3I-27.0000-T  
2.2nF C0G  
SN74LVC2G157DCT  
DVDD  
R44  
IOVDD  
U16  
AVDD  
J11  
47  
1
3
2
5
4
IN  
EN  
OUT  
NR  
1
2
+10V  
IOVDD  
IOVDD  
C23  
10uF  
TP9  
+10V  
R45  
47  
R72  
GND  
C77  
0.1uF  
+VA  
C9  
0.1uF  
100k  
TPS73018DBV  
C76  
RA3  
10nF  
100K  
R50  
10K  
J15  
TP1  
R3  
1K  
R52  
1.1M  
J20  
U21  
IOVDD  
VA+  
C28  
6.2 pF  
C30  
22 uF 16V  
1
2
3
7
8
1
3
5
2
4
6
A0  
A1  
A2  
WP  
VCC  
5
R70  
10K  
R53  
SDA  
6
+VA  
-VA  
C84  
0.1uF  
D1  
R71  
4.22K  
SCL  
4
150K  
EPC_B82462-G4472-M  
L1  
C80  
0.1uF  
GND  
HEADER-3X2  
J3  
MCP_24LC256-I/ST  
AVDD  
1
3
5
7
9
2
4
6
8
+VA  
-VA  
MBRM120  
C29  
6.2 pF  
R51  
10K  
R55  
J4  
JPR-2X1  
+5VA  
-5VA  
AGND  
VD1  
U5  
INP  
INP  
BSW  
INN  
C25  
4.7 uF  
C35  
0.22 uF  
R54  
150K  
IOVDD  
DGND  
+1.8VD  
+3.3VD  
1
24  
7
5
6
4
8
9
10  
11  
19  
12  
23  
22  
17  
16  
15  
13  
14  
21  
18  
2
C24  
10uF  
VPOS  
FBP  
VREF  
FBN  
VNEG  
OUTN  
OUTN  
CP  
10  
-10V  
+5VD  
TP10  
-10V  
1.24M  
C22  
10uF  
POWERHDR  
D2  
-VA  
INN  
VIN  
R37  
100  
ti  
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA  
J3A (TOP) = SAM_TSM-105-01-L-DV-P  
J3B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K  
ENP  
PSP  
ENN  
PSN  
AGND  
NC  
DATA ACQUISITION PRODUCTS  
J16  
C31  
22 uF 16V  
MBRM120  
L2  
EPC_B82462-G4472-M  
HIGH-PERFORMANCE ANALOG DIVISION  
SEMICONDUCTOR GROUP  
CN  
VA-  
C32  
PGND  
PGND  
NC  
10 nF  
3
20  
C33  
4.7 nF  
C26  
0.1uF  
TITLE  
ENGINEER RUSSELL ANDERSON  
DRAWN BY RUSSELL ANDERSON  
DOCUMENT CONTROL NO. 6492533  
ADS1274EVM  
TPS65131RGE  
SIZE  
B
DATE 29 AUG 2008  
REV  
B
SHEET  
1
OF  
2
FILE  
1
2
3
4
5
6
1
2
3
4
5
6
REVISION HISTORY  
ENGINEERING CHANGE NUMBER  
REV  
APPROVED  
1K  
C36  
1.5nF C0G  
U8  
R4  
D
C
B
A
D
C
B
A
+10V  
C52  
0.1uF  
R5  
S2  
8
1
3
CHAN-P4  
CHAN-N4  
49.9  
+
R56  
5
2
4
ANP4  
ANN4  
1K  
-
VOCM  
+
6
R6  
1K  
R57 49.9  
C53  
-
SW-DPDT  
OPA1632  
C37  
C54  
CM  
1K  
C38  
R8  
VCOM  
0.1uF  
0.1uF  
-10V  
+10V  
C55  
1.5nF C0G  
1.5nF C0G  
R7  
1K  
0.1uF  
U9  
R9  
1K  
8
1
3
49.9  
+
-
R58  
S3  
5
2
4
CHAN-P3  
CHAN-N3  
-
ANP3  
ANN3  
VOCM  
+
6
R10  
1K  
R59 49.9  
C56  
OPA1632  
C39  
SW-DPDT  
C57  
0.1uF  
0.1uF  
-10V  
ANP4  
ANN4  
ANP3  
1.5nF C0G  
R11  
1K  
1K  
C40  
1.5nF C0G  
U10  
R12  
ANN3  
+10V  
C58  
J7  
0.1uF  
R13  
1K  
S4  
8
1
3
CHAN-P2  
CHAN-N2  
49.9  
+
R60  
5
2
4
ANP2  
ANN2  
-
VOCM  
+
6
R14  
1K  
R61 49.9  
C59  
-
SW-DPDT  
CHAN-P4  
CHAN-N4  
CHAN-P3  
CHAN-N3  
CHAN-P2  
CHAN-N2  
CHAN-P1  
CHAN-N1  
AP4  
AN4  
AP3  
AN3  
AP2  
AN2  
AP1  
AN1  
OPA1632  
C60  
0.1uF  
0.1uF  
-10V  
C41  
TERMBLOCK-MINI-9  
1.5nF C0G  
R15  
ANP2  
ANN2  
ANP1  
ANN1  
1K  
1K  
C42  
R16  
+10V  
C61  
1.5nF C0G  
0.1uF  
U11  
+
R17  
1K  
S5  
8
1
3
CHAN-P1  
CHAN-N1  
49.9  
R62  
J9  
5
2
4
ANP1  
ANN1  
-
1
2
4
6
8
VOCM  
AN0-  
3
AN0+  
+
6
AN1-  
5
AN1+  
AN2+  
AN3+  
AN4+  
AN5+  
AN6+  
AN7+  
REF-  
R18  
1K  
R63 49.9  
C62  
AN2-  
7
-
SW-DPDT  
AN3-  
9
OPA1632  
10  
12  
14  
16  
18  
20  
AGND  
11  
C63  
0.1uF  
AGND  
13  
0.1uF  
-10V  
C43  
AGND  
15  
VCOM  
17  
REFN  
REFP  
AGND  
19  
1.5nF C0G  
AGND  
REF+  
R19  
ANALOGHDR  
1K  
J9A (TOP) = SAM_TSM-110-01-L-DV-P  
J9B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K  
ti  
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA  
DATA ACQUISITION PRODUCTS  
HIGH-PERFORMANCE ANALOG DIVISION  
SEMICONDUCTOR GROUP  
TITLE  
SIZE  
ENGINEER RUSSELL ANDERSON  
DRAWN BY RUSSELL ANDERSON  
DOCUMENT CONTROL NO. 6492533  
ADS1274EVM  
B
DATE 29 AUG 2008  
REV  
B
SHEET  
2
OF  
2
FILE  
1
2
3
4
5
6
EVALUATION BOARD/KIT IMPORTANT NOTICE  
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:  
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES  
ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have  
electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete  
in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental  
measures typically found in end products that incorporate such semiconductor components or circuit boards. This evaluation board/kit does  
not fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling  
(WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of these directives or other related directives.  
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from  
the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER  
AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF  
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The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims  
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appropriate precautions with regard to electrostatic discharge.  
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY  
INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.  
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.  
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or  
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Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the product. This  
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No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or  
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FCC Warning  
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES  
ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and can radiate radio  
frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules, which are  
designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may  
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EVM WARNINGS AND RESTRICTIONS  
It is important to operate this EVM within the input voltage range of 3.3V to 5V and the output voltage range of 0V to 5V.  
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions  
concerning the input range, please contact a TI field representative prior to connecting the input power.  
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM.  
Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification,  
please contact a TI field representative.  
During normal operation, some circuit components may have case temperatures greater than 30°C. The EVM is designed to operate  
properly with certain components above 85°C as long as the input and output ranges are maintained. These components include but are  
not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identified  
using the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during operation,  
please be aware that these devices may be very warm to the touch.  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2009, Texas Instruments Incorporated  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,  
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DLP® Products  
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power.ti.com  
microcontroller.ti.com  
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