7705BI [TI]
SUPPLY-VOLTAGE SUPERVISORS; 电源电压监事
| 型号： | 7705BI |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | SUPPLY-VOLTAGE SUPERVISORS |
| 文件： | 总18页 (文件大小：389K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
The TL7705BM is obsolete
and no longer is supplied.
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
Power-On Reset Generator
Temperature-Compensated Voltage
Reference
Automatic Reset Generation After
Voltage Drop
True and Complement Reset Outputs
Externally Adjustable Pulse Duration
RESET Output Defined From V
Precision Voltage Sensor
≥ 1 V
CC
TL77xxBC . . . D OR P PACKAGE
TL7705BM . . . JG PACKAGE
TL7705BQ . . . D PACKAGE
(TOP VIEW)
TL7705BM . . . FK PACKAGE
(TOP VIEW)
TL7705BM . . . U PACKAGE
(TOP VIEW)
1
2
3
4
5
NC
REF
RESIN
CT
NC
V
SENSE
RESET
RESET
10
9
CC
REF
RESIN
CT
V
CC
1
2
3
4
8
7
6
5
3
2 1 20 19
18
8
NC
NC
RESIN
NC
SENSE
RESET
RESET
4
5
6
7
8
7
SENSE
NC
17
16
15
14
GND
6
GND
RESET
NC
CT
NC – No internal connection
NC
9 10 11 12 13
NC – No internal connection
description/ordering information
The TL7702B, TL7705B, and TL7733B are integrated-circuit supply-voltage supervisors designed for use as
reset controllers in microcomputer and microprocessor systems. The supply-voltage supervisor monitors the
supply for undervoltage conditions at the SENSE input. During power up, the RESET output becomes active
(low) whenV attains a value approaching 1 V. AsV approaches 3 V (assuming that SENSE is aboveV ),
CC
CC
T+
the delay-timer function activates a time delay, after which outputs RESET and RESET go inactive (high and
low, respectively). When an undervoltage condition occurs during normal operation, outputs RESET and
RESET go active. To ensure that a complete reset occurs, the reset outputs remain active for a time delay after
the voltage at the SENSE input exceeds the positive-going threshold value. The time delay is determined by
4
the value of the external capacitor C : t ≈ 2.6 × 10 × C , where C is in farads (F) and t is in seconds (s).
T d
T
T
d
An external capacitor (typically 0.1 µF) must be connected to REF to reduce the influence of fast transients in
the supply voltage.
The TL7702BC, TL7705BC, and TL7733BC are characterized for operation from 0°C to 70°C. The TL7702BI,
TL7705BI, and TL7733BI are characterized for operation from –40°C to 85°C. The TL7705BQ is characterized
for operation from –40°C to 125°C. The TL7705BM is characterized for operation from –55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
unless otherwise noted. On all other products, production
testing of all parameters.
processing does not necessarily include testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
The TL7705BM is obsolete
and no longer is supplied.
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
description/ordering information (continued)
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP (P)
SOIC (D)
PDIP (P)
SOIC (D)
PDIP (P)
SOIC (D)
PDIP (P)
SOIC (D)
PDIP (P)
SOIC (D)
PDIP (P)
SOIC (D)
SOIC (D)
Tube of 50
Tube of 75
Reel of 2500
Tube of 50
Tube of 75
Reel of 2500
Tube of 50
Tube of 75
Reel of 2500
Tube of 50
Tube of 75
Reel of 2500
Tube of 50
Tube of 75
Reel of 2500
Tube of 50
Tube of 75
Reel of 2500
Tube of 75
TL7702BCP
TL7702BCP
TL7702BCD
TL7702BCDR
TL7705BCP
TL7705BCD
TL7705BCDR
TL7733BCP
TL7733BCD
TL7733BCDR
TL7702BIP
7702BC
TL7705BCP
7705BC
0°C to 70°C
TL7733BCP
7733BC
TL7702BIP
7702BI
TL7702BID
TL7702BIDR
TL7705BIP
TL7705BIP
7705BI
–40°C to 85°C
–40°C to 125°C
TL7705BID
TL7705BIDR
TL7733BIP
TL7705BIP
7733BI
TL7733BID
TL7733BIDR
TL7705BQD
TL7705BQD
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
The TL7705BM is obsolete
and no longer is supplied.
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
functional block diagram
The functional block diagram is shown for illustrative purposes only; the actual circuit includes a trimming
network to adjust the reference voltage and sense-comparator trip point.
8
V
CC
Reference
Voltage 1
≈70 µA
6
5
3
7
RESET
RESET
CT
Reference
Voltage 2
V
x
SENSE
R1
(see Note A)
R2
(see Note A)
2
4
RESIN
GND
1
REF
Pin numbers shown are for the D, JG, and P packages.
NOTE A: TL7702B: R1 = 0 Ω, R2 = open, V = V
x
REF1
TL7705B: R1 = 23 kΩ, R2 = 10 kΩ, nominal, V ≈1.43 V
x
TL7733B: R1 = 11.3 kΩ, R2 = 10 kΩ, nominal, V ≈1.43 V
x
typical timing diagram
V
and
CC
SENSE
V
IT–
V
IT+
V
IT–
V
IT+
V
res
V
res
0
RESET
t
t
d
d
Output
Undefined
Output
Undefined
0
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
The TL7705BM is obsolete
and no longer is supplied.
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V
CC
Input voltage range, V : RESIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 20 V
I
SENSE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 20 V
High-level output current, I
(RESET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA
OH
Low-level output current, I (RESET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
OL
Package thermal impedance, θ (see Notes 2 and 3):D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
JA
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
Operating virtual junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
J
Case temperature for 60 seconds, T : FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG or U packages . . . . . . . . . . . . . . 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P packages . . . . . . . . . . . . . . . . 260°C
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to the network ground terminal.
2. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable
J
JA
A
ambient temperature is P = (T (max) – T )/θ . Operating at the absolute maximum T of 150°C can affect reliability.
D
J
A
JA
J
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN
3.6
2
MAX
18
UNIT
V
V
V
V
V
Supply voltage
CC
High-level input voltage
Low-level input voltage
Input voltage
RESIN
18
V
IH
RESIN
0
0.8
18
V
IL
SENSE
0
V
I
I
High-level output current
Low-level output current
RESET
–20
20
mA
mA
OH
OL
I
RESET
TL77xxBC
TL77xxBI
TL7705BQ
TL7705BM
0
–40
–40
–55
70
85
T
A
Operating free-air temperature range
°C
125
125
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
The TL7705BM is obsolete
and no longer is supplied.
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
electrical characteristics over recommended operating conditions (unless otherwise noted)
TL77xxBC
TL77xxBI
TL7705BQ
†
PARAMETER
UNIT
TEST CONDITIONS
MIN
–1.5
TYP
MAX
V
V
High-level output voltage, RESET
Low-level output voltage, RESET
Reference voltage, REF
I
I
I
= –16 mA
V
V
V
V
OH
OH
OL
ref
CC
= 16 mA
0.4
OL
V
ref
= –500 µA,
T
A
= 25°C
2.48
2.53
2.58
TL7702B
2.505
4.5
2.53 2.555
TL7705B
TL7733B
TL7702B
TL7705B
TL7733B
TL7702B
TL7705B
TL7733B
T
= 25°C
4.55
3.08
2.53
4.55
3.08
10
4.6
3.13
2.58
4.65
3.16
A
Negative-going
3.03
2.48
4.45
3
V
IT–
V
input threshold voltage
at SENSE input
‡
= full range
T
A
Hysteresis, SENSE
V
V
V
I
= 3.6 V to 18 V,
T
A
= 25°C
= 25°C
30
mV
hys
CC
(V
IT+
– V
)
IT–
10
§
Power-up reset voltage
RESIN
SENSE
at RESET = 2 mA,
T
A
1
–10
–2
V
OL
res
V = 0.4 V to V
CC
I
I
I
Input current
µA
TL7702B
V = V to 18 V
–0.1
I
ref
I
I
High-level output current, RESET
Low-level output current, RESET
V
V
V
V
= 18 V,
See Figure 1
See Figure 1
RESIN ≥ 2 V
50
µA
µA
OH
O
= 0 V,
–50
3
OL
O
= 15 V,
1.8
SENSE
= 18 V,
I
Supply current
mA
CC
‡
= full range
3.5
T
A
CC
†
‡
§
All electrical characteristics are measured with 0.1-µF capacitors connected at REF, CT, and V
Full range is 0°C to 70°C for the C-suffix devices, –40°C to 85°C for the I-suffix devices, and –40°C to 125°C for the Q-suffix device.
This is the lowest voltage at which RESET becomes active.
to GND.
CC
switching characteristics, V
= 5 V, C open, T = 25°C
T A
CC
TL77xxBC
TL77xxBI
TL7705BQ
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
Propagation delay time from
low- to high-level output
t
t
RESIN
RESIN
RESET
RESET
See Figures 1, 2, and 3
See Figures 1, 2, and 3
270
500
ns
ns
PLH
Propagation delay time from
high- to low-level output
270
500
PHL
150
100
RESIN
t
Effective pulse duration
See Figure 2
ns
ns
ns
w
SENSE
t
r
t
f
t
r
t
f
Rise time
Fall time
Rise time
Fall time
75
200
150
50
See Figures 1 and 3
See Figures 1 and 3
RESET
RESET
150
75
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
The TL7705BM is obsolete
and no longer is supplied.
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
electrical characteristics over recommended operating conditions (unless otherwise noted)
TL7705BM
†
PARAMETER
UNIT
TEST CONDITIONS
MIN
–1.5
TYP
MAX
V
V
High-level output voltage, RESET
Low-level output voltage, RESET
Reference voltage, REF
I
I
I
= –16 mA
V
CC
V
V
V
OH
OH
OL
ref
= 16 mA
0.4
OL
V
ref
= –500 µA,
T
A
= 25°C
2.48
2.505
4.5
2.53
2.58
TL7702B
2.53 2.555
T
= 25°C
A
Negative-going
input threshold voltage
at SENSE input
TL7705B
TL7702B
TL7705B
TL7702B
TL7705B
4.55
2.53
4.55
10
4.6
2.58
4.65
V
IT–
V
2.48
4.45
T
= –55°C to 125°C
A
Hysteresis, SENSE
V
hys
V
= 3.6 V to 18 V,
T
A
= 25°C
= 25°C
mV
V
CC
(V
IT+
– V
)
IT–
30
‡
Power-up reset voltage
1
–10
–2
50
–50
3
V
res
I
at RESET = 2 mA,
T
A
OL
V = 0.4 V to V
RESIN
Input current
I
CC
– 1.5 V
I
I
µA
SENSE
TL7702B
V = V to V
–0.1
I
ref
CC
I
I
High-level output current, RESET
Low-level output current, RESET
V
V
V
V
= 18 V
µA
µA
OH
O
= 0
OL
O
1.8
= 15 V,
RESIN ≥ 2 V
T = –55°C to 125°C
A
SENSE
I
Supply current
mA
CC
4
= 18 V,
CC
†
‡
All electrical characteristics are measured with 0.1-µF capacitors connected at REF, CT, and V
This is the lowest value at which RESET becomes active.
to GND.
CC
switching characteristics, V
= 5 V, C open, T = 25°C
T A
CC
TL7705BM
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
Propagation delay time from
low- to high-level output
t
t
RESIN
RESIN
RESET
See Figures 1, 2, and 3
See Figures 1, 2, and 3
270
500*
ns
ns
PLH
Propagation delay time from
high- to low-level output
RESET
270
500*
PHL
150
100
RESIN
t
Effective pulse duration
See Figure 2
ns
ns
ns
w
SENSE
t
r
t
f
t
r
t
f
Rise time
Fall time
Rise time
Fall time
75*
200*
150*
50*
See Figures 1 and 3
See Figures 1 and 3
RESET
RESET
150
75
* On products compliant to MIL-PRF-38535, these parameters are not production tested.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
The TL7705BM is obsolete
and no longer is supplied.
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
PARAMETER MEASUREMENT INFORMATION
5 V
5 V
V
CC
R
L
(see Note A)
DUT
RESET
DUT
15 pF
RESET
(see Note B)
R
15 pF
L
(see Note A)
(see Note B)
GND
RESET OUTPUT CONFIGURATION
RESET OUTPUT CONFIGURATION
NOTES: A. For I
and I , R = 10 kΩ. For all switching characteristics, R = 511 Ω.
OL
OH
L
L
B. This figure includes jig and probe capacitance.
Figure 1. RESET and RESET Output Configurations
t
t
w
w
V
T
V
T
V
T
+ 2 V
5 V
2.5 V
0 V
– 2 V
RESIN
SENSE
WAVEFORMS
Figure 2. Input Pulse Definition
Voltage
Fault
V
IT+
V
IT+
V
IT–
SENSE
0 V
V
IH
Undefined
RESIN
RESET
2 V
0.8 V
V
V
IL
t
t
t
f
r
PLH
OH
90%
90%
90%
50%
10%
90%
t
t
t
t
d
d
f
d
50%
RESET
10%
r
10%
10%
10%
V
OL
t
t
PHL
Figure 3. Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
The TL7705BM is obsolete
and no longer is supplied.
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
†
TYPICAL CHARACTERISTICS
DEASSERTION TIME
vs
ASSERTION TIME
vs
LOAD RESISTANCE
LOAD RESISTANCE
700
600
500
20
18
16
V
C
C
T
= 5 V
V
= 5 V
= 0.1 µF
= 10 pF
= 25°C
CC
T
L
CC
T
L
RESET t
r
= 0.1 µF
= 10 pF
= 25°C
C
C
T
A
A
RESET t
r
RESET t
f
400
300
14
12
RESET t
f
200
100
10
8
RESET t
6
f
RESET t
2
r
0
6
0
2
4
8
10
0
4
6
8
10
R
– Load Resistance – kΩ
R
– Load Resistance – kΩ
L
L
Figure 4
Figure 5
ASSERTION TIME
vs
DEASSERTION TIME
vs
LOAD CAPACITANCE
LOAD CAPACITANCE
36
30
24
18
12
6
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
0.3
V
C
R
= 5 V
= 0.1 µF
= 4.7 kΩ
= 25°C
V
C
R
= 5 V
CC
T
L
CC
T
L
= 0.1 µF
= 4.7 kΩ
= 25°C
T
A
T
A
RESET t
r
RESET t and RESET t
f
r
RESET t
f
0
25
50
C
75
100 125 150 175 200
0
25
50
75
100 125 150 175 200
C
L
– Load Capacitance – pF
– Load Capacitance – pF
L
Figure 6
Figure 7
†
For proper operation, both RESET and RESET should be terminated with resistors of similar value. Failure to do so may cause unwanted
plateauing in either output waveform during switching.
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
The TL7705BM is obsolete
and no longer is supplied.
SLVS037M – SEPTEMBER 1989 – REVISED MAY 2003
APPLICATION INFORMATION
V
S
System Supply
8
10 kΩ
V
CC
RESET
7
2
5
6
To System
RESET
SENSE
Reset Input
(from system)
RESIN
REF
CT
1
3
R
T
To System
RESET
RESET
GND
(see text)
10 kΩ
C
0.1 µF
4
T
Figure 8. System Reset Controller With Undervoltage Sensing
When the TL770xB SENSE terminal is used to monitor V , a current-limiting resistor in series with C is
CC
T
recommended. During normal operation, the timing capacitor is charged by the onboard current source to
approximately V or an internal voltage clamp (≈7.1-V Zener), whichever is less. When the circuit then is subjected
CC
to an undervoltage condition during which V
is rapidly slewed down, the voltage on CT exceeds that on V . This
CC
CC
forward biases a secondary path internally, which falsely activates the outputs. A fault is indicated when V
drops
CC
below V
, not when V
falls below V
.
(CT)
SENSE
T–
Texas Instruments performs a 100% electrical screen to verify that the outputs do not switch with 1 mA forced into
the CT terminal. Adding the external resistor, R , prevents false triggering. Its value is calculated as follows:
T
V(
VT
–
)
CT
RT
Where:
V
V
R
= V
or 7.1 V, whichever is less
(CT)
T–
T
CC
= 4.55 V (nom)
= value of series resistor required
For V
= 5 V:
CC
5
4.55
RT
1 mA
Therefore,
RT
450
Using a 20%-tolerance resistor, R should be greater than 560 Ω.
T
Adding this series resistor changes the duration of the reset pulse by no more than 10%. R extends the discharge
T
of C , but also skews the V
threshold. These effects tend to cancel one another. The precise percentage change
T
(CT)
can be derived theoretically, but the equation is complicated by this interaction and is dependent upon the duration
of the supply-voltage fault condition.
Both outputs of the TL770xB should be terminated with similar value resistors, even when only one is being used.
This prevents unwanted plateauing in either output waveform during switching, which may be interpreted as an
undefined state or delay system reset.
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CFP
Drawing
5962-88685042A
5962-8868504HA
5962-88685052A
5962-8868505HA
5962-8868505PA
TL7702BCD
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
FK
U
20
10
20
10
8
TBD
TBD
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
LCCC
CFP
FK
U
CDIP
SOIC
JG
D
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7702BCDE4
TL7702BCDG4
TL7702BCDR
TL7702BCDRE4
TL7702BCDRG4
TL7702BCP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
D
D
D
D
D
P
P
D
D
D
D
P
P
8
8
8
8
8
8
8
8
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7702BCPE4
TL7702BID
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7702BIDE4
TL7702BIDR
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7702BIDRE4
TL7702BIP
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7702BIPE4
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7702BMFKB
TL7702BMJG
TL7702BMJGB
TL7702BMUB
TL7702BQD
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
LCCC
CDIP
CDIP
CFP
FK
JG
JG
U
20
8
TBD
TBD
TBD
TBD
TBD
TBD
TBD
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8
10
8
SOIC
SOIC
PDIP
SOIC
D
TL7702BQDR
TL7702BQP
D
8
P
8
TL7705BCD
D
8
75 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
TL7705BCDE4
TL7705BCDR
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
D
D
D
8
8
8
75 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
TL7705BCDRE4
2500 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
no Sb/Br)
TL7705BCP
TL7705BCPE4
TL7705BID
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
P
P
D
D
D
D
P
P
8
8
8
8
8
8
8
8
50
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
Pb-Free
(RoHS)
75 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
TL7705BIDE4
TL7705BIDR
TL7705BIDRE4
TL7705BIP
75 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7705BIPE4
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7705BMFKB
TL7705BMJG
TL7705BMJGB
TL7705BMUB
TL7705BQD
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
LCCC
CDIP
CDIP
CFP
FK
JG
JG
U
20
8
TBD
TBD
TBD
TBD
TBD
TBD
TBD
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8
10
8
SOIC
SOIC
PDIP
SOIC
D
75
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
TL7705BQDR
TL7705BQP
ACTIVE
D
8
2500
OBSOLETE
ACTIVE
P
8
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TL7733BCD
D
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7733BCDE4
TL7733BCDR
TL7733BCDRE4
TL7733BCP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
D
D
D
P
P
D
D
D
D
P
P
8
8
8
8
8
8
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7733BCPE4
TL7733BID
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7733BIDE4
TL7733BIDR
TL7733BIDRE4
TL7733BIP
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7733BIPE4
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
(1) The marketing status values are defined as follows:
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.063 (1,60)
0.015 (0,38)
0.020 (0,51) MIN
0.200 (5,08) MAX
0.130 (3,30) MIN
Seating Plane
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.430 (10,92)
MAX
0.010 (0,25)
M
0.015 (0,38)
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
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77061100
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