75C1406 [TI]

TRIPLE LOW-POWER DRIVERS/RECEIVERS; 三重低功耗驱动器/接收
75C1406
型号: 75C1406
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

TRIPLE LOW-POWER DRIVERS/RECEIVERS
三重低功耗驱动器/接收

驱动器
文件: 总8页 (文件大小:129K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN75C1406  
TRIPLE LOW-POWER DRIVERS/RECEIVERS  
SLLS148D – MAY 1990 – REVISED DECEMBER 1999  
D, DW, N, OR NS PACKAGE  
(TOP VIEW)  
Meet or Exceed the Requirements of  
TIA/EIA-232-F and ITU Recommendation  
V.28  
V
V
1
2
3
4
5
6
7
8
16  
15  
14  
CC  
DD  
Very Low Power Consumption . . .  
5 mW Typ  
1RY  
1DA  
1RA  
1DY  
2RA  
2DY  
3RA  
3DY  
Wide Driver Supply Voltage Range . . .  
±4.5 V to ±15 V  
13 2RY  
12 2DA  
Driver Output Slew Rate Limited to  
30 V/µs Max  
11  
10  
9
3RY  
3DA  
GND  
Receiver Input Hysteresis . . . 1000 mV Typ  
Push-Pull Receiver Outputs  
V
SS  
On-Chip Receiver 1-µs Noise Filter  
Functionally Interchangeable With Motorola  
MC145406 and Texas Instruments  
TL145406  
Package Options Include Plastic  
Small-Outline (D, DW, NS) Packages and  
(N) DIPs  
description  
TheSN75C1406isalow-powerBiMOSdevicecontainingthreeindependentdriversandreceiversthatareused  
to interface data terminal equipment (DTE) with data circuit-terminating equipment (DCE). This device is  
designed to conform to TIA/EIA-232-F. The drivers and receivers of the SN75C1406 are similar to those of the  
SN75C188 quadruple driver and SN75C189A quadruple receiver, respectively. The drivers have a controlled  
output slew rate that is limited to a maximum of 30 V/µs, and the receivers have filters that reject input noise  
pulses shorter than 1 µs. Both these features eliminate the need for external components.  
The SN75C1406 is designed using low-power techniques in a BiMOS technology. In most applications, the  
receivers contained in these devices interface to single inputs of peripheral devices such as ACEs, UARTs, or  
microprocessors. By using sampling, such peripheral devices are usually insensitive to the transition times of  
theinputsignals. Ifthisisnotthecase, orforotheruses, itisrecommendedthattheSN75C1406receiveroutputs  
be buffered by single Schmitt input gates or single gates of the HCMOS, ALS, or 74F logic families.  
The SN75C1406 is characterized for operation from 0°C to 70°C.  
logic symbol  
logic diagram, each driver and receiver  
2
4
6
3
15  
13  
11  
14  
12  
10  
1RA  
2RA  
3RA  
1DY  
1RY  
2RY  
3RY  
1DA  
2DA  
3DA  
RY  
DA  
RA  
5
7
DY  
2DY  
3DY  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN75C1406  
TRIPLE LOW-POWER DRIVERS/RECEIVERS  
SLLS148D – MAY 1990 – REVISED DECEMBER 1999  
schematics of inputs and outputs  
EQUIVALENT DRIVER INPUT  
EQUIVALENT DRIVER OUTPUT  
V
DD  
V
DD  
Internal  
1.4-V Reference  
Input  
DA  
160 Ω  
74 Ω  
Output  
DY  
V
SS  
GND  
72 Ω  
V
SS  
EQUIVALENT RECEIVER INPUT  
EQUIVALENT RECEIVER OUTPUT  
V
CC  
3.4 kΩ  
Input  
RA  
Output  
RY  
1.5 kΩ  
ESD  
Protection  
ESD  
Protection  
530 Ω  
GND  
GND  
All resistor values shown are nominal.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN75C1406  
TRIPLE LOW-POWER DRIVERS/RECEIVERS  
SLLS148D – MAY 1990 – REVISED DECEMBER 1999  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage, V  
Supply voltage, V  
Supply voltage, V  
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
DD  
SS  
CC  
Input voltage range, V : Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V to V  
I
SS  
DD  
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V to 30 V  
Output voltage range, V : Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V – 6 V) to (V + 6 V)  
O
SS  
DD  
CC  
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to (V  
+ 0.3 V)  
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W  
JA  
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W  
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W  
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W  
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150 °C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. All voltages are with respect to the network ground terminal.  
2. The package thermal impedance is calculated in accordance with JESD 51.  
recommended operating conditions  
MIN NOM  
MAX  
15  
UNIT  
Supply voltage, V  
Supply voltage, V  
Supply voltage, V  
4.5  
4.5  
4.5  
12  
12  
5
V
V
V
DD  
SS  
CC  
15  
6
Driver  
V +2  
SS  
V
DD  
Input voltage, V  
V
I
Receiver  
±25  
High-level input voltage, V  
IH  
2
V
V
Low-level input voltage, V  
0.8  
–1  
3.2  
70  
IL  
High-level output current, I  
mA  
mA  
°C  
OH  
Low-level output current, I  
OL  
Operating free-air temperature, T  
0
A
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN75C1406  
TRIPLE LOW-POWER DRIVERS/RECEIVERS  
SLLS148D – MAY 1990 – REVISED DECEMBER 1999  
DRIVER SECTION  
electrical characteristics over operating free-air temperature range, V  
CC  
= 12 V, V  
= 12 V,  
DD  
SS  
V
= 5 V ± 10% (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
4
MAX  
UNIT  
TYP  
R
R
= 3 k,  
V
DD  
V
DD  
V
DD  
V
DD  
= 5 V,  
V
SS  
V
SS  
V
SS  
V
SS  
= 5 V  
= 12 V  
= 5 V  
= 12 V  
4.5  
10.8  
V
= 0.8 V,  
L
L
IH  
See Figure 1  
V
OH  
High-level output voltage  
V
= 12 V,  
= 5 V,  
10  
= 3 kΩ,  
4.4  
–4  
Low-level output voltage  
(see Note 3)  
V
= 2 V,  
IH  
See Figure 1  
V
OL  
V
= 12 V,  
10.7  
10  
1
I
I
High-level input current  
Low-level input current  
High-level short-circuit  
V = 5 V,  
I
See Figure 2  
See Figure 2  
µA  
IH  
V = 0,  
I
–1  
IL  
I
V = 0.8 V,  
I
V
= 0 or V  
= 0 or V  
,
SS  
See Figure 1  
See Figure 1  
7.5  
7.5  
12 19.5  
mA  
mA  
OS(H)  
O
O
output current  
Low-level short-circuit  
I
V = 2 V,  
I
V
,
DD  
12  
19.5  
OS(L)  
DD  
output current  
V
V
V
V
V
= 5 V,  
V
V
V
V
= 5 V  
= 12 V  
= 5 V  
= 12 V  
115  
115  
250  
250  
No load,  
All inputs at 2 V or 0.8 V  
DD  
DD  
DD  
DD  
SS  
SS  
SS  
SS  
I
I
Supply current from V  
µA  
DD  
SS  
= 12 V,  
= 5 V,  
115 250  
115 250  
No load,  
All inputs at 2 V or 0.8 V  
Supply current from V  
Output resistance  
µA  
SS  
= 12 V,  
V
= V  
= V  
= 0,  
= 2 V to 2 V,  
O
DD  
SS  
CC  
r
300  
400  
O
See Note 4  
All typical values are at T = 25°C.  
Not more than one output should be shorted at a time.  
A
NOTES: 3. The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic  
levels only.  
4. Test conditions are those specified by TIA/EIA-232-F.  
switching characteristics at T = 25°C, V  
= 12 V, V = 12 V, V  
SS  
= 5 V ± 10%  
CC  
A
DD  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
3
UNIT  
µs  
§
§
t
t
t
t
Propagation delay time, low- to high-level output  
Propagation delay time, high- to low-level output  
1.2  
2.5  
2
PLH  
PHL  
TLH  
THL  
3.5  
3.2  
3.2  
µs  
R
= 3 kto 7 k, C = 15 pF,  
L
See Figure 3  
L
Transition time, low- to high-level output  
0.53  
0.53  
µs  
Transition time, high- to low-level output  
Transition time, low- to high-level output  
2
µs  
R
= 3 kto 7 k, C = 2500 pF,  
L
See Figure 3  
L
#
t
1
1
2
2
µs  
µs  
TLH  
THL  
R
= 3 kto 7 k, C = 2500 pF,  
L
L
#
t
Transition time, high- to low-level output  
Output slew rate  
See Figure 3  
R
= 3 kto 7 k, C = 15 pF,  
L
L
SR  
4
10  
30  
V/µs  
See Figure 3  
§
#
t
and t  
include the additional time due to on-chip slew rate and are measured at the 50% points.  
PHL  
PLH  
Measured between 10% and 90% points of output waveform  
Measured between 3-V and 3-V points of output waveform (TIA/EIA-232-F conditions) with all unused inputs tied either high or low  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN75C1406  
TRIPLE LOW-POWER DRIVERS/RECEIVERS  
SLLS148D – MAY 1990 – REVISED DECEMBER 1999  
RECEIVER SECTION  
electrical characteristics over operating free-air temperature range, V  
= 12 V, V = 12 V,  
DD  
SS  
V
= 5 V ± 10% (unless otherwise noted)  
CC  
TYP  
PARAMETER  
TEST CONDITIONS  
MIN  
MAX  
UNIT  
Positive-going input  
See Figure 5  
V
1.7  
2
2.55  
V
IT+  
IT–  
hys  
threshold voltage  
Negative-going input  
See Figure 5  
V
0.65  
600  
1
1.25  
V
threshold voltage  
Input hysteresis voltage  
V
1000  
mV  
(V )  
–V  
IT+ IT–  
V
V
= 0.75 V,  
= 0.75 V,  
I
I
= 20 µA, See Figure 5 and Note 5  
3.5  
2.8  
3.8  
4.3  
I
OH  
V
V
V
= 4.5 V  
= 5 V  
4.4  
4.9  
CC  
CC  
CC  
V
V
High-level output voltage  
V
V
OH  
= 1 mA,  
= 3.2 mA,  
I
OH  
See Figure 5  
= 5.5 V  
5.4  
Low-level output voltage  
High-level input current  
V = 3 V,  
I
I
See Figure 5  
0.17  
4.6  
0.4  
8.3  
1
OL  
OL  
V = 2.5 V  
I
3.6  
0.43  
3.6  
I
IH  
V = 3 V  
I
0.55  
–5  
mA  
V = 2.5 V  
I
8.3  
–1  
I
I
I
I
Low-level input current  
IL  
V = 3 V  
I
0.43 0.55  
High-level short-circuit  
output current  
V = 0.75 V,  
I
V
V
= 0,  
See Figure 4  
See Figure 4  
–8  
15  
25  
mA  
mA  
µA  
OS(H)  
OS(L)  
CC  
O
Low-level short-circuit  
output current  
V = V  
I
,
= V ,  
CC  
13  
CC  
O
V
V
= 5 V,  
V
V
= 5 V  
320  
320  
450  
450  
No load,  
All inputs at 0 or 5 V  
DD  
SS  
Supply current from V  
CC  
= 12 V,  
= 12 V  
DD  
SS  
All typical values are at T = 25°C.  
A
NOTE 5: If the inputs are left unconnected, the receiver interprets this as an input low and the receiver outputs remain in the high state.  
switching characteristics at T = 25°C, V  
= 12 V, V = 12 V, V  
= 5 V ± 10% (unless otherwise  
A
DD  
SS  
CC  
noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
3
MAX  
4
UNIT  
µs  
t
t
t
t
t
Propagation delay time, low- to high-level output  
Propagation delay time, high- to low-level output  
PLH  
PHL  
TLH  
THL  
w(N)  
3
4
µs  
C
= 50 pF,  
R
= 5 k,  
L
L
See Figure 6  
Transition time, low- to high-level output  
300  
100  
450  
300  
4
ns  
Transition time, high- to low-level output  
Duration of longest pulse rejected as noise  
ns  
§
C
= 50 pF,  
R
= 5 kΩ  
1
µs  
L
L
§
Measured between 10% and 90% points of output waveform  
Thereceiverignoresanypositive-ornegative-goingpulsethatislessthantheminimumvalueoft  
)andacceptsanypositive-ornegative-going  
w(N  
pulse greater than the maximum of t  
.
w(N)  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN75C1406  
TRIPLE LOW-POWER DRIVERS/RECEIVERS  
SLLS148D – MAY 1990 – REVISED DECEMBER 1999  
PARAMETER MEASUREMENT INFORMATION  
I
OS(L)  
V
DD  
V
V
V
or GND  
or GND  
DD  
V
DD  
CC  
–I  
OS(H)  
V
CC  
I
IH  
SS  
V
I
V
V
I
–I  
IL  
V
O
R
= 3 kΩ  
L
I
V
SS  
V
SS  
Figure 1. Driver Test Circuit  
Figure 2. Driver Test Circuit, I , I  
V
, V , I  
, I  
IL IH  
OH OL OS(L) OS(H)  
V
DD  
3 V  
0 V  
Input  
V
CC  
1.5  
1.5  
Input  
Pulse  
Generator  
(See Note B)  
t
t
PHL  
PLH  
90%  
V
OH  
90%  
R
C
L
L
50%  
10%  
50%  
10%  
(see Note A)  
Output  
V
OL  
V
SS  
t
t
TLH  
THL  
TEST CIRCUIT  
VOLTAGE WAVEFORMS  
NOTES: A.  
C includes probe and jig capacitance.  
L
B. The pulse generator has the following characteristics: t = 25 µs, PRR = 20 kHz, Z = 50 , t = t < 50 ns.  
w
O
r
f
Figure 3. Driver Test Circuit and Voltage Waveforms  
V
DD  
V
DD  
V
CC  
–I  
OS(H)  
V
CC  
V , V  
IT  
V
I
I
–I  
OH  
I
V
OH  
OS(L)  
V
OL  
I
OL  
V
CC  
V
SS  
V
SS  
Figure 4. Receiver Test Circuit, I  
, I  
Figure 5. Receiver Test Circuit, V , V , V  
OS(H) OS(L)  
IT OL OH  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN75C1406  
TRIPLE LOW-POWER DRIVERS/RECEIVERS  
SLLS148D – MAY 1990 – REVISED DECEMBER 1999  
PARAMETER MEASUREMENT INFORMATION  
4 V  
0 V  
V
DD  
Input  
50%  
50%  
V
Input  
CC  
Pulse  
Generator  
(See Note B)  
t
t
PHL  
PLH  
90%  
V
OH  
90%  
C
R
L
L
50%  
10%  
50%  
10%  
(see Note A)  
Output  
V
OL  
t
V
SS  
t
TLH  
THL  
VOLTAGE WAVEFORMS  
TEST CIRCUIT  
NOTES: A.  
C includes probe and jig capacitance.  
L
B. The pulse generator has the following characteristics: t = 25 µs, PRR = 20 kHz, Z = 50 , t = t < 50 ns.  
w
O
r
f
Figure 6. Receiver Test Circuit and Voltage Waveforms  
APPLICATION INFORMATION  
The TIA/EIA-232-F specification is for data interchange between a host computer and a peripheral at signaling  
rates up to 20 kbit/s. Many TIA/EIA-232-F devices will operate at higher data rates with lower capacitive loads  
(short cables). For reliable operation at greater than 20 kbit/s, the designer needs to have control of both ends  
of the cable. By mixing different types of TIA/EIA-232-F devices and cable lengths, errors can occur at higher  
frequencies (above 20 kbit/s). When operating within the TIA/EIA-232-F requirements of less than 20 kbit/s and  
with compliant line circuits, interoperability is assured. For applications operating above 20 kbit/s, the design  
engineer should consider devices and system designs that meet the TIA/EIA-232-F requirements.  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1999, Texas Instruments Incorporated  

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GRAYHILL

75CF36-01-1-04N-F

Rotary Switch, 4 Positions, Maintained, 0.2A, 30VDC, Solder Lug Terminal, Rotary Shaft Actuator, Panel Mount,
GRAYHILL

75CF36-01-1-05N

Rotary Switch, 5 Positions, SP5T, Latched, 0.2A, 30VDC, Solder Terminal, Integral Knob Type Actuator, Through Hole-straight,
GRAYHILL

75CF36-01-1-05N-C

Rotary Switch, 5 Positions, Maintained, 0.2A, 30VDC, Solder Lug Terminal, Rotary Shaft Actuator, Panel Mount,
GRAYHILL

75CF36-01-1-05N-F

Rotary Switch, 5 Positions, Maintained, 0.2A, 30VDC, Solder Lug Terminal, Rotary Shaft Actuator, Panel Mount,
GRAYHILL