74HC05 [TI]
HEX INVERTERS WITH OPEN-DRAIN OUTPUTS; 具有漏极开路输出六路反向器
| 型号： | 74HC05 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | HEX INVERTERS WITH OPEN-DRAIN OUTPUTS |
| 文件： | 总4页 (文件大小：68K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54HC05, SN74HC05
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS080B – MARCH 1984 – REVISED MAY 1997
SN54HC05 . . . J OR W PACKAGE
SN74HC05 . . . D OR N PACKAGE
(TOP VIEW)
Package Options Include Plastic
Small-Outline (D) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
1A
1Y
V
CC
1
2
3
4
5
6
7
14
13
12
11
6A
6Y
5A
2A
description
2Y
These devices contain six independent inverters.
They perform the Boolean function Y = A in
positive logic. The open-drain outputs require
pullup resistors to perform correctly. They may be
connected to other open-drain outputs to
implement active-low wired-OR or active-high
wired-AND functions.
3A
10 5Y
9
8
3Y
4A
4Y
GND
SN54HC05 . . . FK PACKAGE
(TOP VIEW)
The SN54HC05 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC05 is characterized for
operation from –40°C to 85°C.
3
2
1
20 19
18
6Y
NC
5A
2A
NC
2Y
4
5
6
7
8
17
16
FUNCTION TABLE
(each inverter)
15 NC
14
9 10 11 12 13
NC
3A
5Y
INPUT
A
OUTPUT
Y
H
L
L
H
NC – No internal connection
†
logic symbol
2
1
1
1Y
1A
2A
3A
4A
5A
6A
3
4
2Y
6
5
3Y
8
9
4Y
11
13
10
5Y
12
6Y
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
logic diagram (positive logic)
A
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HC05, SN74HC05
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS080B – MARCH 1984 – REVISED MAY 1997
†
absolute maximum ratings over operating free-air temperature range
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
CC
Output clamp current, I
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through V
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
recommended operating conditions
SN54HC05
SN74HC05
UNIT
MIN NOM
MAX
MIN NOM
MAX
V
V
Supply voltage
2
1.5
3.15
4.2
0
5
6
2
1.5
3.15
4.2
0
5
6
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
High-level input voltage
= 4.5 V
= 6 V
V
V
IH
= 2 V
0.5
1.35
1.8
0.5
1.35
1.8
V
IL
Low-level input voltage
= 4.5 V
= 6 V
0
0
0
0
V
V
Input voltage
0
V
V
0
V
V
V
V
I
CC
CC
Output voltage
0
0
O
CC
CC
V
CC
V
CC
V
CC
= 2 V
0
1000
500
400
125
0
1000
500
400
85
t
Input transition (rise and fall) time
Operating free-air temperature
= 4.5 V
= 6 V
0
0
ns
t
0
0
T
–55
–40
°C
A
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
TYP
SN54HC05
MIN MAX
SN74HC05
MIN MAX
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
MAX
0.5
I
V = V or V
IH
,
IL
V
O
= V
CC
6 V
2 V
0.01
10
0.1
5
0.1
µA
OH
I
0.002
0.001
0.001
0.17
0.1
I
= 20 µA
4.5 V
6 V
0.1
0.1
0.1
OL
V
OL
V = V or V
0.1
0.1
0.1
V
I
IH
IL
I
I
= 4 mA
4.5 V
6 V
0.26
0.26
±100
2
0.4
0.33
0.33
±1000
20
OL
= 5.2 mA
0.15
0.4
OL
I
I
V = V
I
or 0
6 V
±0.1
±1000
40
nA
µA
pF
I
CC
CC
V = V
I
or 0,
I
O
= 0
6 V
CC
C
2 V to 6 V
3
10
10
10
i
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HC05, SN74HC05
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS080B – MARCH 1984 – REVISED MAY 1997
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
60
13
10
45
9
SN54HC05
MIN MAX
SN74HC05
MIN MAX
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
CC
MIN
MAX
115
23
2 V
4.5 V
6 V
175
35
145
29
t
t
t
A
A
Y
Y
Y
ns
PLH
PHL
f
20
30
25
2 V
85
130
26
105
21
4.5 V
6 V
17
ns
ns
8
14
22
18
2 V
38
8
75
110
22
95
4.5 V
6 V
15
19
6
13
19
16
operating characteristics, T = 25°C
A
PARAMETER
Power dissipation capacitance per inverter
TEST CONDITIONS
TYP
UNIT
C
No load
20
pF
pd
PARAMETER MEASUREMENT INFORMATION
V
CC
R
= 1 kΩ
L
V
CC
Test
Point
From Output
Under Test
Input
50%
50%
0 V
C
= 50 pF
L
t
t
PLH
PHL
90%
(see Note A)
V
V
OH
In-Phase
Output
50%
10%
10%
LOAD CIRCUIT
OL
t
f
t
PHL
90%
V
t
CC
PLH
10%
90%
t
90%
V
V
OH
Input
50%
10%
50%
10%
Out-of-Phase
Output
50%
10%
0 V
OL
t
r
f
t
f
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
C includes probe and test-fixture capacitance.
L
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
相关型号：
74HC05D-Q100
HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14, 3.90 MM, PLASTIC, MS-012, SOT108-1, SOP-14
NXP
©2020 ICPDF网 联系我们和版权申明