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数据手册74ACT11520DW 概述
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74ACT11520DW 数据手册
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SCAS009B − D2957, JULY 1987 − REVISED APRIL 1993
54ACT11520 . . . J PACKAGE
74ACT11520 . . . DW OR N PACKAGE
(TOP VIEW)
• Compares Two 8-Bit Words
• Inputs Are TTL-Voltage Compatible
• Flow-Through Architecture Optimizes
PCB Layout
Q1
P1
Q0
1
2
3
4
5
6
7
8
9
10
20
G
19 P2
• Center-Pin V
and GND Configurations
Minimize High-Speed Switching Noise
CC
18
17
16
15
14
13
12
11
Q2
P3
G3
P0
• EPICt (Enhanced-Performance Implanted
GND
P = Q
G7
CMOS) 1-mm Process
V
CC
• 500-mA Typical Latch-Up Immunity at 125°C
P4
Q4
P5
Q5
• The Device Has the Equivalent of 20-kW
P7
Q6
P6
Pullup Resistors on Q Inputs
• Package Options Include Plastic
Small- Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
54ACT11520 . . . FK PACKAGE
(TOP VIEW)
description
These identity comparators perform comparisons
on two 8-bit binary or BCD words. Features
include 20-kΩ pullup termination resistors on the
Q inputs for analog or switch data and a P = Q
totem-pole output.
3
2
1
20 19
18
Q4
P5
Q5
P6
Q6
P2
G
4
5
6
7
8
17
16
15
14
Q1
P1
Q0
The 54ACT11520 is characterized for operation
over the full military temperature range of − 55°C
to 125°C. The 74ACT11520 is characterized for
operation from − 40°C to 85°C.
9 10 11 12 13
FUNCTION TABLE
INPUTS
OUTPUT
P = Q
DATA
P, Q
ENABLE
G
P = Q
P > Q
P < Q
X
L
L
L
H
H
H
L
H
EPIC is a trademark of Texas Instruments Incorporated.
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Copyright 1993, Texas Instruments Incorporated
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2−1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001
ꢀ ꢁꢂ ꢃ ꢄ ꢅꢅ ꢀꢆ ꢇ ꢈ ꢉ ꢊ ꢁꢂ ꢃꢄ ꢅꢅ ꢀ ꢆꢇ
ꢋ ꢌꢍ ꢎ ꢄ ꢉꢎ ꢏ ꢐꢑ ꢄ ꢎ ꢄꢒꢉ ꢃꢓ ꢔꢕꢂꢖ ꢂꢄꢓ ꢖꢗ
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SCAS009B − D2957, JULY 1987 − REVISED APRIL 1993
†
logic symbol
logic diagram (positive logic)
8
20
4
COMP
P7
G
P0
P1
P2
P3
P4
P5
P6
P7
G1
0
7
Q7
2
19
17
14
12
10
8
10
P6
P
9
Q6
12
P5
7
0
6
11
Q5
1P = Q
P = Q
3
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
1
14
P4
18
16
13
11
9
13
Q4
Q
17
P3
6
P = Q
16
Q3
7
7
19
P2
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
18
Q2
2
P1
1
Q1
4
P0
3
Q0
20
G
Pin numbers shown are for the DW, J, and N packages.
schematic of Q inputs
V
CC
Input
GND
2−2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001
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SCAS009B − D2957, JULY 1987 − REVISED APRIL 1993
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
+ 0.5 V
20 mA
50 mA
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
recommended operating conditions
54ACT11520
74ACT11520
UNIT
MIN
NOM
MAX
MIN
4.5
2
NOM
MAX
V
V
V
V
V
Supply voltage
4.5
2
5
5.5
5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input voltage
0.8
0.8
V
0
0
V
V
0
0
V
V
V
I
CC
CC
Output voltage
V
O
CC
CC
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
−24
24
−24
24
mA
mA
ns/V
°C
OH
OL
Dt/Dv
0
10
0
10
T
−55
125
−55
85
A
2−3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001
ꢀ ꢁꢂ ꢃ ꢄ ꢅꢅ ꢀꢆ ꢇ ꢈ ꢉ ꢊ ꢁꢂ ꢃꢄ ꢅꢅ ꢀ ꢆꢇ
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SCAS009B − D2957, JULY 1987 − REVISED APRIL 1993
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
54ACT11520
74ACT11520
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
4.4
TYP
MAX
MIN
4.4
MAX
MIN
4.4
5.4
3.8
4.8
MAX
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
I
I
= − 50 mA
OH
5.4
5.4
3.94
4.94
3.7
= − 24 mA
V
OH
V
OH
4.7
{
{
3.85
I
I
= − 50 mA
OH
3.85
= − 75 mA
OH
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50 mA
OL
OL
0.36
0.36
0.5
0.44
0.44
I
= 24 mA
V
OL
V
0.5
{
1.65
I
I
= 50 mA
OL
{
1.65
10
= 75 mA
OL
I
IH
I
IL
I
I
V = V
CC
,
Q inputs only
10
− 0.6
0.1
10
− 1
1
mA
mA
mA
I
V = GND, Q inputs only
− 0.3
2.3
− 1
1
I
V = V
or GND, P and G inputs only
I
CC
Q inputs at GND,
5.5 V
5.5 V
4.8
8
8
8
mA
mA
Other inputs V = V
I
or GND
or GND
CC
I
CC
Q inputs at open,
160
80
Other inputs V = V
I
CC
Q inputs open,
One input at 3.4 V and other inputs at
or GND, P and G inputs only
5.5 V
5 V
0.9
1
1
mA
pF
DI
CC
V
CC
V = V or GND
CC
C
3.5
i
I
†
‡
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V
.
CC
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
8.6
54ACT11520
74ACT11520
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
ns
MIN
1.5
1.5
1.5
1.5
MAX
12.7
12.4
8.5
MIN
1.5
1.5
1.5
1.5
MAX
15.4
14.8
10.2
10.4
MIN
1.5
1.5
1.5
1.5
MAX
14.3
13.9
9.5
t
t
t
t
PLH
PHL
PLH
PHL
P = Q
P = Q
P or Q
G
8
6.4
ns
5.8
9
9.8
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
UNIT
C
Power dissipation capacitance
C
40
pF
pd
2−4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001
ꢀ ꢁ ꢂꢃꢄ ꢅꢅ ꢀ ꢆ ꢇ ꢈꢉ ꢊ ꢁꢂ ꢃꢄ ꢅꢅꢀ ꢆꢇ
ꢋ ꢌꢍꢎ ꢄꢉ ꢎꢏꢐ ꢑꢄ ꢎꢄ ꢒꢉꢃ ꢓꢔ ꢕꢂ ꢖꢂꢄꢓ ꢖꢗ
ꢘ
SCAS009B − D2957, JULY 1987 − REVISED APRIL 1993
PARAMETER MEASUREMENT INFORMATION
3 V
0 V
Input
(see Note B)
1.5 V
1.5 V
From Output
Under Test
t
t
PHL
PLH
C
= 50 pF
L
500 Ω
(see Note A)
V
OH
CC
50% V
CC
50% V
Output
V
OL
VOLTAGE WAVEFORMS
LOAD CIRCUIT
NOTES: A.
C includes probe and jig capacitance.
L
B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
TYPICAL CHARACTERISTICS
Q INPUT CURRENT
vs
INPUT VOLTAGE
0
V
T
A
= 5 V
= 25°C
CC
− 50
− 100
− 150
− 200
− 250
− 300
0
1
2
3
4
5
6
V − Input Voltage − V
I
Figure 2
2−5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001
2−6
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74ACT11520DW 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| 74ACT11520DWR | TI | 暂无描述 | 获取价格 |
|
| 74ACT11520N | TI | 8-Bit Identity Comparators 20-PDIP -40 to 85 | 获取价格 |
|
| 74ACT11520N | PHILIPS | Identity Comparator, CMOS, PDIP20 | 获取价格 |
|
| 74ACT11520N | YAGEO | Identity Comparator, ACT Series, 8-Bit, Inverted Output, CMOS, PDIP20 | 获取价格 |
|
| 74ACT11521 | TI | 8-BIT IDENTITY COMPARATORS | 获取价格 |
|
| 74ACT11521D | YAGEO | Identity Comparator, ACT Series, 8-Bit, Inverted Output, CMOS, PDSO20 | 获取价格 |
|
| 74ACT11521D-T | YAGEO | Identity Comparator, ACT Series, 8-Bit, Inverted Output, CMOS, PDSO20 | 获取价格 |
|
| 74ACT11521DBLE | TI | 8-BIT IDENTITY COMPARATORS | 获取价格 |
|
| 74ACT11521DBLE | ROCHESTER | Identity Comparator, ACT Series, 8-Bit, Inverted Output, CMOS, PDSO20, PLASTIC, SSOP-20 | 获取价格 |
|
| 74ACT11521DBR | TI | ACT SERIES, 8-BIT IDENTITY COMPARATOR, INVERTED OUTPUT, PDSO20, PLASTIC, SSOP-20 | 获取价格 |
|
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