74ACT11470 [TI]
8-BIT REGISTERED BUS TRANSCEIVERS WITH 3-STATE OUTPUTS; 具有三态输出的8位寄存总线收发器
| 型号： | 74ACT11470 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 8-BIT REGISTERED BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| 文件： | 总7页 (文件大小：125K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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SCAS207 − D4016, APRIL 1993
54ACT11470 . . . JT PACKAGE
74ACT11470 . . . DW PACKAGE
(TOP VIEW)
• Inputs Are TTL-Voltage Compatible
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin V
and GND Configuration
Minimizes High-Speed Switching Noise
CC
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CEBA
A1
OEBA
CLKBA
B1
B2
B3
2
• EPIC (Enhanced-Performance Implanted
3
A2
A3
A4
GND
GND
GND
GND
A5
CMOS) 1-µm Process
4
• 500-mA Typical Latch-Up Immunity
at 125°C
• Package Options Include Plastic Small-
Outline Packages, Ceramic Chip Carriers,
and Standard Ceramic 300-mil DIPs
5
6
B4
7
V
CC
8
V
CC
9
B5
B6
B7
B8
CLKAB
OEAB
10
11
12
13
14
description
A6
A7
A8
The ′ACT11470 is an 8-bit registered bus
transceiver that contains two sets of D-type
flip-flops for temporary storage of data flowing in
either direction. Separate clock (CLKAB or
CLKBA) and output-enable (OEAB or OEBA)
inputs are provided for each register to permit
independent control in either direction of data flow.
CEAB
54AC11470 . . . FK PACKAGE
(TOP VIEW)
The A-to-B enable (CEAB) input must be low in
order to enter data from A or to output data to B.
If both CEAB and CLKAB are low, then the B port
presents the level of the A port prior to the most
recent low-to-high transition of CLKAB. Data flow
from B to A is similar, but requires the use of
CEBA, CLKBA, and OEBA inputs.
4
3
2 1 28 27 26
5
6
7
8
9
B1
25
24
23
22
21
20
B7
B8
CLKAB
OEAB
CEAB
A8
CLKBA
OEBA
CEBA
A1
A2
A3
10
11
To avoid false clocking of the flip-flops, CEAB and
CEBA should not be switched from low to high
while CLK is low.
19 A7
12 13 14 15 16 17 18
The 54ACT11470 is characterized for operation
over the full military temperature range of −55°C
to 125°C. The 74ACT11470 is characterized for
operation from −40°C to 85°C.
†
FUNCTION TABLE
INPUTS
OUTPUT
B
CEAB
CLKAB
OEAB
A
H
X
L
L
L
X
X
L
X
H
L
X
Z
Z
X
X
L
‡
B
0
L
↑
↑
L
L
H
H
†
‡
A-to-B data flow is shown: B-to-A flow is similar but
uses CEBA, CLKBA, and OEBA.
Output level before the indicated steady-state input
conditions were established.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1993, Texas Instruments Incorporated
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2−1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001
ꢀ ꢁꢂ ꢃ ꢄ ꢅꢅ ꢁꢆ ꢇ ꢈ ꢉ ꢆ ꢁꢂ ꢃꢄ ꢅꢅ ꢁ ꢆꢇ
ꢊ ꢋꢌ ꢍ ꢄ ꢉꢎ ꢏꢐꢍ ꢑꢄꢏ ꢎꢏ ꢒꢉ ꢌ ꢓ ꢑꢉ ꢄ ꢎꢂꢔ ꢑ ꢃꢏꢍ ꢕꢏꢎꢑ
ꢖꢍ ꢄ ꢗ ꢉꢘ ꢋꢑ ꢄꢂꢄꢏ ꢉ ꢙ ꢓꢄ ꢚꢓꢄ ꢑ
ꢛ
SCAS207 − D4016, APRIL 1993
†
logic symbol
logic diagram (positive logic)
28
28
OEBA
EN3
G1
OEBA
CEBA
1
1
CEBA
27
15
14
16
27
CLKBA
1C5
CLKBA
15
EN4
G2
OEAB
OEAB
14
CEAB
CEAB
CLKAB
2C6
16
CLKAB
2
26
A1
5D
4
B1
3
C1
1D
2
26
A1
6D
B1
3
25
24
23
20
19
18
17
A2
A3
A4
A5
A6
A7
A8
B2
B3
B4
B5
B6
B7
B8
C1
1D
4
5
10
11
12
13
To Seven Other Channels
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, and NT packages.
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
200 mA
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2−2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001
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SCAS207 − D4016, APRIL 1993
recommended operating conditions (see Note 2)
54ACT11470
MIN NOM
74ACT11470
MIN NOM
UNIT
MAX
MAX
V
V
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input voltage
0.8
0.8
V
0
0
V
V
0
0
V
V
V
I
CC
CC
Output voltage
V
O
CC
CC
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
−24
24
−24
24
mA
mA
ns/V
°C
OH
OL
∆t/∆v
0
10
0
10
T
−55
125
−40
85
A
NOTE 2: Unused or floating pins (input or I/O) must be held high or low.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
54ACT11470
74ACT11470
PARAMETER
TEST CONDITIONS
= −50 µA
V
UNIT
CC
MIN
4.4
TYP
MAX
MIN
4.4
MAX
MIN
4.4
5.4
3.8
4.8
MAX
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
I
I
OH
5.4
5.4
3.94
4.94
3.7
V
OH
= − 24 mA
V
OH
4.7
†
I
I
= −ā 50 mA
3.85
OH
†
= −75 mA
3.85
OH
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50 µA
OL
OL
0.36
0.36
0.5
0.44
0.44
V
OL
I
= 24 mA
V
0.5
†
†
I
I
= 50 mA
1.65
OL
= 75 mA
1.65
1
OL
I
I
I
Control inputs V = V
or GND
0.1
0.5
8
1
10
µA
µA
µA
I
I
CC
‡
A or B ports
V
= V
or GND
5
OZ
CC
O
CC
V = V
or GND,
I
O
= 0
160
80
I
CC
One input at 3.4 V,
Other inputs at V
§
5.5 V
0.9
1
1
mA
∆I
CC
or GND
CC
or GND
C
C
Control inputs V = V
CC
5 V
5 V
4.5
12
pF
pF
i
I
A or B ports
V
O
= V or GND
CC
io
†
‡
§
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
For I/O ports, the parameter I includes the input leakage current.
OZ
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V
.
CC
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2−3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001
ꢀ ꢁꢂ ꢃ ꢄ ꢅꢅ ꢁꢆ ꢇ ꢈ ꢉ ꢆ ꢁꢂ ꢃꢄ ꢅꢅ ꢁ ꢆꢇ
ꢊ ꢋꢌ ꢍ ꢄ ꢉꢎ ꢏꢐꢍ ꢑꢄꢏ ꢎꢏ ꢒꢉ ꢌ ꢓ ꢑꢉ ꢄ ꢎꢂꢔ ꢑ ꢃꢏꢍ ꢕꢏꢎꢑ
ꢖꢍ ꢄ ꢗ ꢉꢘ ꢋꢑ ꢄꢂꢄꢏ ꢉ ꢙ ꢓꢄ ꢚꢓꢄ ꢑ
ꢛ
SCAS207 − D4016, APRIL 1993
timing requirements over recommended operating free-air temperature range, V
(unless otherwise noted) (see Figure 1)
= 5 V 0.5 V
CC
T
= 25°C
54ACT11470
74ACT11470
A
UNIT
MIN
0
MAX
MIN
0
MAX
MIN
0
MAX
f
t
Clock frequency
Pulse duration
90
90
90
MHz
ns
clock
CLK high or low
5.5
2
5.5
2
5.5
2
w
Data before CLK↑
t
Setup time
Hold time
ns
ns
su
h
Data before CEAB↑ or CEBA↑
Data after CLK↑
2
2
2
3
3
3
t
Data after CEAB↑ or CEBA↑
3
3
3
switching characteristics over recommended operating free-air temperature range,
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
54ACT11470
74ACT11470
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
90
TYP
MAX
MIN
90
MAX
MIN
90
MAX
f
t
t
t
t
t
t
t
t
t
t
MHz
max
PLH
PHL
PZH
PZL
PHZ
PLZ
PZH
PZL
PHZ
PLZ
3.4
4.2
3
7.3
8.3
7
9
10.2
9.5
3.4
4.2
3
10.7
12
3.4
4.2
3
10.1
11.4
10.5
13.7
10.5
10.2
11.1
14.2
10.9
10.7
CLKAB or CLKBA
OEAB or OEBA
OEAB or OEBA
CEAB or CEBA
CEAB or CEBA
A or B
B or A
B or A
B or A
B or A
ns
ns
ns
ns
ns
11.5
15
4.3
4.5
5.1
3.4
4.6
4.8
5.1
8.6
7.9
7.7
7.3
9
11.4
9.6
4.3
4.5
5.1
3.4
4.6
4.8
5.1
4.3
4.5
5.1
3.4
4.6
4.8
5.1
11
9.5
10.7
12
10
11.9
9.9
15.5
11.4
11.2
7.9
7.9
9.8
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
UNIT
Outputs enabled
Outputs disabled
41
27
C
Power dissipation capacitance per transceiver
C
pF
pd
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ꢣ ꢞꢨ ꢧ ꢲꢦ ꢢꢪ ꢡꢟ ꢠ ꢣ ꢢꢧ ꢝꢟ ꢧꢤꢦ ꢝ ꢞꢦ ꢠ ꢦ ꢫꢪ ꢢꢡ ꢤꢣꢝ ꢠ ꢰ ꢟꢝꢞ ꢢꢤꢝ ꢧꢢꢝ ꢟꢣꢦ ꢮ
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POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001
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ꢊ ꢋꢌꢍ ꢄꢉ ꢎꢏꢐ ꢍ ꢑꢄ ꢏꢎꢏꢒ ꢉꢌ ꢓꢑꢉꢄ ꢎ ꢂꢔꢑꢃ ꢏꢍ ꢕ ꢏꢎ
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SCAS207 − D4016, APRIL 1993
PARAMETER MEASUREMENT INFORMATION
2 × V
CC
TEST
S1
S1
t
/t
Open
PLH PHL
/t
500 Ω
Open
GND
From Output
Under Test
t
2 × V
CC
GND
PLZ PZL
t
/t
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
LOAD CIRCUIT
3 V
0 V
Timing Input
(see Note B)
1.5 V
t
w
t
h
t
3 V
su
3 V
0 V
Input
1.5 V
1.5 V
1.5 V
1.5 V
Data Input
0 V
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
Output
Control
(low-level
enabling)
3 V
0 V
3 V
0 V
Input
(see Note B)
1.5 V
1.5 V
1.5 V
1.5 V
t
PZL
t
t
PHL
PLH
t
PLZ
Output
Waveform 1
V
OH
[ V
CC
In-Phase
Output
50% V
50% V
CC
50% V
50% V
CC
V
CC
20% V
S1 at 2 × V
(see Note C)
CC
CC
V
OL
OL
t
PHZ
t
PLH
t
t
PHL
PZH
Output
Waveform 2
S1 at GND
V
OH
V
OH
Out-of-Phase
Output
80% V
CC
50% V
50% V
CC
CC
CC
[ 0 V
V
OL
(see Note C)
VOLTAGE WAVEFORMS
NOTES: A. C includes probe and jig capacitance.
VOLTAGE WAVEFORMS
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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