74ACT11238DR [TI]
3-Line To 8-Line Decoders/Demultiplexers 16-SOIC -40 to 85;
| 型号： | 74ACT11238DR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 3-Line To 8-Line Decoders/Demultiplexers 16-SOIC -40 to 85 解复用器 |
| 文件： | 总7页 (文件大小：96K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74ACT11238
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
SCAS054 – NOVEMBER 1988 – REVISED APRIL 1993
D OR N PACKAGE
(TOP VIEW)
• Designed Specifically for High-Speed
Memory Decoders and Data Transmission
Systems
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Y0
A
B
Y1
Y2
Y3
GND
Y4
Y5
• Noninverting Version of ′ACT11138
• Incorporates 3 Enable Inputs to Simplify
Cascading and/or Data Reception
C
V
• Inputs Are TTL-Voltage Compatible
CC
G1
G2A
G2B
• Flow-Through Architecture Optimizes
Y6
Y7
PCB Layout
• Center-Pin V
and GND Configurations
Minimize High-Speed Switching Noise
CC
• EPIC (Enhanced-Performance Implanted
CMOS) 1- m Process
• 500-mA Typical Latch-Up Immunity
at 125°C
• Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
description
The 74ACT11238 circuit is designed to be used in high-performance memory-decoding or data-routing
applications requiring very short propagation delay times. In high-performance memory systems, this decoder
can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing
a fast enable circuit, the delay times of this decoder and the enable time of the memory are usually less than
the typical access time of the memory. This means that the effective system delay introduced by the decoder
is negligible.
The conditions at the binary select inputs and the three enable inputs select one of eight input lines. Two
active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.
A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one
inverter. An enable input can be used as a data input for demultiplexing applications.
The 74ACT11238 is characterized for operation from – 40°C to 85°C.
FUNCTION TABLE
ENABLE
INPUTS
SELECT
INPUTS
OUTPUTS
G1
X
G2A
H
X
X
L
G2B
X
H
X
L
C
X
X
X
L
B
X
X
X
L
A
X
X
X
L
Y0
L
Y1
L
Y2
L
Y3
L
Y4
L
Y5
L
Y6
L
Y7
L
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
L
L
L
L
L
H
H
L
L
H
L
L
L
L
L
L
L
L
L
H
L
L
L
H
L
L
L
L
L
L
L
H
H
H
H
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
H
L
L
L
L
L
H
H
L
L
L
L
L
H
L
L
L
L
H
L
L
L
L
L
L
H
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74ACT11238
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
SCAS054 – NOVEMBER 1988 – REVISED APRIL 1993
†
logic symbols (alternatives)
BIN/OCT
DMUX
15
14
13
16
1
15
14
13
16
1
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
1
2
4
0
2
A
B
C
A
B
C
0
7
G
2
3
5
6
7
8
2
3
5
6
7
8
&
&
11
10
9
G1
11
10
9
G1
G2A
EN
G2A
G2B
G2B
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
16
1
Y0
Y1
15
A
14
B
2
3
5
6
7
8
Y2
Y3
Y4
Y5
Y6
Y7
13
C
11
G1
10
G2A
9
G2B
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74ACT11238
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
SCAS054 – NOVEMBER 1988 – REVISED APRIL 1993
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Continuous current through V
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
recommended operating conditions
NOM NOM
4.5
MAX
UNIT
V
V
V
V
V
V
Supply voltage
5.5
CC
IH
IL
High-level input voltage
Low-level input voltage
Input voltage
2
V
0.8
V
0
0
V
V
V
I
CC
Output voltage
V
O
CC
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
–24
24
mA
mA
ns/V
°C
OH
OL
t/ v
0
10
T
– 40
85
A
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
PARAMETER
TEST CONDITIONS
V
MIN
MAX
UNIT
CC
MIN
4.4
TYP
MAX
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5 V
4.4
5.4
I
= – 50 A
OH
5.4
V
3.94
4.94
3.8
V
OH
OL
I
I
I
= – 24 mA
= – 75 mA
OH
OH
OL
4.8
‡
3.85
0.1
0.1
0.1
0.1
= 50
A
V
0.36
0.36
0.44
0.44
1.65
± 0.1
40
V
I
I
= 24 mA
= 75 mA
OL
‡
OL
I
I
V = V
or GND
or GND,
or GND
or GND
± 0.1
4
A
mA
mA
pF
I
I
CC
CC
CC
CC
V = V
I
= 0
O
CC
I
§
I
V = V
0.9
1
CC
I
C
V = V
3.5
i
I
‡
§
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V to V
.
CC
2–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74ACT11238
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
SCAS054 – NOVEMBER 1988 – REVISED APRIL 1993
switching characteristics, V
= 5 V ± 0.5 V (see Figure 1)
CC
T
A
= 25°C
TYP
5
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
ns
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
8.6
t
t
t
t
t
t
1.5
1.5
1.5
1.5
1.5
1.5
9.6
10.8
9.4
PLH
PHL
PLH
PHL
PLH
PHL
A, B or C
Y
Y
Y
5.7
6
9.7
8.4
G1
ns
6.9
5.9
7.8
10.2
9
11.4
10.1
12.1
ns
G2A, G2B
10.7
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
Power dissipation capacitance per gate
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
UNIT
C
C
57
pF
pd
PARAMETER MEASUREMENT INFORMATION
3 V
0 V
Input
1.5 V
1.5 V
From Output
Under Test
(see Note B)
t
t
PHL
PLH
C
= 50 pF
L
500 Ω
(see Note A)
V
OH
CC
50% V
50% V
CC
Output
V
OL
VOLTAGE WAVEFORMS
LOAD CIRCUIT
NOTES: A.
C includes probe and jig capacitance.
L
B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
2–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74ACT11238
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
SCAS054 – NOVEMBER 1988 – REVISED APRIL 1993
TYPICAL APPLICATION DATA
74ACT11238
BIN/OCT
16
1
15
14
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
1
2
2
13
3
4
11
10
9
5
&
V
CC
6
EN
7
8
74ACT11238
BIN/OCT
16
1
15
14
0
1
2
3
4
5
6
7
8
A0
A1
A2
1
2
9
2
10
11
12
13
14
15
13
3
4
11
10
9
5
&
A3
A4
6
EN
7
8
74ACT11238
BIN/OCT
16
1
15
14
0
1
2
3
4
5
6
7
16
17
18
19
20
21
22
23
1
2
2
13
3
4
11
10
9
5
&
6
EN
7
8
Figure 2. 24-Bit Decoding Scheme
2–5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74ACT11238
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
SCAS054 – NOVEMBER 1988 – REVISED APRIL 1993
TYPICAL APPLICATION DATA
74ACT11238
BIN/OCT
16
1
15
14
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
A0
A1
A2
1
2
2
13
3
4
11
10
9
5
&
V
CC
6
A3
EN
7
A4
8
74ACT11238
BIN/OCT
16
1
15
14
0
1
2
3
4
5
6
7
8
1
2
9
2
10
11
12
13
14
15
13
3
4
11
10
9
5
&
6
EN
7
8
74ACT11238
BIN/OCT
16
1
15
14
0
1
2
3
4
5
6
7
16
17
18
19
20
21
22
23
1
2
2
13
3
4
11
10
9
5
&
6
EN
7
8
74ACT11238
BIN/OCT
16
1
15
14
0
1
2
3
4
5
6
7
24
25
26
27
28
29
30
31
1
2
2
13
3
4
11
10
9
5
&
6
EN
7
8
Figure 3. 32-Bit Decoding Scheme
2–6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
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Copyright 1998, Texas Instruments Incorporated
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