74AC11175N [TI]
QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR;
| 型号： | 74AC11175N |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR 逻辑集成电路 |
| 文件： | 总7页 (文件大小：119K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
54AC11175, 74AC11175
QUADRUPLE D-TYPE FLIP-FLOPS
WITH CLEAR
SCAS090 – DECEMBER 1989 – REVISED APRIL 1993
54AC11175 . . . J PACKAGE
74AC11175 . . . DW or N PACKAGE
• Applications Include: Buffer/Storage
Registers, Shift Registers, Pattern
Generators
(TOP VIEW)
• Flow-Through Architecture Optimizes
1Q
2Q
2Q
GND
GND
GND
GND
3Q
1Q
CLR
1D
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
PCB Layout
• Center-Pin V
and GND Configurations
Minimize High-Speed Switching Noise
CC
2D
• EPIC (Enhanced-Performance Implanted
V
V
CC
CC
CMOS) 1- m Process
3D
4D
CLK
4Q
• 500-mA Typical Latch-Up Immunity at 125°C
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
3Q
4Q
54AC11014 . . . FK PACKAGE
(TOP VIEW)
description
These positive-edge-triggered flipflops implement
D-type flip-flop logic with a direct clear input.
Information at the D inputs that meets the setup
time requirements is transferred to the outputs on
the positive-going edge of the clock pulse. Clock
triggering occurs at a particular voltage level and
is not directly related to the transition time of the
positive-going pulse. When the clock input is at
either the high or low level, the D input signal has
no effect at the output.
3
2
1
20 19
18 4D
CLR
1Q
1Q
2Q
2Q
4
5
6
7
8
17
16
15
14
CLK
4Q
4Q
3Q
9 10 11 12 13
The 54AC11175 is characterized for operation
over the full military temperature range of – 55°C
to 125°C. The 74AC11175 is characterized for
operation from – 40°C to 85°C.
FUNCTION TABLE
(each flip-flop)
INPUTS OUTPUTS
CLR
L
CLK
D
X
H
L
Q
L
Q
H
L
X
↑
H
H
L
H
↑
H
H
L
X
Q
Q
0
0
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1993, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54AC11175, 74AC11175
QUADRUPLE D-TYPE FLIP-FLOPS
WITH CLEAR
SCAS090 – DECEMBER 1989 – REVISED APRIL 1993
†
logic symbol
logic diagram (positive logic)
19
19
CLR
R
CLR
CLK
12
C1
12
18
CLK
1D
20
1
1Q
1Q
2Q
2Q
18
1D
2D
1D
20
1
1D
C1
1Q
1Q
2
3
8
17
14
13
R
3Q
17
2
3
3D
4D
1D
2D
3D
4D
2Q
2Q
9
3Q
4Q
C1
10
R
11
4Q
14
13
8
9
1D
3Q
3Q
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the DW, J and N packages.
C1
R
10
11
1D
4Q
4Q
C1
R
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54AC11175, 74AC11175
QUADRUPLE D-TYPE FLIP-FLOPS
WITH CLEAR
SCAS090 – DECEMBER 1989 – REVISED APRIL 1993
recommended operating conditions
54AC11175
MIN NOM
74AC11175
MIN NOM
UNIT
MAX
MAX
V
V
Supply voltage
3
2.1
5
5.5
3
2.1
5
5.5
V
CC
V
V
V
V
V
V
V
= 3 V
CC
CC
CC
CC
CC
CC
CC
High-level input voltage
= 4.5 V
= 5.5 V
= 3 V
3.15
3.85
3.15
3.85
V
V
IH
0.9
1.35
1.65
–4
0.9
1.35
1.65
–4
V
IL
Low-level input voltage
High-level output current
Low-level output current
= 4.5 V
= 5.5 V
= 3 V
I
VCC = 4.5 V
–24
–24
–24
–24
mA
mA
OH
OL
V
CC
V
CC
V
CC
V
CC
= 5.5 V
= 3 V
12
24
24
12
24
24
I
= 4.5 V
= 5.5 V
V
V
Input voltage
0
0
V
V
0
0
V
V
V
V
I
CC
CC
Output voltage
O
CC
10
CC
10
t/ v
Input transition rise or fall rate
Operating free-air temperature
0
0
ns/V
°C
T
A
–55
125
–40
85
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
54AC11175
74AC11175
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
2.9
TYP
MAX
MIN
2.9
4.4
5.4
2.4
3.7
4.7
3.85
MAX
MIN
2.9
MAX
3 V
4.5 V
5.5 V
3 V
I
= – 50
A
4.4
4.4
OH
5.4
5.4
I
I
= – 4 mA
2.58
3.94
4.94
2.48
3.8
OH
V
OH
V
4.5 V
5.5 V
5.5 V
5.5V
3 V
= – 24 mA
OH
4.8
I
I
= – 50 mA
= – 75 mA
OH
3.85
OH
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50
A
4.5 V
5.5 V
3 V
OL
0.1
0.1
0.1
I
I
= 12 mA
= 24 mA
0.36
0.36
0.36
0.5
0.44
0.44
0.44
OL
V
OL
V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5 V
0.5
OL
0.5
I
I
= 50 mA
= 75 mA
1.65
OL
1.65
±1
OL
I
I
V = V
or GND
or GND,
or GND
±0.1
±1
A
A
I
I
CC
CC
CC
V = V
I = 0
O
8
160
80
CC
I
C
V = V
4
pF
i
I
†
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
2–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54AC11175, 74AC11175
QUADRUPLE D-TYPE FLIP-FLOPS
WITH CLEAR
SCAS090 – DECEMBER 1989 – REVISED APRIL 1993
timing requirements over recommended operating free-air temperature range, V
(unless otherwise noted) (see Figure 1)
= 3.3 V ± 0.3 V
CC
T
= 25°C
54AC11175
74AC11175
A
UNIT
MHz
ns
MIN
0
MAX
MIN
0
MAX
90
MIN
0
MAX
90
f
t
Clock frequency
Pulse duration
90
clock
CLR low
5.5
5.5
8
5.5
5.5
8
5.5
5.5
8
w
CLK high or low
Data
t
t
ns
ns
Setup time before CLK↑
su
CLR inactive
8
8
8
Hold time, data after CLK↑
0.5
0.5
0.5
h
timing requirements over recommended operating free-air temperature range, V
(unless otherwise noted) (see Figure 1)
= 5 V ± 0.5 V
CC
T
= 25°C
54AC11175
74AC11175
A
UNIT
MHz
ns
MIN
0
MAX
MIN
0
MAX
125
MIN
0
MAX
125
f
t
Clock frequency
Pulse duration
125
clock
CLR low
4
4
4
w
CLK high or low
Data
4
4
4
5.5
5.5
0.5
5.5
5.5
0.5
5.5
5.5
0.5
t
t
ns
ns
Setup time before CLK↑
su
CLR inactive
Hold time, data after CLK↑
h
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
120
7
54AC11175
74AC11175
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MHz
ns
MIN
90
MAX
MIN
90
MAX
MIN
90
MAX
f
t
max
Any Q
Any Q
Any Q
Any Q
Any Q
Any Q
Any Q
Any Q
2.6
2.6
2.5
2.5
2.4
2.4
1.7
1.7
8.7
8.7
2.6
2.6
2.5
2.5
2.4
2.4
1.7
1.7
9.9
9.9
13
2.6
2.6
2.5
2.5
2.4
2.4
1.7
1.7
9.3
9.3
CLR
CLR
CLK
CLK
PLH
PHL
PLH
PHL
7
10
11.6
11.6
8.7
12.4
12.4
9.1
t
t
t
ns
ns
ns
10
13
6.8
6.8
9.4
9.4
9.4
9.4
13
8.7
9.1
11.7
11.7
12.5
12.5
13
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
2–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
54AC11175, 74AC11175
QUADRUPLE D-TYPE FLIP-FLOPS
WITH CLEAR
SCAS090 – DECEMBER 1989 – REVISED APRIL 1993
switching characteristics over recommended operating free-air temperature range,
V
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
150
4.5
54AC11175
74AC11175
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MHz
ns
MIN
125
2.2
2.2
2.4
2.4
2.2
2.2
1.9
1.9
MAX
MIN
125
2.2
2.2
2.4
2.4
2.2
2.2
1.9
1.9
MAX
MIN
125
2.2
2.2
2.4
2.4
2.2
2.2
1.9
1.9
MAX
f
t
max
Any Q
Any Q
Any Q
Any Q
Any Q
Any Q
Any Q
Any Q
6.3
6.3
8.5
8.5
6.3
6.3
8.5
8.5
7.1
7.1
9.7
9.7
7.2
7.2
9.7
9.7
6.8
6.8
9.3
9.3
6.9
6.9
9.3
9.3
CLR
CLR
CLK
CLK
PLH
PHL
PLH
PHL
4.5
6.7
t
t
t
ns
ns
ns
6.7
4.5
4.5
6.4
6.4
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
UNIT
C
Power dissipation capacitance
C
48
pF
pd
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
t
w
V
CC
C
= 50 pF
L
500 Ω
(see Note A)
Input
50%
50%
0 V
VOLTAGE WAVEFORMS
LOAD CIRCUIT
V
CC
Input
(see Note B)
50%
50%
0 V
V
CC
Timing Input
(see Note B)
t
t
PHL
PLH
50%
V
OH
0 V
In-Phase
Output
50% V
CC
t
50% V
50% V
h
CC
t
V
OL
su
V
CC
t
PLH
t
50%
50%
PHL
Data Input
0 V
V
OH
Out-of-Phase
Output
50% V
CC
CC
V
OL
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
NOTES: A. C includes probe and jig capacitance.
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
2–5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–6
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
相关型号：
74AC11190D-T
Decade Counter, AC Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, CMOS, PDSO20
YAGEO
©2020 ICPDF网 联系我们和版权申明