74ABTE16246DGGRE4 [TI]
11-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVER WITH 3-STATE AND OPEN-COLLECTOR OUTPUTS; 具有三态11位入射波交换总线收发器和集电极开路输出
| 型号： | 74ABTE16246DGGRE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 11-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVER WITH 3-STATE AND OPEN-COLLECTOR OUTPUTS |
| 文件： | 总13页 (文件大小：200K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74ABTE16246
11-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVER
WITH 3-STATE AND OPEN-COLLECTOR OUTPUTS
SCBS227J – JULY 1993 – REVISED AUGUST 2003
DGG OR DL PACKAGE
(TOP VIEW)
Member of the Texas Instruments
Widebus Family
Supports the VME64 ETL Specification
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
11OE
11DIR
11B
GND
10B
V
11A
10DIR
GND
10A
9A
V
9DIR
8A
GND
7A
7BI
6A
BIAS
CC
Reduced TTL-Compatible Input Threshold
Range
2
3
4
High-Drive Outputs (I
= –60 mA,
OH
I
= 90 mA) Support Equivalent 25-Ω
5
OL
Incident-Wave Switching
6
9B
7
V
V
BIAS Pin Minimizes Signal Distortion
CC
CC
CC
8
8BI
8BO
GND
7BO
6BI
6BO
5BO
GND
4BO
4BI
During Live Insertion
9
Internal Pullup Resistor on OE Keeps
Outputs in High-Impedance State During
Power Up or Power Down
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Distributed V
High-Speed Switching Noise
and GND Pins Minimize
CC
5A
Equivalent 25-Ω Series Damping Resistor
on B Port
GND
5BI
4A
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
V
V
CC
CC
3BO
2BI
GND
2BO
1BO
1BI
3A
3BI
GND
2A
1A
OE
description/ordering information
The SN74ABTE16246 is an 11-bit noninverting
transceiver designed for asynchronous two-way
communication between buses. This device has
open-collector and 3-state outputs. The device
allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level
at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the
buses are effectively isolated. When OE is low, the device is active.
The B port has an equivalent 25-Ω series output resistor to reduce ringing. Active bus-hold inputs on the B port
hold unused or floating inputs at a valid logic level.
The A port provides for the precharging of the outputs via V BIAS, which establishes a voltage between 1.3 V
CC
and 1.7 V when V
is not connected.
CC
Activebus-holdcircuitryholdsunusedorundriveninputsatavalidlogicstate. Useofpulluporpulldownresistors
with the bus-hold circuitry is not recommended.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
Tube
SN74ABTE16246DL
SN74ABTE16246DLR
SN74ABTE16246DGGR
SSOP – DL
ABTE16246
ABTE16246
–40°C to 85°C
Tape and reel
TSSOP – DGG Tape and reel
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
Copyright 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ABTE16246
11-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVER
WITH 3-STATE AND OPEN-COLLECTOR OUTPUTS
SCBS227J – JULY 1993 – REVISED AUGUST 2003
FUNCTION TABLE
INPUTS
OPERATION
OE
9DIR
10DIR
11DIR 11OE
H
X
X
X
X
Isolation
†
1BI–8BI data to 1A–8A bus (OC ),
1A–8A data to 1BO–8BO bus
L
X
X
X
X
L
L
L
L
L
L
L
L
H
X
X
X
X
X
X
X
L
X
X
X
X
L
X
X
X
X
L
9A data to 9B bus
9B data to 9A bus
10A data to 10B bus
10B data to 10A bus
11A data to 11B bus
11A, 11B isolation
11B data to 11A bus
H
X
X
X
L
H
X
H
†
OC = Open-collector outputs
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ABTE16246
11-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVER
WITH 3-STATE AND OPEN-COLLECTOR OUTPUTS
SCBS227J – JULY 1993 – REVISED AUGUST 2003
logic diagram (positive logic)
1
11OE
2
11DIR
3
11B
47
11A
25
OE
46
10DIR
5
10B
44
10A
41
9DIR
6
9B
43
9A
26
24
1A
1BI
23
1BO
To Seven Other Channels
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ABTE16246
11-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVER
WITH 3-STATE AND OPEN-COLLECTOR OUTPUTS
SCBS227J – JULY 1993 – REVISED AUGUST 2003
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
and V BIAS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
CC
Input voltage range, V (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
Voltage range applied to any output in the high or power-off state, V
. . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V
O
Current into any output in the low state, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
O
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA
IK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
OK
O
Package thermal impedance, θ (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
JA
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Storage temperature range, T
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN NOM
MAX
UNIT
V
CC
V
CC
,
Supply voltage
4.5
5
5.5
V
BIAS
OE
2
V
High-level input voltage
V
V
IH
IL
Except OE
OE
1.6
0.8
1.4
5.5
V
Low-level input voltage
Except OE
1A–8A
V
V
High-level output voltage
Input voltage
0
0
V
V
OH
V
I
CC
B bus
–12
–64
12
I
High-level output current
Low-level output current
mA
mA
OH
9A–11A
B bus
I
OL
A bus
90
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
Outputs enabled
10
ns/V
T
A
–40
85
°C
NOTE 3: All unused control inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ABTE16246
11-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVER
WITH 3-STATE AND OPEN-COLLECTOR OUTPUTS
SCBS227J – JULY 1993 – REVISED AUGUST 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
UNIT
V
V
V
= 4.5 V,
= 5.5 V,
I = –18 mA
–1.2
V
IK
CC
I
I
I
I
I
I
I
= –100 µA
= –1 mA
V
CC
–0.2
4.5
CC
OH
OH
OH
OH
OH
OH
B port
2.4
2
V
CC
V
CC
V
CC
V
CC
V
CC
= 4.5 V
= 5.5 V,
= 4.5 V
= 4.5 V,
= 4.5 V
= –12 mA
= –1 mA
V
OH
V
9A–11A
= –32 mA
= –64 mA
2.4
2
I
1A–8A
B port
V
OH
= 5.5 V
20
0.4
µA
OH
I
I
I
I
= 1 mA
OL
OL
OL
OL
= 12 mA
= 64 mA
= 90 mA
0.8
V
OL
V
0.55
0.9
A port
V
CC
= 4.5 V
= 4.5 V
V
hys
100
mV
V = 0.8 V
I
100
V
CC
I
I
B port
V = 2 V
I
–100
µA
I(hold)
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
V = 0 to 5.5 V
I
500
1
Control inputs
A or B ports
9A–11A
= 5.5 V
V = V or GND
I CC
µA
I
= 5.5 V, OE = V
= 5.5 V,
20
10
–10
CC
‡
I
I
V
V
= 2.7 V
= 0.5 V
µA
µA
OZH
O
‡
9A–11A
= 5.5 V,
OZL
O
A port
–50
–25
–180
–90
100
36
I
V
= 5.5 V,
V
= 2.5 V
mA
O
CC
CC
O
B port
I
off
V
= 0, V or V ≤ 4.5 V,
V
CC
BIAS = 0
µA
I
O
Outputs high
Outputs low
Outputs disabled
OE high
28
38
V
= 5.5 V, I = 0,
O
or GND
CC
CC
I
A or B ports
A or B ports
48
mA
CC
V = V
I
20
32
0.02
0.33
2.5
mA/
MHz
I
V
CC
= 5 V, C = 50 pF
L
CCD
OE low
C
C
Control inputs
I/O ports
V = 2.5 V or 0.5 V
I
4
8
pF
pF
i
V
O
= 2.5 V or 0.5 V
4.5
io
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
OZL
CC
and I
The parameters I
include the input leakage current.
OZH
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ABTE16246
11-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVER
WITH 3-STATE AND OPEN-COLLECTOR OUTPUTS
SCBS227J – JULY 1993 – REVISED AUGUST 2003
live-insertion specifications over recommended operating free-air temperature range
†
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
700
20
UNIT
V
V
= 0 to 4.5 V,
V
V
V
V
BIAS = 4.5 V to 5.5 V,
BIAS = 4.5 V to 5.5 V,
BIAS = 4.5 V to 5.5 V
BIAS = 4.75 V to 5.25 V
I
I
= 0
= 0
250
CC
CC
CC
CC
CC
O(DC)
I
(V BIAS)
CC CC
µA
‡
= 4.5 V to 5.5 V ,
CC
O(DC)
1.1
1.3
–20
20
1.5
1.5
1.9
V
A port
V
= 0
V
O
CC
CC
1.7
V
V
= 0
–100
100
O
I
O
A port
V
= 0,
V
BIAS = 4.5 V
µA
CC
= 3 V
O
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
– 0.5 V < V BIAS
V
CC
CC
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C = 50 pF (unless otherwise noted) (see Figure 2)
L
V
T
= 5 V,
= 25°C
CC
A
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
MIN
1.5
1.5
1.5
1.5
1.5
7.5
1.5
2
TYP
3.1
3.5
3
MAX
4.2
4.6
3.8
4
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
1.5
1.5
1.5
1.5
1.5
7.5
1.5
2
5.2
5.2
4.5
4.5
4.5
10.3
4.5
6.2
6.8
7.1
7.3
6.7
5.1
7
PLH
PHL
PLH
PHL
PLH
PLH
PHL
A
B
ns
ns
9B–11B
9A–11A
3.2
3.2
8.9
3.2
4.3
4.4
4.3
4.5
4.2
3.5
4.3
3.6
§
¶
4
1B–8B
1A–8A
9.7
4
ns
9A–11A
1A–11A
5.3
5.4
6
PZH
PZL
PZH
PZL
PHZ
PLZ
PHZ
PLZ
ns
ns
ns
ns
OE
OE
OE
OE
2
2
2
2
B
2
6.4
5.9
4.6
6.2
5
2
9A–11A
1A–11A
2
2
2
2
2.5
2
2.5
2
B
5.5
§
¶
Measurement point is V
Measurement point is V
+ 0.3 V.
+ 1.5 V.
OL
OL
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ABTE16246
11-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVER
WITH 3-STATE AND OPEN-COLLECTOR OUTPUTS
SCBS227J – JULY 1993 – REVISED AUGUST 2003
extended switching characteristics over recommended ranges of supply voltage and operating
free-air temperature, C = 50 pF (unless otherwise noted) (see Figure 2)
L
V
T
= 5 V,
= 25°C
CC
A
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
LOAD
MIN
MAX
UNIT
MIN
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
TYP
3.2
3.8
3.3
3.1
3.5
3.1
3
MAX
4
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
4.8
5.6
4.8
4.6
4.9
4.4
4.5
4.7
4.4
2
t
t
t
t
t
t
t
t
t
PLH
PHL
PHL
PLH
PHL
PHL
PLH
PHL
PHL
9B–11B
1B–8B
9B–11B
1B–8B
9B–11B
9A–11A
1A–8A
9A–11A
1A–8A
1A–8A
R
R
R
R
R
R
= 13 Ω
ns
ns
ns
ns
ns
ns
X
X
X
X
X
4.7
4.2
4
= 13 Ω
= 26 Ω
= 26 Ω
= 56 Ω
4.4
4
3.8
4.2
4
3.3
3
1B–8B
1A–8A
= 56 Ω
= Open
= Open
= 26 Ω
= Open
= Open
= 26 Ω
= 26 Ω
= Open
X
X
X
B
A
B
B
A
B
B
A
A
B
A
A
B
A
A
B
R
R
0.1
0.4
0.3
0.3
0.7
0.5
0.8
5.5
0.6
0.8
0.8
0.7
1.1
1
2
ns
ns
t
sk(p)
sk(o)
R
2
X
X
X
R
R
1.3
1.3
1.3
1.5
7.9
t
R
X
X
X
†
t
t
R
0.5
3.5
1.5
7.3
0.5
3.5
ns
ns
‡
t
t
R
†
‡
t is measured between 1 V and 2 V of the output waveform.
t is measured between 10% and 90% of the output waveform.
t
t
extended output characteristics over recommended ranges of supply voltage and operating
free-air temperature, C = 50 pF (see Figures 1 and 2)
L
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
TEST CONDITIONS
LOAD
MIN
MAX
UNIT
A
B
B
A
2.5
4
V
= constant,
CC
∆T = 20°C
t
ns
sk(temp)
sk(load)
R
= 56 Ω
A
X
V
CC
= constant,
B
A
R
= 13, 26, or 56 Ω
4
ns
t
X
Temperature = constant
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ABTE16246
11-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVER
WITH 3-STATE AND OPEN-COLLECTOR OUTPUTS
SCBS227J – JULY 1993 – REVISED AUGUST 2003
PARAMETER MEASUREMENT INFORMATION
Device 1
A
B
Y1
A
Y2
Yn
Device
1 – Y1
t
sk(o)
sk(load)
t
t
PHL1
t
PLH1
In
B
t
Device n
sk(temp)
Device
1 – Yn
Y1
t
PLH2
Device
n – Yn
Y2
Yn
NOTES: A. Pulse skew, t
, is defined as the difference in propagation-delay times t
and t on the same terminal at identical
PHL1
sk(p)
PLH1
operating conditions.
B. Output skew, t , is defined as the difference in propagation delay of any two outputs of the same device switching in the same
sk(o)
direction (e.g., |t
– t
|) .
PLH1 PLH2
C. Temperature skew, t
, is the output skew of two devices, both having the same value of V
sk(temp)
1% and with package
CC
temperature differences of 20°C.
D. Load skew, t , is measured with R in Figure 2 at 13 Ω for one unit and 56 Ω for the other unit.
sk(load)
X
Figure 1. Voltage Waveforms for Extended Characteristics
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ABTE16246
11-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVER
WITH 3-STATE AND OPEN-COLLECTOR OUTPUTS
SCBS227J – JULY 1993 – REVISED AUGUST 2003
PARAMETER MEASUREMENT INFORMATION
7 V
Open
SWITCHING TABLE LOADS
/t (9A–11A and B port)
S1
Up
Up
Up
Up
S2
Open
7 V
7 V
Open
S2
t
PLH PHL
t
/t (1A–8A)
PLH PHL
t
/t
PLZ PZL
3.65 V
500 Ω
500 Ω
t
/t
PHZ PZH
(except 1A–8A)
94 Ω
EXTENDED
SWITCHING TABLE LOADS
S1
R
S1
S2
X
From Output
Under Test
t
t
/t
/t (A port)
Down
Up
Down
Up
X
Open
X
PLH PHL sk
/t /t (B port)
PLH PHL sk
C
= 50 pF
L
2 nF
t (A port) (see Note E)
t
(see Note A)
t (B port) (see Note F)
t
Open
R
= 13, 26, or 56 Ω
3 V
X
Output
Control
(low-level
enabling)
LOAD CIRCUIT
1.5 V
1.5 V
0 V
t
t
PLZ
PZL
Output
Waveform 1
S2 at 7 V
3.5 V
3 V
0 V
1.5 V
Input
1.5 V
1.5 V
V
+ 0.3 V
OL
(see Note B)
V
OL
OH
t
t
PZH
PHZ
t
t
PLH
PHL
Output
Waveform 2
S2 at Open
(see Note B)
V
V
OH
OL
V
OH
– 0.3 V
1.5 V
Output
1.5 V
1.5 V
≈0 V
V
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
ENABLE AND DISABLE TIMES
NOTES: A.
C
includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
E. t is measured between 1 V and 2 V of the output waveform.
t
F. t is measured between 10% and 90% of the output waveform.Figure 1
t
Figure 2. Load Circuit and Voltage Waveforms
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
PACKAGING INFORMATION
Orderable Device
74ABTE16246DGGRE4
SN74ABTE16246DGGR
SN74ABTE16246DL
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
DGG
48
48
48
48
48
48
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
SSOP
SSOP
SSOP
SSOP
DGG
DL
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ABTE16246DLG4
SN74ABTE16246DLR
SN74ABTE16246DLRG4
DL
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
DL
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
DL
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
48
0.0135 (0,343)
0.008 (0,203)
0.005 (0,13)
M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
0°–ā8°
1
24
0.040 (1,02)
0.020 (0,51)
A
Seating Plane
0.004 (0,10)
0.008 (0,20) MIN
PINS **
0.110 (2,79) MAX
28
48
0.630
56
DIM
0.380
(9,65)
0.730
A MAX
A MIN
(16,00) (18,54)
0.370
(9,40)
0.620
0.720
(15,75) (18,29)
4040048/E 12/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MO-118
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
M
0,08
0,50
48
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
0,25
1
24
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
48
56
64
DIM
A MAX
12,60
12,40
14,10
13,90
17,10
16,90
A MIN
4040078/F 12/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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