5962F0254701VPA [TI]
双路宽带视频运算放大器 | NAB | 8 | -55 to 125;型号: | 5962F0254701VPA |
厂家: | TEXAS INSTRUMENTS |
描述: | 双路宽带视频运算放大器 | NAB | 8 | -55 to 125 放大器 运算放大器 商用集成电路 放大器电路 |
文件: | 总20页 (文件大小:426K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LMH6715QML
LMH6715QML Dual Wideband Video Op Amp
Literature Number: SNOSAQ3A
July 12, 2011
LMH6715QML
Dual Wideband Video Op Amp
General Description
Features
The LMH6715 combines National's VIP10™ high speed com-
plementary bipolar process with National's current feedback
topology to produce a very high speed dual op amp. The
LMH6715 provides 400MHz small signal bandwidth at a gain
of +2V/V and 1300V/μs slew rate while consuming only 5.8mA
per amplifier from ±5V supplies.
Available with radiation guaranteed
300 krad(Si)
■
TA = 25°C, RL = 100Ω, typical values unless specified.
Very low diff. gain, phase: 0.02%, 0.02°
■
■
Wide bandwidth: 480MHz (AV = +1V/V);
400MHz (AV = +2V/V)
0.1dB gain flatness to 100MHz
■
■
■
■
■
■
The LMH6715 offers exceptional video performance with its
0.02% and 0.02° differential gain and phase errors for NTSC
and PAL video signals while driving up to four back terminated
75Ω loads. The LMH6715 also offers a flat gain response of
0.1dB to 100MHz and very low channel-to-channel crosstalk
of −70dB at 10MHz. Additionally, each amplifier can deliver
70mA of output current. This level of performance makes the
LMH6715 an ideal dual op amp for high density, broadcast
quality video systems.
Low power: 5.8mA/channel
−70dB channel-to-channel crosstalk (10MHz)
Fast slew rate: 1300V/μs
Unity gain stable
Improved replacement for CLC412
Applications
The LMH6715's two very well matched amplifiers support a
number of applications such as differential line drivers and
receivers. In addition, the LMH6715 is well suited for Sallen
Key active filters in applications such as anti-aliasing filters for
high speed A/D converters. Its low power requirement, low
noise and distortion allow the LMH6715 to serve portable RF
applications such as IQ channels.
HDTV, NTSC & PAL video systems
■
■
■
■
■
■
Video switching and distribution
IQ amplifiers
Wideband active filters
Cable drivers
DC coupled single-to-differential conversions
Ordering Information
NS Part Number
SMD Part Number
5962–0254701MPA
NS Package Number
Package Description
LMH6715J-QML
J08A
8LD CERDIP
5962F0254701VPA
300 krad(Si)
LMH6715JFQMLV
J08A
8LD CERDIP
Connection Diagram
8 Lead Cerdip (J)
20151851
Top View
See NS Package Number J08A
VIP10™ is a trademark of National Semiconductor Corporation.
© 2011 National Semiconductor Corporation
201518
www.national.com
Absolute Maximum Ratings (Note 1)
Supply Voltage (VCC
)
±6.75V
V+ - V-
V+ - V-
1.0W
Common Mode Input Voltage (VCM
Differential Input Voltage
Power Dissipation (PD) (Note 2)
)
Lead Temperature (Soldering, 10 seconds)
Junction Temperature (TJ)
+300°C
+175°C
-65°C ≤ TA ≤ +150 °C
Storage Temperature Range
Thermal Resistance
ꢀꢀθJA
Cerdip (Still Air)
Cerdip (500LF/Min Air Flow)
ꢀꢀθJC
140°C/W
80°C/W
Cerdip
32°C/W
Package Weight (typical)
CERDIP
ESD Tolerance (Note 3)
1130mg
2000V
Recommended Operating Ratings
Supply Voltage (VCC
)
±5VDC to ±6VDC
Ambient Operating Temperature Range (TA)
-55°C ≤ TA ≤ +125°C
Quality Conformance Inspection
MIL-STD-883, Method 5005 - Group A
Subgroup
Description
Static tests at
Temp (°C)
+25
1
2
Static tests at
+125
-55
3
Static tests at
4
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
+25
5
+125
-55
6
7
+25
8A
8B
9
+125
-55
+25
10
11
+125
-55
www.national.com
2
LMH6715 Electrical Characteristics
DC Parameter Static and DC Tests
The following conditions apply, unless otherwise specified.
RL = 100Ω, VCC = ±5VDC, AV = +2, RF = 634Ω, −55°C ≤ TA ≤ +125°C
Sub-
groups
Symbol
Parameter
Conditions
Notes
Min Max
Unit
IBN
Input Bias Current, Noninverting
(Note 6)
-12
-12
-20
-21
-25
-35
-6
12
+12
+20
+21
+25
+35
6
1
2
μA
μA
3
μA
IBI
Input Bias Current, Inverting
(Note 6)
1
μA
2
μA
3
μA
VIO
Input offset voltage
Supply Current
(Note 6)
(Note 6)
mV
mV
mV
mA
mA
mA
dB
1
-12
-10
12
2
10
3
ICC
14.0
14.0
16.0
1
RL =∞
2
3
PSRR
Power Supply Rejection Ration +VS = +4.5V to +5.0V,
-VS = -4.5V to -5.0V
46
44
1
dB
2, 3
AC Parameter Frequeuncy Domain Response
The following conditions apply, unless otherwise specified.
RL = 100Ω, VCC = ±5VDC, AV = +2, RF = 634Ω, −55°C ≤ TA ≤ +125°C
Sub-
groups
Symbol
Parameter
Conditions
Notes
Min Max
Unit
SSBW
GFP
Small signal bandwith
−3dB BW, VOUT < 0.5 VPP
0.1MHz to 30 MHz,
VOUT ≤ 0.5VPP
(Note 5)
(Note 5)
175
0.1
MHz
dB
4
4
Gain flatness peaking high
GFR
Gain flatness rolloff
0.1MHz to 30 MHz,
(Note 5)
0.3
dB
4
VOUT ≤ 0.5VPP
AC Parameter Distortion and Noise Response
The following conditions apply, unless otherwise specified.
RL = 100Ω, VCC = ±5VDC, AV = +2, RF = 634Ω, −55°C ≤ TA ≤ +125°C
Sub-
groups
Symbol
Parameter
Conditions
Notes
Min Max Unit
HD2
HD3
Second harmonic distortion
Third harmonic distortion
2VPP at 20 MHz
2VPP at 20 MHz
(Note 5)
(Note 5)
-42 dBc
-46 dBc
4
4
3
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DC Parameter Drift Values
The following conditions apply, unless otherwise specified.
Deltas not required on B Level product. Deltas required for S Level product at Group B5 only, or as specified on the Internal
Processing Instructions (IPI).
Sub-
groups
Symbol
Parameter
Conditions
Notes
Min Max
Unit
IBN
IBI
Input Bias Current, Noninverting
Input Bias Current, Inverting
Input Offset Voltage
(Note 4)
(Note 4)
(Note 4)
(Note 4)
-1.2 +1.2
-2.0 +2.0
-1.0 +1.0
-1.0 +1.0
1
1
1
1
μA
μA
VIO
ICC
mV
Supply Current
mA
RL = ∞
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limit s. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package
junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/
θ
JA or the number given in the Absolute Maximum Ratings, whichever is lower.
Note 3: Human body model, 1.5kΩ in series with 100 pF.
Note 4: If not tested, shall be guaranteed to the limits specified in table 1 herein.
Note 5: Group A testing only.
Note 6: Pre and post irradiation limits are identical to those listed under electrical characteristics. These parts may be dose rate sensitive in a space environment
and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are guaranteed only for the conditions as specified in MIL-
STD-883, Method 1019.
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4
Differential Gain & Phase with Multiple Video Loads
20151808
Frequency Response vs. VOUT
20151816
5
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Typical Performance Characteristics
(TA = 25°C, VCC = ±5V, AV = ±2V/V, RF = 500Ω, RL = 100Ω, unless otherwise specified).
Non-Inverting Frequency Response
Inverting Frequency Response
20151813
20151812
Non-Inverting Frequency Response vs. VOUT
Small Signal Channel Matching
20151801
20151816
Frequency Response vs. Load Resistance
Non-Inverting Frequency Response vs. RF
20151815
20151814
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6
Small Signal Pulse Response
Input-Referred Crosstalk
−3dB Bandwidth vs. VOUT
Large Signal Pulse Response
Settling Time vs. Accuracy
DC Errors vs. Temperature
20151818
20151819
20151807
20151824
20151826
20151825
7
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Open Loop Transimpedance, Z(s)
Differential Gain & Phase vs. Load
Differential Phase vs. Frequency
Equivalent Input Noise vs. Frequency
20151820
20151823
Differential Gain vs. Frequency
20151809
20151808
Gain Flatness & Linear Phase Deviation
20151810
20151811
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8
2nd Harmonic Distortion vs. Output Voltage
3rd Harmonic Distortion vs. Output Voltage
20151802
20151805
Closed Loop Output Resistance
PSRR & CMRR
20151806
20151817
Suggested RS vs. CL
20151827
9
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Application Section
20151835
FIGURE 1. Non-Inverting Configuration with Power Supply Bypassing
20151837
FIGURE 2. Inverting Configuration with Power Supply Bypassing
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10
RF vs. Non-Inverting Gain
Application Introduction
Offered in an 8-pin package for reduced space and cost, the
wideband LMH6715 dual current-feedback op amp provides
closely matched DC and AC electrical performance charac-
teristics making the part an ideal choice for wideband signal
processing. Applications such as broadcast quality video sys-
tems, IQ amplifiers, filter blocks, high speed peak detectors,
integrators and transimedance amplifiers will all find superior
performance in the LMH6715 dual op amp.
FEEDBACK RESISTOR SELECTION
One of the key benefits of a current feedback operational am-
plifier is the ability to maintain optimum frequency response
independent of gain by using appropriate values for the feed-
back resistor (RF). The Electrical Characteristics and Typical
Performance plots specify an RF of 500Ω, a gain of +2V/V and
±5V power supplies (unless otherwise specified). Generally,
lowering RF from it's recommended value will peak the fre-
quency response and extend the bandwidth while increasing
the value of RF will cause the frequency response to roll off
faster. Reducing the value of RF too far below it's recom-
mended value will cause overshoot, ringing and, eventually,
oscillation.
20151821
Both plots show the value of RF approaching a minimum value
(dashed line) at high gains. Reducing the feedback resistor
below this value will result in instability and possibly oscilla-
tion. The recommended value of RF is depicted by the solid
line, which begins to increase at higher gains. The reason that
a higher RF is required at higher gains is the need to keep
RG from decreasing too far below the output impedance of the
input buffer. For the LMH6715 the output resistance of the
input buffer is approximately 160Ω and 50Ω is a practical low-
er limit for RG. Due to the limitations on RG the LMH6715
begins to operate in a gain bandwidth limited fashion for gains
of ±5V/V or greater.
Frequency Response vs. RF
RF vs. Inverting Gain
20151814
The plot labeled “Frequency Response vs. RF” shows the
LMH6715's frequency response as RF is varied (RL = 100Ω,
AV = +2). This plot shows that an RF of 200Ω results in peaking
and marginal stability. An RF of 300Ω gives near maximal
bandwidth and gain flatness with good stability, but with very
light loads (RL > 300Ω) the device may show some peaking.
An RF of 500Ω gives excellent stability with good bandwidth
and is the recommended value for most applications. Since
all applications are slightly different it is worth some experi-
mentation to find the optimal RF for a given circuit. For more
information see Application Note OA-13 which describes the
relationship between RF and closed-loop frequency response
for current feedback operational amplifiers.
20151822
When using the LMH6715 as a replacement for the CLC412,
identical bandwidth can be obtained by using an appropriate
value of RF . The chart “Frequency Response vs. RF” shows
that an RF of approximately 700Ω will provide bandwidth very
close to that of the CLC412. At other gains a similar increase
in RF can be used to match the new and old parts.
When configuring the LMH6715 for gains other than +2V/V,
it is usually necessary to adjust the value of the feedback re-
sistor. The two plots labeled “RF vs. Non-inverting Gain” and
“RF vs. Inverting Gain” provide recommended feedback re-
sistor values for a number of gain selections.
CIRCUIT LAYOUT
With all high frequency devices, board layouts with stray ca-
pacitances have a strong influence over AC performance.
The LMH6715 is no exception and its input and output pins
are particularly sensitive to the coupling of parasitic capaci-
tances (to AC ground) arising from traces or pads placed too
closely (<0.1”) to power or ground planes. In some cases, due
to the frequency response peaking caused by these para-
11
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sitics, a small adjustment of the feedback resistor value will
serve to compensate the frequency response. Also, it is very
important to keep the parasitic capacitance across the feed-
back resistor to an absolute minimum.
Also, the amplifier is virtually free of any long term thermal tail
effects at low gains.
When measuring settling time, a solid ground plane should
be used in order to reduce ground inductance which can
cause common-ground-impedance coupling. Power supply
and ground trace parasitic capacitances and the load capac-
itance will also affect settling time.
The performance plots in the data sheet can be reproduced
using the evaluation boards available from National. The
CLC730036 board uses all SMT parts for the evaluation of the
LMH6715. The board can serve as an example layout for the
final production printed circuit board.
Placing a series resistor (Rs) at the output pin is recommend-
ed for optimal settling time performance when driving a ca-
pacitive load. The Typical Performance plot labeled “RS and
Settling Time vs. Capacitive Load” provides a means for se-
lecting a value of Rs for a given capacitive load.
Care must also be taken with the LMH6715's layout in order
to achieve the best circuit performance, particularly channel-
to-channel isolation. The decoupling capacitors (both tanta-
lum and ceramic) must be chosen with good high frequency
characteristics to decouple the power supplies and the phys-
ical placement of the LMH6715's external components is
critical. Grouping each amplifier's external components with
their own ground connection and separating them from the
external components of the opposing channel with the maxi-
mum possible distance is recommended. The input (RIN) and
gain setting resistors (RF) are the most critical. It is also rec-
ommended that the ceramic decoupling capacitor (0.1μF chip
or radial-leaded with low ESR) should be placed as closely to
the power pins as possible.
DC & NOISE PERFORMANCE
A current-feedback amplifier's input stage does not have
equal nor correlated bias currents, therefore they cannot be
canceled and each contributes to the total DC offset voltage
at the output by the following equation:
POWER DISSIPATION
The input resistance is the resistance looking from the non-
inverting input back toward the source. For inverting DC-
offset calculations, the source resistance seen by the input
resistor Rg must be included in the output offset calculation
as a part of the non-inverting gain equation. Application note
OA-7 gives several circuits for DC offset correction. The noise
currents for the inverting and non-inverting inputs are graphed
in the Typical Performance plot labeled “Equivalent Input
Noise”. A more complete discussion of amplifier input-re-
ferred noise and external resistor noise contribution can be
found in OA-12.
Follow these steps to determine the Maximum power dissi-
pation for the LMH6715:
1. Calculate the quiescent (no-load) power: PAMP = ICC (VCC
- VEE
)
2. Calculate the RMS power at the output stage: PO = (VCC
VLOAD)(ILOAD), where VLOAD and ILOAD are the voltage and
current across the external load.
-
3. Calculate the total RMS power: Pt = PAMP + PO
The maximum power that the LMH6715, package can dissi-
pate at a given temperature can be derived with the following
equation:
DIFFERENTIAL GAIN & PHASE
Pmax = (150º - Tamb)/ θJA, where Tamb = Ambient temper-
ature (°C) and θJA = Thermal resistance, from junction to
ambient, for a given package (°C/W). For the SOIC package
The LMH6715 can drive multiple video loads with very low
differential gain and phase errors. The Typical Performance
plots labeled “Differential Gain vs. Frequency” and “Differen-
tial Phase vs. Frequency” show performance for loads from 1
to 4. The Electrical Characteristics table also specifies per-
formance for one 150Ω load at 4.43MHz. For NTSC video,
the performance specifications also apply. Application note
OA-24 “Measuring and Improving Differential Gain & Differ-
ential Phase for Video”, describes in detail the techniques
used to measure differential gain and phase.
θ
JA is 145°C/W.
MATCHING PERFORMANCE
With proper board layout, the AC performance match be-
tween the two LMH6715's amplifiers can be tightly controlled
as shown in Typical Performance plot labeled “Small-Signal
Channel Matching”.
The measurements were performed with SMT components
using a feedback resistor of 300Ω at a gain of +2V/V.
I/O VOLTAGE & OUTPUT CURRENT
The usable common-mode input voltage range (CMIR) of the
LMH6715 specified in the Electrical Characteristics table of
the data sheet shows a range of ±2.2 volts. Exceeding this
range will cause the input stage to saturate and clip the output
signal.
The LMH6715's amplifiers, built on the same die, provide the
advantage of having tightly matched DC characteristics.
SLEW RATE AND SETTLING TIME
One of the advantages of current-feedback topology is an in-
herently high slew rate which produces a wider full power
bandwidth. The LMH6715 has a typical slew rate of 1300V/
µs. The required slew rate for a design can be calculated by
the following equation: SR = 2πfVpk.
Careful attention to parasitic capacitances is critical to achiev-
ing the best settling time performance. The LMH6715 has a
typical short term settling time to 0.05% of 12ns for a 2V step.
The output voltage range is determined by the load resistor
and the choice of power supplies. With ±5 volts the class A/
B output driver will typically drive ±3.9V into a load resistance
of 100Ω. Increasing the supply voltages will change the com-
mon-mode input and output voltage swings while at the same
time increase the internal junction temperature.
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12
Applications Circuits
SINGLE-TO-DIFFERENTIAL LINE DRIVER
The LMH6715's well matched AC channel-response allows a single-ended input to be transformed to highly matched push-pull
driver. From a 1V single-ended input the circuit of Figure 3 produces 1V differential signal between the two outputs. For larger
signals the input voltage divider (R1 = 2R2) is necessary to limit the input voltage on channel 2.
20151845
FIGURE 3. Single-to-Differential Line Driver
DIFFERENTIAL LINE RECEIVER
Figure 4 and Figure 5 show two different implementations of an instrumentation amplifier which convert differential signals to single-
ended. Figure 5 allows CMRR adjustment through R2.
20151846
FIGURE 4. Differential Line Receiver
13
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20151847
FIGURE 5. Differential Line Receiver with CMRR Adjustment
NON-INVERTING CURRENT-FEEDBACK INTEGRATOR
The circuit of Figure 6 achieves its high speed integration by placing one of the LMH6715's amplifiers in the feedback loop of the
second amplifier configured as shown.
20151849
FIGURE 6. Current Feedback Integrator
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14
LOW NOISE WIDE-BANDWIDTH TRANSIMPEDANCE AMPLIFIER
Figure 7 implements a low noise transimpedance amplifier using both channels of the LMH6715. This circuit takes advantage of
the lower input bias current noise of the non-inverting input and achieves negative feedback through the second LMH6715 channel.
The output voltage is set by the value of RF while frequency compensation is achieved through the adjustment of RT.
20151850
FIGURE 7. Low-Noise, Wide Bandwidth, Transimpedance Amp.
15
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Revision History
Date Released Revision
Section
Changes
11/30/2010
A
New Corporate Format Release
1 MDS data sheets converted into a Corp. data
sheet format. Following MDS data sheet will be
Archived MNLMH6715-X-RH, Rev. 0A0
07/12/2011
B
Connection Diagrams
Replaced 8 Lead Cerdip (J) diagram depicting
single Op Amp with diagram depicting dual Op
Amp.
www.national.com
16
Physical Dimensions inches (millimeters) unless otherwise noted
8 Lead Cerdip (J)
NS Package Number J08A
17
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