5962-9753702QHA
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品牌:TI
描述:FAMILY OF SELF-CALIBRATING PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
5962-9753702QHA 概述
FAMILY OF SELF-CALIBRATING PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS 家庭自我校准的精密CMOS轨到轨输出运算放大器
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PDF下载TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
Self-Calibrates Input Offset Voltage to
Slew Rate . . . 2.5 V/µs
40 µV Max
High Output Drive Capability . . . ±50 mA
Calibration Time . . . 300 ms
Low Input Offset Voltage Drift . . . 1 µV/°C
Input Bias Current . . . 1 pA
Characterized From –55°C to 125°C
Open Loop Gain . . . 120 dB
Available in Q-Temp Automotive
HighRel Automotive Applications
Configuration Control / Print Support
Qualification to Automotive Standards
Rail-To-Rail Output Voltage Swing
Stable Driving 1000 pF Capacitive Loads
Gain Bandwidth Product . . . 4.7 MHz
description
The TLC4501 and TLC4502 are the highest precision CMOS single supply rail-to-rail operational amplifiers
available today. The input offset voltage is 10 µV typical and 40 µV maximum. This exceptional precision,
combined with a 4.7-MHz bandwidth, 2.5-V/µs slew rate, and 50-mA output drive, is ideal for multiple
applications including: data acquisition systems, measurement equipment, industrial control applications, and
portable digital scales.
These amplifiers feature self-calibrating circuitry which digitally trims the input offset voltage to less than 40 µV
within the first 300 ms of operation. The offset is then digitally stored in an integrated successive approximation
register (SAR). Immediately after the data is stored, the calibration circuitry effectively drops out of the signal
path, shuts down, and the device functions as a standard operational amplifier.
Offset Control
3
2
IN+
IN–
+
–
1
OUT
Calibration Circuitry
SAR
D/A
A/D
5 V
8
V
DD
4
GND
Power-On
Reset
Control
Logic
Oscillator
Figure 1. Channel One of the TLC4502
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinEPIC and Self-Cal are trademarks of Texas Instruments.
Copyright 2001, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
description (continued)
Using this technology eliminates the need for noisy and expensive chopper techniques, laser trimming, and
power hungry, split supply bipolar operational amplifiers.
TLC4501
D PACKAGE
(TOP VIEW)
TLC4502
D OR JG PACKAGE
(TOP VIEW)
TLC4502
U PACKAGE
(TOP VIEW)
NC
1OUT
1IN –
1IN +
/GND
NC
V
2OUT
2IN –
2IN +
NC
1IN –
1IN +
/GND
NC
V
OUT
NC
1
10
9
1
2
3
4
8
7
6
5
1OUT
1IN –
1IN +
/GND
V
+
DD
1
2
3
4
8
7
6
5
+
+
2
3
4
5
2OUT
2IN–
2IN+
DD
DD
8
V
7
V
DD –
DD –
V
6
DD–
TLC4502
FK PACKAGE
(TOP VIEW)
3
2
1
20 19
18
NC
NC
1IN–
NC
4
5
6
7
8
2OUT
NC
17
16
15
14
2IN–
NC
1IN+
NC
9 10 11 12 13
NC – No internal connection
AVAILABLE OPTIONS
SMALL
PACKAGED DEVICES
CERAMIC FLAT
T
A
V
IO
max AT 25°C
CHIP CARRIER
CERAMIC DIP
(JG)
†
OUTLINE
(D)
PACK
(U)
(FK)
40 µV
50 µV
80 µV
100 µV
40 µV
50 µV
80 µV
100 µV
50 µV
100 µV
50 µV
100 µV
TLC4501ACD
TLC4502ACD
TLC4501CD
TLC4502CD
TLC4501AID
TLC4502AID
TLC4501ID
—
—
—
—
—
—
0°C to 70°C
—
—
—
—
—
—
—
—
—
—
—
—
–40°C to 125°C
—
—
—
TLC4502ID
—
—
—
TLC4502AQD
TLC4502QD
TLC4502AMD
TLC4502MD
—
—
—
–40°C to 125°C
–55°C to 125°C
—
—
—
TLC4502AMFKB
TLC4502MFKB
TLC4502AMJGB
TLC4502MJGB
TLC4502AMUB
TLC4502MUB
†
The D package is also available taped and reeled.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
DD+
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±7 V
Input voltage range, V (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
ID
I
Input current, I (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5 mA
I
Output current, I (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
O
Total current into V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
/GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
DD+
DD–
Total current out of V
Electrostatic discharge (ESD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > 2 kV
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T : TLC4502C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
TLC4502I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C
TLC4502Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C
TLC4502M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
Storage temperature range, T
Case temperature for 60 seconds, T : FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to V
/GND.
DD –
2. Differential voltages are at IN+ with respect to IN–. Excessive current flows when an input is brought below V
– 0.3 V.
DD–
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T
= 85°C
T = 125°C
A
POWER RATING
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING
POWER RATING
A
D
FK
JG
U
725 mW
1375 mW
1050 mW
675 mW
5.8 mW/°C
11.0 mW/°C
8.4 mW/°C
5.4 mW/°C
464 mW
880 mW
672 mW
432 mW
377 mW
715 mW
546 mW
350 mW
145 mW
275 mW
210 mW
135 mW
recommended operating conditions
TLC4502C
TLC4502I
TLC4502Q
TLC4502M
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
Supply voltage, V
DD
4
6
4
6
4
6
4
6
V
V
Input voltage range, V
V
V
V
V
– 2.3
V
V
V
V
– 2.3
V
V
V
V
– 2.3
V
V
V
V
– 2.3
I
DD–
DD+
DD–
DD+
DD–
DD+
DD–
DD+
Common-mode input voltage, V
IC
– 2.3
– 2.3
– 2.3
– 2.3
V
DD–
DD+
DD–
DD+
DD–
DD+
DD–
DD+
Operating free-air temperature, T
0
70
–40
125
–40
125
–55
125
°C
A
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
electrical characteristics at specified free-air temperature, V
noted)
= 5 V, GND = 0 (unless otherwise
DD
TLC450xC
†
PARAMETER
TEST CONDITIONS
TLC4501
UNIT
T
A
MIN
–80
TYP
10
MAX
80
TLC4501A
TLC4502
–40
10
40
V
V
= ±2.5 V,
= 0,
V
R
= 0,
= 50 Ω
DD
IC
O
S
V
IO
Input offset voltage
Full range
µV
–100
–50
10
100
50
TLC4502A
10
Temperature coefficient of input
offset voltage
α
Full range
1
1
µV/°C
pA
VIO
25°C
Full range
25°C
60
500
60
V
V
= ±2.5 V,
= 0,
V
R
= 0,
= 50 Ω
DD
IC
O
S
I
I
Input offset current
Input bias current
IO
1
pA
IB
Full range
25°C
500
I
I
= – 500 µA
= – 5 mA
= 2.5 V,
4.99
4.9
OH
V
V
High-level output voltage
Low-level output voltage
25°C
V
OH
OH
Full range
25°C
4.7
V
V
I
I
= 500 µA
0.01
0.1
IC
OL
25°C
V
OL
= 2.5 V,
= 5 mA
IC
OL
Full range
25°C
0.3
200
200
1000
Large-signal differential voltage
amplification
V
IC
R
= 2.5 V,
= 1 kΩ,
V
O
= 1 V to 4 V,
A
V/mV
VD
See Note 4
Full range
25°C
L
R
Differential input resistance
Input resistance
10
kΩ
Ω
I(D)
L
12
10
R
C
See Note 4
f = 10 kHz,
25°C
Common-mode input capacitance
Closed-loop output impedance
P package
f = 100 kHz
25°C
8
1
pF
Ω
L
z
A
V
= 10,
25°C
O
25°C
90
85
90
90
100
V
R
= 0 to 2.7 V,
= 1 kΩ
V
= 2.5 V,
IC
S
O
CMRR
Common-mode rejection ratio
dB
dB
Full range
25°C
100
1
Supply-voltage rejection ratio
k
V
DD
= 4 V to 6 V,
V
= 0, No load
SVR
IC
(∆V
DD ±
/∆V )
IO
Full range
25°C
1.5
2
TLC4501/A
TLC4502/A
Full range
25°C
I
Supply current
V
O
= 2.5 V,
No load
mA
V
DD
2.5
3.5
4
Full range
Full range
V
Calibration input threshold voltage
4
IT(CAL)
†
Full range is 0°C to 70°C.
NOTE 4:
R and C values are referenced to 2.5 V.
L L
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
operating characteristics, V
= 5 V
DD
TLC450xC, TLC450xAC
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
1.5
1
TYP
MAX
25°C
Full range
25°C
2.5
V/µs
V/µs
SR
Slew rate at unity gain
V
O
= 0.5 V to 2.5 V,
C
= 100 pF
L
f = 10 Hz
70
12
1
V
n
Equivalent input noise voltage
nV/√Hz
f = 1 kHz
25°C
f = 0.1 to 1 Hz
f = 0.1 to 10 Hz
25°C
Peak-to-peak equivalent input noise
voltage
V
I
µV
N(PP)
25°C
1.5
0.6
Equivalent input noise current
25°C
fA/√Hz
n
V
= 0.5 V to 2.5 V,
A
= 1
25°C
25°C
25°C
0.02%
0.08%
0.55%
O
V
f = 10 kHz,
R
C
THD + N Total harmonic distortion plus noise
Gain-bandwidth product
A
V
= 10
= 1 kΩ,
= 100 pF
L
L
A
= 100
R = 1 kΩ,
L
V
f = 10 kHz,
= 100 pF
25°C
25°C
25°C
25°C
4.7
1
MHz
MHz
C
L
V
R
= 2 V,
A
= 1,
= 100 pF
L
O(PP)
= 1 kΩ,
V
B
OM
Maximum output swing bandwidth
Settling time
C
L
A
= –1,
V
to 0.1%
1.6
2.2
Step = 0.5 V to 2.5 V,
t
s
µs
R
C
= 1 kΩ,
= 100 pF
L
L
to 0.01%
φ
m
Phase margin at unity gain
Calibration time
R
= 1 kΩ,
C = 100 pF
L
25°C
25°C
74
L
300
ms
†
Full range is 0°C to 70°C.
NOTE 4: and C values are referenced to 2.5 V.
R
L
L
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
electrical characteristics at specified free-air temperature, V
noted)
= 5 V, GND = 0 (unless otherwise
DD
TLC450xI
†
PARAMETER
TEST CONDITIONS
TLC4501
UNIT
µV
T
A
MIN
–80
TYP
10
MAX
80
TLC4501A
TLC4502
–40
10
40
V
V
= ±2.5 V,
= ±2.5 V,
= ±2.5 V,
V
R
= 0,
= 50 Ω
DD
IC
O
S
V
IO
Input offset voltage
Full range
= 0,
–100
–50
10
100
50
TLC4502A
10
Temperature coefficient of input
offset voltage
α
Full range
1
1
µV/°C
VIO
25°C
60
V
V
V
R
= 0,
= 50 Ω
DD
IC
O
= 0,
pA
nA
pA
nA
S
–40°C to
85°C
500
I
IO
Input offset current
Input bias current
Full range
5
25°C
1
60
V
V
V
R
= 0,
= 50 Ω
–40°C to
85°C
DD
IC
O
500
10
I
IB
= 0,
S
Full range
25°C
I
I
= – 500 µA
= – 5 mA
= 2.5 V,
4.99
4.9
OH
V
V
High-level output voltage
Low-level output voltage
25°C
V
OH
OH
Full range
25°C
4.7
V
V
I
I
= 500 µA
0.01
0.1
IC
OL
25°C
V
OL
= 2.5 V,
= 5 mA
IC
OL
Full range
25°C
0.3
200
200
1000
Large-signal differential voltage
amplification
V
IC
R
= 2.5 V,
V
= 1 V to 4 V,
O
A
VD
V/mV
= 1 kΩ,
See Note 4
Full range
25°C
L
R
Differential input resistance
Input resistance
10
kΩ
Ω
I(D)
L
12
10
R
C
See Note 4
f = 10 kHz,
25°C
Common-mode input capacitance
Closed-loop output impedance
P package
f = 100 kHz
25°C
8
1
pF
Ω
L
z
A
V
= 10,
25°C
O
25°C
90
85
90
90
100
V
R
= 0 to 2.7 V,
= 1 kΩ
V
= 2.5 V,
IC
S
O
CMRR
Common-mode rejection ratio
dB
dB
Full range
25°C
100
1
Supply-voltage rejection ratio
k
V
DD
= 4 V to 6 V,
V
= 0, No load
SVR
IC
(∆V
DD ±
/∆V )
IO
Full range
25°C
1.5
2
TLC4501/A
TLC4502/A
Full range
25°C
I
Supply current
V
O
= 2.5 V,
No load
mA
V
DD
2.5
3.5
4
Full range
Full range
V
Calibration input threshold voltage
4
IT(CAL)
†
Full range is –40°C to 125°C.
NOTE 4:
R and C values are referenced to 2.5 V.
L L
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
operating characteristics, V
= 5 V
DD
TLC450xI, TLC450xAI
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
1.5
1
TYP
MAX
25°C
Full range
25°C
2.5
V/µs
V/µs
SR
Slew rate at unity gain
V
O
= 0.5 V to 2.5 V,
C
= 100 pF
L
f = 10 Hz
70
12
1
V
n
Equivalent input noise voltage
nV/√Hz
f = 1 kHz
25°C
f = 0.1 to 1 Hz
f = 0.1 to 10 Hz
25°C
Peak-to-peak equivalent input noise
voltage
V
I
µV
N(PP)
25°C
1.5
0.6
Equivalent input noise current
25°C
fA/√Hz
n
V
= 0.5 V to 2.5 V,
A
= 1
25°C
25°C
25°C
0.02%
0.08%
0.55%
O
V
f = 10 kHz,
R
C
THD + N Total harmonic distortion plus noise
Gain-bandwidth product
A
V
= 10
= 1 kΩ,
= 100 pF
L
L
A
= 100
R = 1 kΩ,
L
V
f = 10 kHz,
= 100 pF
25°C
25°C
25°C
25°C
4.7
1
MHz
MHz
C
L
V
R
= 2 V,
A
= 1,
= 100 pF
L
O(PP)
= 1 kΩ,
V
B
OM
Maximum output swing bandwidth
Settling time
C
L
A
= –1,
V
to 0.1%
1.6
2.2
Step = 0.5 V to 2.5 V,
t
s
µs
R
C
= 1 kΩ,
= 100 pF
L
L
to 0.01%
φ
m
Phase margin at unity gain
Calibration time
R
= 1 kΩ,
C = 100 pF
L
25°C
25°C
74
L
300
ms
†
Full range is –40°C to 125°C.
NOTE 4:
R and C values are referenced to 2.5 V.
L L
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
electrical characteristics at specified free-air temperature, V
noted)
= 5 V, GND = 0 (unless otherwise
DD
TLC4502Q,
TLC4502M
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
10
MAX
100
50
TLC4502
TLC4502A
–100
–50
V
V
= ±2.5 V,
= 0,
V
R
= 0,
= 50 Ω
DD
IC
O
S
V
Input offset voltage
Full range
Full range
µV
µV/°C
nA
IO
10
Temperature coefficient of input
offset voltage
α
1
1
VIO
25°C
125°C
25°C
60
5
V
V
= ±2.5 V,
= 0,
V
R
= 0,
= 50 Ω
DD
IC
O
I
I
Input offset current
Input bias current
IO
S
1
60
10
nA
IB
125°C
25°C
I
I
= – 500 µA
= – 5 mA
= 2.5 V,
4.99
4.9
OH
V
V
High-level output voltage
Low-level output voltage
25°C
V
OH
OH
Full range
25°C
4.7
V
V
I
I
= 500 µA
0.01
0.1
IC
OL
25°C
V
OL
= 2.5 V,
= 5 mA
IC
OL
Full range
25°C
0.3
200
200
1000
Large-signal differential voltage
amplification
V
IC
R
= 2.5 V,
= 1 kΩ,
V
O
= 1 V to 4 V,
A
VD
V/mV
See Note 4
Full range
25°C
L
R
Differential input resistance
Input resistance
10
kΩ
Ω
I(D)
L
12
10
R
C
See Note 4
f = 10 kHz,
25°C
Common-mode input capacitance
Closed-loop output impedance
P package
f = 100 kHz
25°C
8
1
pF
Ω
L
z
A
V
= 10,
25°C
O
25°C
90
85
90
90
100
V
R
= 0 to 2.7 V,
= 1 kΩ
V
= 2.5 V,
O
IC
S
CMRR
Common-mode rejection ratio
dB
dB
Full range
25°C
100
2.5
Supply-voltage rejection ratio
V
= 4 V to 6 V,
V
= V
/2,
DD
DD
IC
k
SVR
(∆V
DD ±
/∆V
IO
)
No load
Full range
25°C
3.5
4
I
Supply current
V
O
= 2.5 V,
No load
mA
V
DD
Full range
Full range
V
Calibration input threshold voltage
Full range is –40°C to 125°C for Q suffix, –55°C to 125°C for M suffix.
NOTE 4: and C values are referenced to 2.5 V.
4
IT(CAL)
†
R
L
L
8
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FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
operating characteristics, V
= 5 V
DD
TLC4502Q, TLC4502M,
TLC4502AQ,
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
TLC4502AM
MIN
1.5
1
TYP
MAX
25°C
Full range
25°C
2.5
V/µs
V/µs
V
= 0.5 V to 2.5 V,
C
= 100 pF
L
O
SR
Slew rate at unity gain
See Note 4
f = 10 Hz
70
12
1
V
n
Equivalent input noise voltage
nV/√Hz
f = 1 kHz
25°C
f = 0.1 to 1 Hz
f = 0.1 to 10 Hz
25°C
Peak-to-peak equivalent input noise
voltage
V
I
µV
N(PP)
25°C
1.5
0.6
Equivalent input noise current
25°C
fA/√Hz
n
V
= 0.5 V to 2.5 V,
A
= 1
25°C
25°C
25°C
0.02%
0.08%
0.55%
O
V
f = 10 kHz,
R
C
THD + N Total harmonic distortion plus noise
Gain-bandwidth product
A
V
= 10
= 1 kΩ,
= 100 pF
L
L
A
= 100
R = 1 kΩ,
L
V
f = 10 kHz,
= 100 pF
25°C
25°C
25°C
25°C
4.7
1
MHz
MHz
C
L
V
R
= 2 V,
A
= 1,
= 100 pF
L
O(PP)
= 1 kΩ,
V
B
OM
Maximum output swing bandwidth
Settling time
C
L
A
= –1,
V
to 0.1%
1.6
2.2
Step = 0.5 V to 2.5 V,
t
s
µs
R
C
= 1 kΩ,
= 100 pF
L
L
to 0.01%
φ
m
Phase margin at unity gain
Calibration time
R
= 1 kΩ,
C = 100 pF
L
25°C
25°C
74
L
300
ms
†
Full range is –40°C to 125°C for Q suffix, –55°C to 125°C for M suffix.
NOTE 4: and C values are referenced to 2.5 V.
R
L
L
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Distribution
2, 3, 4
5
V
Input offset voltage
IO
vs Common-mode input voltage
Distribution
VIO
α
Input offset voltage temperature coefficient
High-level output voltage
6, 7
8
V
V
V
vs High-level output current
vs Low-level output current
vs Frequency
OH
Low-level output voltage
9
OL
Maximum peak-to-peak output voltage
Short-circuit output current
Output voltage
10
11
O(PP)
I
vs Free-air temperature
vs Differential input voltage
OS
V
O
12
vs Free-air temperature
vs Frequency
13
14
A
Large-signal differential voltage amplification
Output impedance
VD
o
z
vs Frequency
15
vs Frequency
vs Free-air temperature
16
17
CMRR
SR
Common-mode rejection ratio
vs Load capacitance
vs Free-air temperature
18
19
Slew rate
Inverting large-signal pulse response
Voltage-follower large-signal pulse response
Inverting small-signal pulse response
Voltage-follower small-signal pulse response
Equivalent input noise voltage
20
21
22
23
24
25
26
27
28
14
29
30
31
32
33
V
vs Frequency
n
Input noise voltage
Over a 10-second period
vs Frequency
THD + N Total harmonic distortion plus noise
Gain-bandwidth product
vs Free-air temperature
vs Load capacitance
vs Frequency
φ
m
Phase margin
Gain margin
vs Load capacitance
vs Free-air temperature
PSRR
Power-supply rejection ratio
Calibration time at –40°C
Calibration time at 25°C
Calibration time at 85°C
Calibration time at 125°C
34
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC4502 INPUT
DISTRIBUTION OF TLC4502 INPUT
OFFSET VOLTAGE
OFFSET VOLTAGE
18
16
14
12
10
339 Amplifier From 2 Wafer Lot
486 Amplifier From 8 Wafer Lot
V = ± 2.5 V
DD
T = 40°C
V
= ± 2.5 V
DD
T = 25°C
A
A
14
12
10
8
8
6
6
4
4
2
0
2
0
V
IO
– Input Offset Voltage – µV
V
IO
– Input Offset Voltage – µV
Figure 2
Figure 3
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
DISTRIBUTION OF TLC4502 INPUT
OFFSET VOLTAGE
16
14
12
10
200
150
296 Amplifier From 2 Wafer Lot
= ± 2.5 V
T
A
V
R
T
A
= ±2.5 V
= 50 Ω
= 25°C
DD
S
V
DD
= 85°C
100
50
8
6
4
0
–50
–100
–150
–200
2
0
–3
–2
–1
0
1
2
3
V
IC
– Common-Mode Input Voltage – v
V
IO
– Input Offset Voltage – µV
Figure 4
Figure 5
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC4502 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
DISTRIBUTION OF TLC4502 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
25
20
15
20
30 Amplifiers From 1 Wafer Lot
30 Amplifiers From
V = ± 2.5 V
DD
= 25°C To –40°C
18 1 Wafer Lot
T
A
V = ± 2.5 V
DD
= 25°C To 85°C
16
14
T
A
12
10
8
10
6
4
5
0
2
0
–3
–2
–1
0
1
2
3
α
– Temperature Coefficient – µV/°C
VIO
α
– Temperature Coefficient – µV/°C
VIO
Figure 6
Figure 7
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
2
5
V
= 5 V
= 2.5 V
DD
V
V
= 5 V
T
= –40°C
DD
= 2.5 V
A
4.5
4
V
IC
1.75
1.5
IC
T
= 125°C
A
T
A
= 125°C
3.5
T = 85°C
A
T
A
= 25°C
1.25
3
2.5
2
T
A
= 25°C
T
A
= 85°C
1
0.75
T
A
= –40°C
1.5
1
0.5
0.25
0
0.5
0
0
10
20
30
40
50
60
70
80
0
10
20
30
40
50
60
70
80
I
– Low-Level Output Current – mA
OL
I
– High-Level Output Current – mA
OH
Figure 8
Figure 9
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
SHORT-CIRCUIT OUTPUT CURRENT
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
vs
FREE-AIR TEMPERATURE
FREQUENCY
10
8
69
67
65
V
DD
= 5 V
I
OS+
I
OS–
6
63
61
4
59
57
55
2
0
–50
–25
0
25
50
75
100
100
1 k
10 k
100 k
1 M
10 M
T
A
– Free-Air Temperature – °C
f – Frequency – Hz
Figure 10
Figure 11
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
DIFFERENTIAL INPUT VOLTAGE
3
2
1
1600
1400
V
V
R
= 5 V
DD
IC
L
R
= 1 kΩ
L
= 2.5 V
= 1 kΩ
= 25°C
T
A
1200
1000
800
0
–1
–2
–3
600
400
200
0
–0.2 –0.15 –0.1 –0.05
0
0.05 0.1 0.15
0.2
–55 –30
–5
20
45
70
95
120
V
ID
– Differential Input Voltage – mV
T
A
– Free-Air Temperature – °C
Figure 12
Figure 13
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
80
60
40
180°
135°
90°
V
R
C
= 5 V
= 1 kΩ
= 100 pF
= 25°C
DD
L
L
T
A
20
45°
0
0°
–20
–45°
–40
–90°
100 M
1 k
10 k
100 k
1 M
10 M
f – Frequency – Hz
Figure 14
OUTPUT IMPEDANCE
vs
FREQUENCY
1000
100
10
1
A
V
= 100
0.1
A
V
= 10
0.01
A
V
= 1
0.001
100
1 k
10 k
100 k
1 M
f – Frequency – Hz
Figure 15
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
COMMON-MODE REJECTION RATIO
COMMON-MODE REJECTION RATIO
vs
vs
FREQUENCY
FREE-AIR TEMPERATURE
110
100
130
125
120
V
V
T
A
= 5 V
V
DD
= 5 V
DD
= 2.5 V
IC
= 25°C
90
80
70
115
60
50
40
30
110
105
100
95
20
10
90
100
1 k
10 k
100 k
1 M
10 M
–50 –25
0
25
50
75
100
125
T
A
– Free-Air Temperature – °C
f – Frequency – Hz
Figure 16
Figure 17
SLEW RATE
vs
LOAD CAPACITANCE
SLEW RATE
vs
FREE-AIR TEMPERATURE
6
8
6
V
DD
= 5 V
R
C
A
= 1 kΩ
= 100 pF
= 1
L
L
V
5
4
SR–
SR+
SR–
3
2
4
SR+
2
0
1
0
10
100
1 k
10 k
100 k
–50 –25
0
25
50
75
100
125
C
– Load Capacitance – pF
L
T
A
– Free-Air Temperature – °C
Figure 18
Figure 19
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
INVERTING LARGE-SIGNAL PULSE RESPONSE
4.5
4.5
4
4
3.5
3.5
3
3
2.5
2
2.5
2
V
R
C
= 5 V
= 1 kΩ
= 100 pF
= –1
DD
L
L
V
R
C
= 5 V
= 1 kΩ
= 100 pF
= 1
DD
L
L
1.5
1
1.5
1
A
V
A
A
V
A
T
= 25°C
T
= 25°C
0.5
0.5
0
25
50
75
100 125
150 175 200
0
25
50
75 100 125 150 175 200
t – Time – µs
t – Time – µs
Figure 20
Figure 21
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
INVERTING SMALL-SIGNAL PULSE RESPONSE
2.53
2.52
2.51
2.5
2.525
V
R
C
= 5 V
= 1 kΩ
= 100 pF
= 1
DD
L
L
2.52
2.515
A
V
A
T
= 25°C
2.51
2.505
2.5
2.495
2.49
2.49
V
R
C
= 5 V
= 1 kΩ
= 100 pF
= –1
DD
L
L
2.485
2.48
2.48
2.47
A
V
A
T
25°C
2.475
2.47
0
50
100
150
200
250
0
20 40 60 80 100 120 140 160 180 200
t – Time – µs
t – Time – µs
Figure 22
Figure 23
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
EQUIVALENT INPUT NOISE VOLTAGE
INPUT NOISE VOLTAGE OVER
A 10-SECOND PERIOD
vs
FREQUENCY
1200
400
100
90
V
R
T
A
= 5 V
= 20 Ω
= 25°C
DD
S
V
= 5 V
DD
f = 0.1 Hz To 10 Hz
= 25°C
T
A
80
70
60
50
40
30
–400
20
10
0
–1200
0
1
2
3
4
5
6
7
8
9
10
10
100
1 k
10 k
100 k
t – Time – s
f – Frequency – Hz
Figure 24
Figure 25
GAIN-BANDWIDTH PRODUCT
vs
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREE-AIR TEMPERATURE
FREQUENCY
1
6
V
R
= 5 V
= 1 kΩ TIED 2.5 V
V
= 5 V
DD
L
DD
F = 10 kHz
R
C
= 1 kΩ
= 100 pF
L
L
5.5
5
A
V
= 100
0.1
A
V
= 10
4.5
4
A
V
= 1
0.01
–40
–25
0
25
50
75
85
100
1 k
10 k
100 k
T
A
– Free-Air Temperature –°C
f – Frequency – Hz
Figure 26
Figure 27
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
PHASE MARGIN
vs
GAIN MARGIN
vs
LOAD CAPACITANCE
LOAD CAPACITANCE
90
30
25
20
T
A
25°C
75
60
45
R
= 50 Ω
null
R
= 20 Ω
null
R
= 50 Ω
15
null
R
= 20 Ω
null
= 0
30
10
5
50 kΩ
R
= 0
null
V
DD +
R
50 kΩ
R
null
null
15
0
V
–
+
I
C
L
V
DD –
0
10
100
1 k
10 k
100 k
10
100
1 k
10 k
100 k
C
L
– Load Capacitance – pF
C
– Load Capacitance – pF
L
Figure 28
Figure 29
POWER SUPPLY REJECTION RATIO
vs
CALIBRATION TIME AT –40°C
FREE-AIR TEMPERATURE
0.5
0
130
125
V
V
= 4 V To 6 V
DD
= V = V /2
IC
O
DD
–0.5
–1
120
115
110
–1.5
–2
V
= 2.5 V
DD
GND = –2.5 V
R
= 1 kΩ to GND
= –1
L
105
100
–2.5
–3
A
V
V = 0
I
0
100 200 300 400 500 600 700 800 900 1000
–50 –25
0
25
50
75
100
125
T
A
– Free-Air Temperature – °C
t – Time – ms
Figure 30
Figure 31
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
CALIBRATION TIME AT 25°C
CALIBRATION TIME AT 85°C
0.5
0
0.5
0
–0.5
–0.5
–1
–1
–1.5
–2
–1.5
V
= 2.5 V
DD
GND = –2.5 V
V
= 2.5 V
–2
DD
GND = –2.5 V
R
= 1 kΩ to GND
= –1
L
R
= 1 kΩ to GND
A = –1
V
L
A
V
–2.5
–3
–2.5
–3
V = 0
I
V = 0
I
0
100 200 300 400 500 600 700 800 900 1000
0
100 200 300 400 500 600 700 800 900 1000
t – Time – ms
t – Time – ms
Figure 32
Figure 33
CALIBRATION TIME AT 125°C
0.5
0
–0.5
–1
–1.5
–2
V
= 2.5 V
DD
GND = –2.5 V
R
= 1 kΩ to GND
A = –1
V
L
–2.5
–3
V = 0
I
0
100 200 300 400 500 600 700 800 900 1000
t – Time – ms
Figure 34
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
APPLICATION INFORMATION
The TLC4502 is designed to operate with only a single 5-V power supply, have true differential inputs, and
remain in the linear mode with an input common-mode voltage of 0.
The TLC4502 has a standard dual-amplifier pinout, allowing for easy design upgrades.
Large differential input voltages can be easily accommodated and, as input differential-voltage protection
diodes are not needed, no large input currents result from large differential input voltage. Protection should
be provided to prevent the input voltages from going negative more than –0.3 V at 25°C. An input clamp
diode with a resistor to the device input terminal can be used for this purpose.
For ac applications, where the load is capacitively coupled to the output of the amplifier, a resistor can be
used from the output of the amplifier to ground. This increases the class-A bias current and prevents
crossoverdistortion. Wheretheloadisdirectlycoupled, forexampleindcapplications, thereisnocrossover
distortion.
Capacitive loads, which are applied directly to the output of the amplifier, reduce the loop stability margin.
Values of 500 pF can be accommodated using the worst-case noninverting unity-gain connection. Resistive
isolation should be considered when larger load capacitance must be driven by the amplifier.
The following typical application circuits emphasize operation on only a single power supply. When
complementary power supplies are available, the TLC4502 can be used in all of the standard operational
amplifier circuits. In general, introducing a pseudo-ground (a bias voltage of V /2 like that generated by the
I
TLE2426) allows operation above and below this value in a single-supply system. Many application circuits
shown take advantage of the wide common-mode input-voltage range of the TLC4502, which includes ground.
In most cases, input biasing is not required and input voltages that range to ground can easily be
accommodated.
description of calibration procedure
To achieve high dc gain, large bandwidth, high CMRR and PSRR, as well as good output drive capability, the
TLC4502 is built around a 3-stage topology: two gain stages, one rail-to-rail, and a class-AB output stage. A
nested Miller topology is used for frequency compensation.
During the calibration procedure, the operational amplifier is removed from the signal path and both inputs are
tied to GND. Figure 35 shows a block diagram of the amplifier during calibration mode.
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
V
DD
Q
Q
ENABLE
RC
OSCILLATOR
POWER-ON RESET
COUNTER
RCO
S
R
–
CAL
CLOCK
RESET
CORE
AMPLIFIER
DAC
SAR
+
LPF
RCO
Figure 35. Block Diagram During Calibration Mode
The class AB output stage features rail-to-rail voltage swing and incorporates additional switches to put the
output node into a high-impedance mode during the calibration cycle. Small-replica output transistors (matched
to the main output transistors) provide the amplifier output signal for the calibration circuit. The TLC4502 also
features built-in output short-circuit protection. The output current flowing through the main output transistors
is continuously being sensed. If the current through either of these transistors exceeds the preset limit (60 mA
– 70 mA) for more than about 1 µs, the output transistors are shut down to approximately their quiescent
operating point for approximately 5 ms. The device is then returned to normal operation. If the short circuit is
still in place, it is detected in less than 1 µs and the device is shut down for another 5 ms.
The offset cancellation uses a current-mode digital-to-analog converter (DAC), whose full-scale current allows
for an adjustment of approximately ±5 mV to the input offset voltage. The digital code producing thecancellation
current is stored in the successive-approximation register (SAR).
During power up, when the offset cancellation procedure is initiated, an on-chip RC oscillator is activated to
provide the timing of the successive-approximation algorithm. To prevent wide-band noise from interfering with
the calibration procedure, an analog low-pass filter followed by a Schmitt trigger is used in the decision chain
to implement an averaging process. Once the calibration procedure is complete, the RC oscillator is deactivated
to reduce supply current and the associated noise.
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
APPLICATION INFORMATION
The key operational-amplifier parameters CMRR, PSRR, and offset drift were optimized to achieve superior
offset performance. The TLC4502 calibration DAC is implemented by a binary-weighted current array using a
pseudo-R-2R MOSFET ladder architecture, which minimizes the silicon area required for the calibration
circuitry, and thereby reduces the cost of the TLC4502.
Due to the performance (precision, PSRR, CMRR, gain, output drive, and ac performance) of the TLC4502, it
is ideal for applications like:
Data acquisition systems
Medical equipment
Portable digital scales
Strain gauges
Automotive sensors
Digital audio circuits
Industrial control applications
It is also ideal in circuits like:
A precision buffer for current-to-voltage converters, a/d buffers, or bridge applications
High-impedance buffers or preamplifiers
Long term integration
Sample-and-hold circuits
Peak detectors
The TLC4502 self-calibrating operational amplifier is manufactured using Texas instruments LinEPIC process
technology and is available in an 8-pin SOIC (D) Package. The C-suffix devices are characterized for operation
from 0°C to 70°C. The I-suffix devices are characterized for operation from –40°C to 125°C. The M-suffix
devices are characterized for operation from –55°C to 125°C.
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
APPLICATION INFORMATION
R1
R2
R3
R4
R5
R6
V
V
(REF)+
90 kΩ
9 kΩ
1 kΩ
1 kΩ
9 kΩ
90 kΩ
(REF)–
Gain = 10
Gain = 100
Gain = 100
Gain = 10
V
DD
0.1 pF
8
6
2
3
–
–
1/2
TLC4502
1/2
TLC4502
1
7
V
V
O+
R
P
O–
5
V
V
+
+
I2
4
1 kΩ
R
P
I1
1 kΩ
R6
R4 R5
(Gain
10)
V
V
V
V
1
1
V
V
O
I1
I1
I2
I2
(REF) Where R1
(REF) Where R1
R6, R2
R6, R2
R5, and R3
R5, and R3
R4
R4
R5 R6
R4
(Gain
100)
V
V
O
Figure 36. Single-Supply Programmable Instrumentation Amplifier Circuit
R
R
< 1 kΩ
P1
P2
5
6
+
V
I
< 1 kΩ
1/2
TLC4502
3
2
+
V
O
7
R3
1/2
TLC4502
–
4
1
–
R4
R2
R
G
R4
R3
2R4
V
V
1
V
R1
O
I
(REF)
R
G
Where : R1
R4 and R2
R3
V
(REF)
Figure 37. Two Operational-Amplifier Instrumentation Amplifier Circuit
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
APPLICATION INFORMATION
3
2
+
R3
R5
1/2
TLC4502
1
–
R1
R2
2
–
1/2
TLC4502
V
I
V
O
R
G
1
3
+
6
5
–
R4
1/2
TLC4502
7
+
R6
R5
R3
2R1
V
V
1
V
O
I
(REF)
R
G
V
(REF)
Where : R1
R2, R3
R4, and R5
R6
Figure 38. Three Operational-Amplifier Instrumentation Amplifier Circuit
V
I
R1
R2
R4
2
3
–
1/2
TLC4502
1
R5
+
I1
I2
R3
Figure 39. Fixed Current-Source Circuit
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
APPLICATION INFORMATION
2
3
–
1/2
TLC4502
1
V
O
V
I
+
V
V
I
O
Figure 40. Voltage-Follower Circuit
V
I
2
–
β ≥ 20
30 mA
600 mA
1/2
TLC4502
1
100 Ω
3
+
Figure 41. Lamp-Driver Circuit
2
3
–
1/2
TLC4502
1
+
R
L
240 Ω
Figure 42. TTL-Driver Circuit
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
APPLICATION INFORMATION
I
O
3
2
+
–
V
V
I
1/2
TLC4502
1
R
E
I
I
O
R
E
Figure 43. High-Compliance Current-Sink Circuit
2
3
–
V
I
1/2
TLC4502
1
V
O
R1
10 kΩ
V
(REF)
+
R2
10 MΩ
Figure 44. Comparator With Hysteresis Circuit
I
B
6
5
–
1/2
TLC4502
2
3
–
7
V
O
I
B
Z
O
1/2
TLC4502
1
+
C1
1 µF
V
I
+
Z
I
Figure 45. Low-Drift Detector Circuit
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal )
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221B – MAY 1998 – REVISED APRIL 2001
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts Release 8, the model generation
software used with Microsim PSpice . The Boyle macromodel (see Note 4) and subcircuit in Figure 46 are
generated using the TLC4501 typical electrical and operating characteristics at T = 25°C. Using this
A
information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most
cases):
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
Unity-gain frequency
Common-mode rejection ratio
Phase margin
Quiescent power dissipation
Input bias current
DC output resistance
AC output resistance
Short-circuit output current limit
Open-loop voltage amplification
NOTE 4: G. R. Boyle, B. M. Cohn, D. O. Pederson, andJ. E. Solomon, “MacromodelingofIntegratedCircuitOperationalAmplifiers”, IEEEJournal
of Solid-State Circuits, SC-9, 353 (1974).
99
EGND
+
FB
RO2
–
C2
R2
VB
6
3
7
V
DD+
+
+
9
VLIM
RSS
VD
ISS
CSS
+
–
–
8
GA
GCM
RP
53
–
10
2
1
IN –
DC
RO1
J1
J2
OUT
IN+
5
DLN
DE
11
12
92
54
C1
91
+
90
DP
+
–
+
RD1
RD2
DLP
VLP
VLN
VE
HLIM
–
+
–
–
4
V
DD–
.subckt TLC4501 1 2 3 4 5
*
r2
6
9
100.00E3
4.2328E3
4.2328E3
5.0000E–3
5.0000E–3
5.0000E3
10.000E6
dc 0
dc .92918
dc .82918
dc 0
dc 67
dc 67
rd1
rd2
ro1
ro2
rp
3
11
12
5
c1
11
6
12
7
1.4559E–12
3
c2
8.0000E–12
8
css
dc
10
5
99
53
5
91
90
3
0
99
1.0000E–30
7
99
4
dy
dy
dx
dx
dx
3
de
54
90
92
4
rss
vb
vc
ve
vlim
vlp
vln
10
9
99
0
dlp
dln
dp
3
53
4
54
7
egnd
fb
99
7
poly(2) (3,0) (4,0) 0 .5 .5
poly(5) vb vc ve vlp vln 0
8
91
0
0
+ 84.657E9 –1E3 1E3 85E9 –85E9
92
ga
6
0
0
6
4
0
2
1
11 12 236.25E–6
10 99 2.3625E–9
dc 20.000E–6
vlim 1K
10 jx1
10 jx2
.model dx D(Is=800.00E–18)
.model dy D(Is=800.00E–18 Rs=1m Cjo=10p)
.model jx1 NJF(Is=500.00E–15 Beta=2.7907E–3 Vto=–1)
.model jx2 NJF(Is=500.00E–15 Beta=2.7907E–3 Vto=–1)
.ends
gcm
iss
hlim
j1
10
90
11
12
j2
Figure 46. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-9753701Q2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
9753701Q2A
TLC4502
MFKB
5962-9753701QHA
5962-9753701QPA
5962-9753702Q2A
ACTIVE
ACTIVE
ACTIVE
CFP
CDIP
LCCC
U
10
8
1
1
1
TBD
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
-55 to 125
9753701QHA
TLC4502M
JG
FK
9753701QPA
TLC4502M
20
POST-PLATE
5962-
9753702Q2A
TLC4502
AMFKB
5962-9753702QHA
5962-9753702QPA
TLC4501ACD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
CFP
CDIP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
U
JG
D
10
8
1
1
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
9753702QHA
TLC4502AM
A42
9753702QPA
TLC4502AM
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
4501AC
4501AC
4501AI
4501AI
4501AI
4501AI
TLC4501ACDG4
TLC4501AID
D
8
75
Green (RoHS
& no Sb/Br)
D
8
75
Green (RoHS
& no Sb/Br)
TLC4501AIDG4
TLC4501AIDR
D
8
75
Green (RoHS
& no Sb/Br)
D
8
2500
2500
Green (RoHS
& no Sb/Br)
TLC4501AIDRG4
D
8
Green (RoHS
& no Sb/Br)
TLC4501AQD
TLC4501AQDR
TLC4501CD
PREVIEW
PREVIEW
ACTIVE
SOIC
SOIC
SOIC
D
D
D
8
8
8
TBD
TBD
Call TI
Call TI
Call TI
Call TI
-40 to 125
-40 to 125
75
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
4501C
4501C
TLC4501CDG4
ACTIVE
SOIC
D
8
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
TLC4501ID
TLC4501IDG4
TLC4501IDR
TLC4501IDRG4
ACTIVE
SOIC
SOIC
SOIC
SOIC
D
8
8
8
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
4501I
4501I
4501I
4501I
ACTIVE
ACTIVE
ACTIVE
D
D
D
75
Green (RoHS
& no Sb/Br)
2500
2500
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TLC4501QD
TLC4501QDR
TLC4502ACD
PREVIEW
PREVIEW
ACTIVE
SOIC
SOIC
SOIC
D
D
D
8
8
8
TBD
TBD
Call TI
Call TI
Call TI
Call TI
-40 to 125
-40 to 125
75
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
4502AC
4502AC
4502AC
4502AC
4502AI
4502AI
4502AI
4502AI
4502AM
4502AM
TLC4502ACDG4
TLC4502ACDR
TLC4502ACDRG4
TLC4502AID
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
LCCC
D
D
8
8
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
POST-PLATE
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
2500
2500
75
Green (RoHS
& no Sb/Br)
D
8
Green (RoHS
& no Sb/Br)
D
8
Green (RoHS
& no Sb/Br)
TLC4502AIDG4
TLC4502AIDR
D
8
75
Green (RoHS
& no Sb/Br)
D
8
2500
2500
75
Green (RoHS
& no Sb/Br)
TLC4502AIDRG4
TLC4502AMD
D
8
Green (RoHS
& no Sb/Br)
D
8
Green (RoHS
& no Sb/Br)
-55 to 125
TLC4502AMDG4
TLC4502AMFKB
D
8
75
Green (RoHS
& no Sb/Br)
FK
20
1
TBD
-55 to 125
-55 to 125
5962-
9753702Q2A
TLC4502
AMFKB
TLC4502AMJGB
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
9753702QPA
TLC4502AM
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-55 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
TLC4502AMUB
ACTIVE
CFP
U
10
1
TBD
A42
N / A for Pkg Type
9753702QHA
TLC4502AM
TLC4502AQD
OBSOLETE
ACTIVE
SOIC
SOIC
D
D
8
8
TBD
Call TI
Call TI
-40 to 125
C4502A
TLC4502AQDG4
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
C4502A
TLC4502AQDR
OBSOLETE
ACTIVE
SOIC
SOIC
D
D
8
8
TBD
Call TI
Call TI
-40 to 125
C4502A
C4502A
TLC4502AQDRG4
2500
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502CD
TLC4502CDG4
TLC4502CDR
TLC4502CDRG4
TLC4502ID
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
D
D
D
8
8
8
8
8
8
8
8
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
4502C
4502C
4502C
4502C
4502I
4502I
4502I
4502I
75
Green (RoHS
& no Sb/Br)
2500
2500
75
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TLC4502IDG4
TLC4502IDR
75
Green (RoHS
& no Sb/Br)
2500
2500
Green (RoHS
& no Sb/Br)
TLC4502IDRG4
Green (RoHS
& no Sb/Br)
TLC4502MD
OBSOLETE
ACTIVE
SOIC
SOIC
D
D
8
8
TBD
Call TI
Call TI
-55 to 125
-55 to 125
4502M
4502M
TLC4502MDG4
75
1
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TLC4502MFKB
ACTIVE
LCCC
FK
20
TBD
POST-PLATE
N / A for Pkg Type
5962-
9753701Q2A
TLC4502
MFKB
TLC4502MJG
ACTIVE
ACTIVE
CDIP
CDIP
JG
JG
8
8
1
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
TLC4502MJG
TLC4502MJGB
9753701QPA
TLC4502M
TLC4502MUB
ACTIVE
CFP
U
10
1
TBD
A42
N / A for Pkg Type
-55 to 125
9753701QHA
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
TLC4502M
TLC4502QD
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
C4502Q
TLC4502QDG4
75
Green (RoHS
& no Sb/Br)
C4502Q
TLC4502QDR
OBSOLETE
ACTIVE
SOIC
SOIC
D
D
8
8
TBD
Call TI
Call TI
-40 to 125
C4502Q
C4502Q
TLC4502QDRG4
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 4
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLC4502, TLC4502A, TLC4502AM, TLC4502M :
Catalog: TLC4502A, TLC4502
•
Military: TLC4502M, TLC4502AM
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 5
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLC4501AIDR
TLC4501IDR
TLC4502ACDR
TLC4502AIDR
TLC4502CDR
TLC4502IDR
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
D
8
8
8
8
8
8
2500
2500
2500
2500
2500
2500
330.0
330.0
330.0
330.0
330.0
330.0
12.4
12.4
12.4
12.4
12.4
12.4
6.4
6.4
6.4
6.4
6.4
6.4
5.2
5.2
5.2
5.2
5.2
5.2
2.1
2.1
2.1
2.1
2.1
2.1
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TLC4501AIDR
TLC4501IDR
TLC4502ACDR
TLC4502AIDR
TLC4502CDR
TLC4502IDR
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
D
8
8
8
8
8
8
2500
2500
2500
2500
2500
2500
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
35.0
35.0
35.0
35.0
35.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.063 (1,60)
0.015 (0,38)
0.020 (0,51) MIN
0.200 (5,08) MAX
0.130 (3,30) MIN
Seating Plane
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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