5962-9164001MXA [TI]
CMOS 四路差动线路接收器 | NAC | 16 | -55 to 125;型号: | 5962-9164001MXA |
厂家: | TEXAS INSTRUMENTS |
描述: | CMOS 四路差动线路接收器 | NAC | 16 | -55 to 125 驱动 接口集成电路 线路驱动器或接收器 驱动程序和接口 |
文件: | 总16页 (文件大小:410K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DS26C32AMQML
DS26C32AMQML Quad Differential Line Receiver
Literature Number: SNOSAS3
October 26, 2010
DS26C32AMQML
Quad Differential Line Receiver
General Description
with 6 mA source and sink capability. This product is pin com-
patible with the DS26LS32A and the AM26LS32.
The DS26C32A is a quad differential line receiver designed
to meet the RS-422, RS-423, and Federal Standards 1020
and 1030 for balanced and unbalanced digital data transmis-
Features
■
CMOS design for low power
sion, while retaining the low power characteristics of CMOS.
±0.2V sensitivity over input common mode voltage range
Input fail-safe circuitry.
■
■
■
■
■
The DS26C32A has an input sensitivity of 200 mV over the
common mode input voltage range of ±7V. The DS26C32A
features internal pull-up and pull-down resistors which pre-
vent output oscillation on unused channels.
Inputs won't load line when VCC = 0V
Meets the requirements of EIA standard RS-422
TRI-STATE outputs for connection to system buses
The DS26C32A provides an enable and disable function com-
mon to all four receivers, and features TRI-STATE ® outputs
Ordering Information
NS Part Number
SMD Part Number
5962–9164001M2A
5962–9164001MEA
5962–9164001MFA
5962–9164001MXA
NS Package Number
Package Description
20LD Leadless Chip Carrier
16LD Ceramic Dip
DS26C32AME/883
DS26C32AMJ/883
DS26C32AMW/883
DS26C32AMWG/883
E20A
J16A
W16A
WG16A
16LD Ceramic Flatpack
16LD Ceramic SOIC
Connection Diagrams
Dual-In-Line Package
20-Lead Ceramic Leadless Chip Carrier
20163102
Top View
20163112
See NS Package J16A, WG16A, or W16A
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 2010 National Semiconductor Corporation
201631
www.national.com
Logic Diagram
20163101
Truth Table
ENABLE ENABLE
Input
Output
L
H
X
Z
All Other
Combinations of
Enable Inputs
H
VID ≥ V Th (Max)
L
VID ≤ V Th (Min)
Open
H
Z = TRI-STATE
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2
Absolute Maximum Ratings (Note 2, Note 1)
Supply Voltage (VCC
)
7V
±14V
±14V
7V
Common Mode Range (VCM
)
Differential Input Voltage (VDiff
)
Enable Input Voltage (V I)
Storage Temperature Range (T Stg
)
−65°C ≤ TA ≤ +150°C
Lead Temperature (Soldering 4 sec.)
260°C
Recommended Operating Conditions
Min
4.50
−55
Max
5.50
+125
Units
V
Supply Voltage (VCC
)
Operating Temperature Range (TA)
°C
Quality Conformance Inspection
Mil-Std-883, Method 5005 - Group A
Subgroup
Description
Static tests at
Temp °C
1
2
+25
+125
-55
Static tests at
3
Static tests at
4
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
Settling time at
Settling time at
Settling time at
+25
+125
-55
5
6
7
+25
+125
-55
8A
8B
9
+25
+125
-55
10
11
12
13
14
+25
+125
-55
3
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DS26C32AM Electrical Characteristics
DC Parameters
Sub-
groups
Symbol
VTH
Parameter
Conditions
Notes
Min Max
Units
Minimum Differential Input
Voltage
VCC = 5V, VO = VOH or VOL
,
-200 +200
mV
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
-7 < VCM < +7
RI
II
Input Resistance
VCC = 5V, -7 < VCM < +7,
One input AC Gnd
VCC = 5V, VI = +10V,
Other Input = Gnd
VCC = 5V, VI = -10V,
Other Input = Gnd
VCC = 4.5V, VDiff = +1V,
IO = -6.0mA
4.5
11
KΩ
mA
mA
V
Input Current
+1.8
-2.7
VOH
VOL
Logical "1" Output Voltage
Logical "0" Output Voltage
3.8
2.0
VCC = 5.5V, VCC = Max,
VDiff = -1V, IO = 6.0mA
0.3
V
VIH
VIL
IOZ
Minimum Enable High Level
Voltage
(Note 3)
(Note 3)
V
V
1, 2, 3
1, 2, 3
1, 2, 3
Maximum Enable Low Level
Voltage
0.8
Maximum TRI-STATE Output
Leakage Current
VO = VCC or Gnd,
±5.0
µA
Enable = VIL, Enable = VIH
II
Maximum Enable Input Current VI = VCC or Gnd
±1.0
25
µA
1, 2, 3
1, 2, 3
ICC
Quiescent Power Supply Current VDiff = +1V, VCC = 5.5V
mA
AC Parameters - Propagation Delay Time
The following conditions apply, unless otherwise specified. VCC = 5V ±10%, CCL = 50pF, VDiff = 2.5V
Sub-
groups
Symbol
tPLH
Parameter
Conditions
Notes
Min Max
Units
Input to Output Prop Delay
Input to Output Prop Delay
Output Rise Time
VCM = 0V
VCM = 0V
VCM = 0V
VCM = 0V
35
35
9
ns
ns
ns
ns
ns
ns
ns
ns
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
tPHL
tRise
tFall
Output Fall Time
9
tPLZ
tPZL
tPHZ
tPZH
Output Disable Time
Output Enable Time
Output Disable Time
Output Enable Time
29
29
29
29
RL = 1000Ω
RL = 1000Ω
RL = 1000Ω
RL = 1000Ω
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: Unless otherwise specified, all voltages are referenced to ground.
Note 3: Parameter tested Go-No-Go only.
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4
Typical Performance Characteristics
Differential Propagation Delay
vs Temperature
Differential Propagation Delay
vs Power Supply Voltage
20163113
20163114
Differential Skew vs
Temperature
Differential Skew vs Power
Supply Voltage
20163115
20163116
Output High Voltage vs
Output High Current
Output High Voltage vs
Output High Current
20163117
20163118
5
www.national.com
Output Low Voltage vs
Output Low Current
Output Low Voltage vs
Output Low Current
20163119
20163120
Input Resistance vs
Input Voltage
ꢀ
Input Current vs Power
Supply Voltage
20163121
20163122
Hysteresis & Differential
Transition Voltage vs
Temperature
Hysteresis & Differential
Transition Voltage vs
Power Supply Voltage
20163123
20163124
www.national.com
6
Supply Current vs
Temperature
Disabled Supply Current vs
Power Supply Voltage
20163125
20163126
Supply Current vs
Data Rate
20163127
7
www.national.com
AC Test Circuit and Switching Time Waveforms
20163106
CL includes load and test jig capacitance.
S1 = VCC for tPZL, and tPLZ measurements.
S1 = Gnd for tPZH, and tPHZ measurements.
FIGURE 1. Test Circuit for TRI-STATE Output Tests
20163107
FIGURE 2. Propagation Delay
20163108
FIGURE 3. TRI-STATE®Output Enable and Disable Waveforms
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8
Typical Applications
Two-Wire Balanced Systems, RS-422
20163109
9
www.national.com
Revision History Section
Released
Revision
Section
Changes
10/26/2010
A
New Release, Corporate format
MDS data sheets converted into one Corp. data
sheet format. MNDS26C32AM-X Rev 0B0 will be
archived.
www.national.com
10
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Ceramic Leadless Chip Carrier (E)
NS Package Number E20A
16-Lead Ceramic Dual-In-Line Package (J)
NS Package Number J16A
11
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16-Lead Ceramic FlatPak (W)
NS Package Number W16A
16-Lead Ceramic FlatPak (W)
NS Package Number WG16A
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12
Notes
13
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Notes
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