5962-9095801QPA [TI]
军用级、单路、36V、6.4MHz、低失调电压 (0.6mV) 运算放大器 | JG | 8 | -55 to 125;型号: | 5962-9095801QPA |
厂家: | TEXAS INSTRUMENTS |
描述: | 军用级、单路、36V、6.4MHz、低失调电压 (0.6mV) 运算放大器 | JG | 8 | -55 to 125 放大器 运算放大器 |
文件: | 总34页 (文件大小:622K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
Excellent Output Drive Capability
Wide Operating Supply Voltage Range
V = ± 2.5 V Min at R = 100 Ω,
V
= ± 3.5 V to ± 18 V
O
L
CC ±
V
= ± 5 V
CC±
High Open-Loop Gain . . . 280 V/mV Typ
V
= ± 12.5 V Min at R = 600 Ω,
O
L
Low Offset Voltage . . . 500 µV Max
V
= ± 15 V
CC±
Low Offset Voltage Drift With Time
Low Supply Current . . . 280 µA Typ
0.04 µV/Month Typ
Decompensated for High Slew Rate and
Gain-Bandwidth Product
Low Input Bias Current . . . 5 pA Typ
A
= 0.5 Min
VD
Slew Rate = 10 V/µs Typ
Gain-Bandwidth Product = 6.5 MHz Typ
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
LOAD RESISTANCE
description
10
8
The TLE2161, TLE2161A, and TLE2161B are
JFET-input, low-power, precision operational
amplifiers manufactured using the Texas
Instruments Excalibur process. Decompensated
for stability with a minimum closed-loop gain of 5,
these devices combine outstanding output drive
capability with low power consumption, excellent
dc precision, and high gain-bandwidth product.
V
T
A
= ± 5 V
CC
= 25°C
±
6
In addition to maintaining the traditional JFET
advantages of fast slew rates and low input bias
and offset currents, the Excalibur process offers
outstanding parametric stability over time and
temperature. This results in a device that remains
precise even with changes in temperature and
over years of use.
4
2
0
10
100
1 k
10 k
R
– Load Resistance – Ω
L
AVAILABLE OPTIONS
PACKAGE
V
max
IO
SMALL
OUTLINE
(D)
CHIP
CARRIER
(FK)
CERAMIC
DIP
PLASTIC
DIP
T
A
AT 25°C
(JG)
(P)
0°C
to
70°C
500 µV
1.5 mV
3 mV
—
—
—
TLE2161BCP
TLE2161ACP
TLE2161CP
TLE2161ACD
TLE2161CD
—
—
—
—
–40°C
to
85°C
500 µV
1.5 mV
3 mV
—
TLE2161BIP
TLE2161AIP
TLE2161IP
TLE2161AID
TLE2161ID
—
—
–55°C
to
125°C
500 µV
1.5 mV
3 mV
—
—
TLE2161BMJG
TLE2161AMJG
TLE2161MJG
TLE2161BMP
TLE2161AMP
TLE2161MP
TLE2161AMD
TLE2161MD
TLE2161AMFK
TLE2161MFK
The D packages are available taped and reeled. Add R suffix to device type (e.g., TLE2161ACDR).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
description (continued)
A variety of available options includes small-outline packages and chip-carrier versions for high-density system
applications.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from – 40°C to 85°C. The M-suffix devices are characterized for operation over the full military
temperature range of – 55°C to 125°C.
FK PACKAGE
(TOP VIEW)
D, JG, OR P PACKAGE
(TOP VIEW)
OFFSET N1
IN –
NC
V
OUT
1
2
3
4
8
7
6
5
CC +
3
2
1
20 19
18
NC
V
NC
IN –
NC
IN +
4
5
6
7
8
V
OFFSET N2
17
16
15
14
CC +
CC –
NC
OUT
NC
IN +
NC
9 10 11 12 13
NC – No internal connection
equivalent schematic
V
CC +
Q9
Q13
Q32
Q14
Q18
Q29
Q33
Q36
Q37
Q4
Q16
IN +
IN –
Q19
Q25
Q40
Q43
Q27
Q34
Q23
Q3
Q5
R8
20 Ω
Q7
Q17
Q20
OUT
Q1
R6
Q35
Q11
R9
2.7 kΩ
Q28
Q10
Q30
Q38
Q39
100 Ω
C3
1.6 pF
Q24
Q6
R3
2.4 kΩ
Q42
Q41
C1
15 pF
Q31
Q15
C2 15 pF
Q2
Q8
Q21
Q22
OFFSET N1
OFFSET N2
Q12
Q26
R7
600 Ω
R4
55 kΩ
R5
60 kΩ
R2
1.1 kΩ
R1
1.1 kΩ
V
CC –
All component values are nominal.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 19 V
CC +
CC –
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 38 V
Input voltage range, V (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
ID
I
CC ±
Input current, I (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 1 mA
I
Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 80 mA
O
Total current into V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA
CC +
Total current out of V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA
CC –
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T : C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
stg
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60seconds: JG package . . . . . . . . . . . . . . . . . . . . 300°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
, and V
CC +
.
CC –
2. Differential voltages are at IN+ with respect to IN–.
3. The output may be shorted to either supply. Temperature and /or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T
= 85°C
T = 125°C
A
POWER RATING
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING
POWER RATING
A
D
FK
JG
P
725 mW
5.8 mW/°C
11.0 mW/°C
8.4 mW/°C
8.0 mW/°C
464 mW
377 mW
145 mW
1375 mW
880 mW
715 mW
275 mW
1050 mW
672 mW
546 mW
210 mW
1000 mW
640 mW
520 mW
200 mW
recommended operating conditions
C SUFFIX
I SUFFIX
M SUFFIX
MIN
UNIT
MIN
±3.5
–1.6
–11
0
MAX
±18
4
MIN
±3.5
–1.6
–11
MAX
MAX
±18
4
Supply voltage, V
±18
4
+3.5
–1.6
–11
V
V
CC
±
V
V
= ± 5 V
CC ±
Common-mode input voltage, V
IC
Operating free-air temperature, T
= ± 15 V
13
13
85
13
CC ±
70
–40
–55
125
°C
A
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
electrical characteristics at specified free-air temperature, V
= ± 5 V (unless otherwise noted)
CC ±
TLE2161C, TLE2161AC
TLE2161BC
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
3.1
4
25°C
0.8
TLE2161C
TLE2161AC
TLE2161BC
Full range
25°C
0.6
0.5
2.6
3.5
1.9
2.4
V
IO
Input offset voltage
mV
Full range
25°C
Full range
Full range
25°C
V
IC
= 0,
R
= 50 Ω
S
α
Temperature coefficient of input offset voltage
Input offset voltage long-term drift (see Note 4)
6
0.04
1
µV/°C
µV/mo
pA
VIO
25°C
I
I
Input offset current
Input bias current
IO
Full range
25°C
0.8
2
nA
3
pA
IB
Full range
nA
–1.6
to 4
–2
to 6
25°C
V
V
V
ICR
Common-mode input voltage range
–1.6
to 4
Full range
25°C
Full range
25°C
3.5
3.3
2.5
2
3.7
3.1
–3.9
–2.7
80
R
R
R
R
= 10 kΩ
L
L
V
Maximum positive peak output voltage swing
V
V
OM +
= 100 Ω
Full range
25°C
–3.7
–3.3
–2.5
–2
= 10 kΩ
L
Full range
25°C
V
OM –
Maximum negative peak output voltage swing
Large-signal differential voltage amplification
= 100 Ω
L
Full range
25°C
15
V
O
V
O
V
O
= ±2.8 V,
= 0 to 2 V,
= 0 to – 2 V,
R
R
R
= 10 kΩ
= 100 Ω
= 100 Ω
L
L
L
Full range
25°C
2
0.75
0.5
0.5
0.25
45
A
VD
V/mV
Full range
25°C
3
Full range
25°C
12
4
r
i
Input resistance
10
Ω
pF
Ω
c
z
Input capacitance
25°C
i
Open-loop output impedance
I
O
= 0
25°C
280
82
o
25°C
65
65
75
75
CMRR Common-mode rejection ratio
V =V
IC ICR
min,
R
= 50 Ω
dB
dB
µA
µA
S
Full range
25°C
93
V
R
= ±5 V to ±15 V,
= 50 Ω
CC±
k
Supply-voltage rejection ratio (∆V
/∆V )
IO
SVR
CC±
Full range
25°C
S
280
325
350
I
Supply current
CC
Full range
V
O
= 0,
No load
Supply-current change over operating
temperature range
∆I
CC
Full range
29
†
Full range is 0°C to 70°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
operating characteristics at specified free-air temperature, V
= ±5 V (unless otherwise noted)
CC ±
TLE2161C, TLE2161AC
TLE2161BC
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
25°C
7
10
SR
Slew rate (see Figure 1)
A
VD
= 5,
R
= 10 kΩ,
C = 100 pF
L
V/µs
Full
range
L
5
R
R
= 20 Ω,
= 20 Ω,
f = 10 Hz
f = 1 kHz
59
43
100
60
Equivalent input noise voltage
(see Figure 2)
S
S
V
n
25°C
nV/√Hz
Peak-to-peak equivalent input
noise voltage
V
f = 0.1 Hz to 10 Hz
f = 1 kHz
25°C
25°C
25°C
1.1
1
µV
n(PP)
I
n
Equivalent input noise current
Total harmonic distortion
fA/√Hz
V = 2 V,
O(PP)
= 10 kΩ
A
VD
= 5,
f = 10 kHz,
THD
0.025%
R
L
f = 100 kHz,
f = 100 kHz,
ε = 0.1%
R
= 10 kΩ,
C
C
= 100 pF
= 100 pF
5.8
4.3
5
Gain-bandwidth product
(see Figure 3)
L
L
L
25°C
MHz
R
= 100 kΩ,
L
t
Settling time
25°C
25°C
25°C
µs
s
ε = 0.01%
10
Maximum output-swing
bandwidth
B
A
VD
= 5,
R
= 10 kΩ
420
kHz
OM
L
A
= 5,
= 5,
R
R
= 10 kΩ,
= 100 Ω,
C
C
= 100 pF
= 100 pF
70°
84°
VD
L
L
L
L
φ
Phase margin (see Figure 3)
m
A
VD
†
Full range is 0°C to 70°C.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
electrical characteristics at specified free-air temperature, V
= ± 15 V (unless otherwise noted)
CC ±
TLE2161C, TLE2161AC
TLE2161BC
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
3
25°C
0.6
TLE2161C
TLE2161AC
TLE2161BC
Full range
25°C
3.9
1.5
2.5
0.5
1
0.5
0.3
V
IO
Input offset voltage
mV
Full range
25°C
Full range
Full range
V
IC
= 0,
R
= 50 Ω
α
Temperature coefficient of input offset voltage
6
0.04
2
µV/°C
S
VIO
Input offset voltage long-term drift
(see Note 4)
25°C
µV/mo
25°C
Full range
25°C
pA
nA
pA
nA
I
I
Input offset current
Input bias current
IO
1
3
4
IB
Full range
–11
to 13
–12
to 16
25°C
V
V
V
ICR
Common-mode input voltage range
–11
to 13
Full range
25°C
Full range
25°C
13.2
13
13.7
13.2
–13.7
–13
230
R
R
R
R
= 10 kΩ
L
L
V
Maximum positive peak output voltage swing
V
V
OM +
12.5
12
= 600 Ω
Full range
25°C
–13.2
–13
–12.5
–12
30
= 10 kΩ
L
Full range
25°C
V
OM –
Maximum negative peak output voltage swing
Large-signal differential voltage amplification
= 600 Ω
L
Full range
25°C
V
O
V
O
V
O
= ±10 V,
= 0 to 8 V,
= 0 to – 8 V,
R
R
R
= 10 kΩ
= 600 Ω
= 600 Ω
L
L
L
Full range
25°C
20
25
100
A
VD
V/mV
Full range
25°C
10
3
25
Full range
25°C
1
12
10
r
i
Input resistance
Ω
pF
Ω
c
z
Input capacitance
25°C
4
280
90
i
Open-loop output impedance
I
O
= 0
25°C
o
25°C
72
70
75
75
CMRR Common-mode rejection ratio
V
IC
= V
min,
R
= 50 Ω
dB
dB
µA
µA
ICR
S
Full range
25°C
93
V
= ±5 V to ±15 V,
CC±
k
Supply-voltage rejection ratio (∆V
/∆V
)
IO
SVR
CC±
RS = 50 Ω
Full range
25°C
290
350
375
I
Supply current
CC
Full range
VO = 0,
No load
Supply-current change over operating
temperature range
∆I
CC
Full range
34
†
Full range is 0°C to 70°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
operating characteristics at specified free-air temperature, V
= ±15 V (unless otherwise noted)
CC±
TLE2161C, TLE2161AC
TLE2161BC
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
7
TYP
MAX
25°C
10
SR
Slew rate (see Figure 1)
A
VD
= 5,
R
= 10 kΩ,
C = 100 pF
L
V/µs
L
Full range
5
R
R
= 20 Ω,
= 20 Ω,
f = 10 Hz
f = 1 kHz
70
40
100
60
Equivalent input noise voltage
(see Figure 2)
S
S
V
n
25°C
nV/√Hz
Peak-to-peak equivalent input
noise voltage
V
f = 0.1 Hz to 10 Hz
f = 1 kHz
25°C
25°C
25°C
1.1
1.1
µV
n(PP)
I
n
Equivalent input noise current
Total harmonic distortion
fA/√Hz
V = 2 V,
O(PP)
= 10 kΩ
A
VD
= 5,
f = 10 kHz,
THD
0.025%
R
L
f = 100 kHz,
f = 100 kHz,
ε = 0.1%
R
= 10 kΩ,
= 600 Ω,
C
C
= 100 pF
= 100 pF
6.4
5.6
5
Gain-bandwidth product
(see Figure 3)
L
L
L
25°C
MHz
R
L
t
Settling time
25°C
25°C
25°C
µs
s
ε = 0.01%
10
Maximum output-swing
bandwidth
B
A
VD
= 5,
R
= 10 kΩ
116
kHz
OM
L
A
= 5,
= 5,
R
R
= 10 kΩ,
= 600 Ω,
C
C
= 100 pF
= 100 pF
72°
78°
VD
L
L
L
L
φ
Phase margin (see Figure 3)
m
A
VD
†
Full range is 0°C to 70°C.
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
electrical characteristics at specified free-air temperature, V
= ± 5 V (unless otherwise noted)
CC ±
TLE2161I, TLE2161AI
TLE2161BI
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
3.1
4.4
2.6
3.9
1.9
2.7
25°C
Full range
25°C
0.8
TLE2161I
0.6
0.5
V
Input offset voltage
TLE2161AI
TLE2161BI
mV
IO
Full range
25°C
Full range
Full range
V
IC
= 0,
R
= 50 Ω
α
Temperature coefficient of input offset voltage
6
0.04
1
µV/°C
S
VIO
Input offset voltage long-term drift
(see Note 4)
25°C
µV/mo
25°C
Full range
25°C
pA
nA
pA
nA
I
I
Input offset current
Input bias current
IO
2
4
3
IB
Full range
–1.6
to
–2
to
6
25°C
4
V
ICR
Common-mode input voltage range
V
–1.6
to
Full range
4
25°C
Full range
25°C
3.5
3.1
2.5
2
3.7
3.1
–3.9
–2.7
80
R
R
R
R
= 10 kΩ
L
L
V
V
Maximum positive peak output voltage
V
V
OM +
= 100 Ω
Full range
25°C
–3.7
–3.1
–2.5
–2
= 10 kΩ
L
Full range
25°C
Maximum negative peak output voltage swing
OM –
= 100 Ω
L
Full range
25°C
15
V
V
V
= ±2.8 V,
= 0 to 2 V,
= 0 to – 2 V,
R
R
R
= 10 kΩ
= 100 Ω
= 100 Ω
O
O
O
L
L
L
Full range
25°C
2
0.75
0.5
0.5
0.25
45
A
Large-signal differential voltage amplification
V/mV
VD
Full range
25°C
3
Full range
25°C
12
4
r
i
Input resistance
10
Ω
pF
Ω
c
z
Input capacitance
25°C
i
Open-loop output impedance
I
O
= 0
25°C
280
82
o
25°C
65
65
75
65
CMRR Common-mode rejection ratio
V =V
IC ICR
min,
R
= 50 Ω
dB
dB
µA
µA
S
Full range
25°C
93
V
R
= ±5 V to ± 15 V,
= 50 Ω
CC±
k
Supply-voltage rejection ratio (∆V
/∆V
)
IO
SVR
CC±
Full range
25°C
S
280
325
350
I
Supply current
CC
Full range
V
O
= 0,
No load
Supply-current change over operating
temperature range
∆I
CC
Full range
29
†
Full range is – 40°C to 85°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
operating characteristics at specified free-air temperature, V
= ± 5 V (unless otherwise noted)
CC ±
TLE2161I, TLE2161AI
TLE2161BI
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
7
TYP
MAX
25°C
10
SR
Slew rate (see Figure 1)
A
VD
= 5,
R
= 10 kΩ,
C = 100 pF
L
V/µs
L
Full range
5
R
R
= 20 Ω,
= 20 Ω,
f = 10 Hz
f = 1 kHz
59
43
100
60
Equivalent input noise
voltage (see Figure 2)
S
S
V
n
25°C
nV/√Hz
µV
Peak-to-peak equivalent
input noise voltage
V
n(PP)
f = 0.1 Hz to 10 Hz
f = 1 kHz
25°C
25°C
25°C
1.1
1
Equivalent input noise
current
I
n
fA/√Hz
V
R
= 2 V,
A
= 5,
f = 10 kHz,
O(PP)
= 10 kΩ
VD
THD
Total harmonic distortion
0.025%
L
f = 100 kHz,
f = 100 kHz,
ε = 0.1%
R
R
= 10 kΩ,
= 100 Ω,
C
C
= 100 pF
= 100 pF
5.8
4.3
5
Gain-bandwidth product
(see Figure 3)
L
L
L
L
25°C
MHz
t
Settling time
25°C
25°C
25°C
µs
s
ε = 0.01%
10
Maximum output-swing
bandwidth
B
A
VD
= 5,
R
= 10 kΩ
420
kHz
OM
L
A
= 5,
= 5,
R
R
= 10 kΩ,
= 100 Ω,
C
C
= 100 pF
= 100 pF
70°
84°
VD
L
L
L
L
φ
Phase margin (see Figure 3)
m
A
VD
†
Full range is – 40°C to 85°C.
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
electrical characteristics at specified free-air temperature, V
= ± 15 V (unless otherwise noted)
CC ±
TLE2161I, TLE2161AI
TLE2161BI
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
3
25°C
Full range
25°C
0.6
TLE2161I
4.3
1.5
2.9
0.5
1.3
0.5
0.3
V
Input offset voltage
TLE2161AI
TLE2161BI
mV
IO
Full range
25°C
Full range
Full range
25°C
V
IC
= 0,
R
= 50 Ω
S
α
Temperature coefficient of input offset voltage
Input offset voltage long-term drift (see Note 4)
6
0.04
2
µV/°C
µV/mo
pA
VIO
25°C
I
I
Input offset current
Input bias current
IO
Full range
25°C
3
5
nA
4
pA
IB
Full range
nA
–11
to
13
–12
to
16
25°C
V
V
V
ICR
Common-mode input voltage range
–11
to
Full range
13
25°C
Full range
25°C
13.2
13
13.7
13.2
R
R
R
R
= 10 kΩ
= 600 Ω
= 10 kΩ
= 600 Ω
= ±10 V,
= 0 to 8 V,
L
L
L
L
0
0
V
V
Maximum positive peak output voltage swing
Maximum negative peak output voltage swing
V
V
OM +
12.5
12
Full range
25°C
–13.2 –13.7
–13
Full range
25°C
OM –
–12.5
–12
30
–13
230
100
25
Full range
25°C
V
V
R
R
R
= 10 kΩ
= 600 Ω
= 600 Ω
L
L
L
Full range
25°C
20
25
A
VD
Large-signal differential voltage amplification
V/mV
Full range
25°C
10
3
V = 0 to – 8 V,
0
Full range
25°C
1
12
10
r
i
Input resistance
Ω
pF
Ω
c
z
Input capacitance
25°C
4
280
90
i
Open-loop output impedance
I
O
= 0
25°C
o
25°C
72
65
75
65
CMRR Common-mode rejection ratio
V =V
IC ICR
min,
R
= 50 Ω
dB
dB
µA
µA
S
Full range
25°C
93
V
R
= ±5 V to ±15 V,
= 50 Ω
CC±
k
Supply-voltage rejection ratio (∆V
/∆V
)
IO
SVR
CC±
Full range
25°C
S
290
350
375
I
Supply current
CC
Full range
V
O
= 0,
No load
Supply-current change over operating
temperature range
∆I
CC
Full range
34
†
Full range is – 40°C to 85°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
operating characteristics at specified free-air temperature, V
= ± 15 V (unless otherwise noted)
CC ±
TLE2161I, TLE2161AI
TLE2161IB
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
7
TYP
MAX
25°C
10
SR
Slew rate (see Figure 1)
A
VD
= 5,
R
= 10 kΩ,
C = 100 pF
L
V/µs
L
Full range
5
R
R
= 20 Ω,
= 20 Ω,
f = 10 Hz
f = 1 kHz
70
40
100
60
Equivalent input noise voltage
(see Figure 2)
S
S
V
n
25°C
nV/√Hz
Peak-to-peak equivalent input
noise voltage
V
I
f = 0.1 Hz to 10 Hz
f = 1 kHz
25°C
25°C
25°C
1.1
1.1
µV
n(PP)
Equivalent input noise current
Total harmonic distortion
fA/√Hz
n
V = 2 V,
O(PP)
= 10 kΩ
A
VD
= 5,
f = 10 kHz,
THD
0.025%
R
L
f = 100 kHz,
f = 100 kHz,
ε = 0.1%
R
R
= 10 kΩ,
= 600 Ω,
C
C
= 100 pF
= 100 pF
6.4
5.6
5
Gain-bandwidth product
(see Figure 3)
L
L
L
25°C
25°C
25°C
25°C
MHz
µs
L
t
Settling time
s
ε = 0.01%
10
Maximum output-swing
bandwidth
B
A
VD
= 5,
R
= 10 kΩ
116
kHz
OM
L
A
= 5,
= 5,
R
R
= 10 kΩ,
= 600 Ω,
C
C
= 100 pF
= 100 pF
72°
78°
VD
L
L
L
L
φ
Phase margin (see Figure 3)
m
A
VD
†
Full range is – 40°C to 85°C.
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
electrical characteristics at specified free-air temperature, V
= ± 5 V (unless otherwise noted)
CC ±
TLE2161M
TLE2161AM
TLE2161BM
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
3.1
6
25°C
Full range
25°C
0.8
TLE2161M
TLE2161AM
TLE2161BM
0.6
0.5
2.6
4.6
1.9
3.1
V
IO
Input offset voltage
mV
Full range
25°C
Full range
Temperature coefficient of input offset
voltage
V
IC
= 0,
R
= 50 Ω
α
Full range
6
µV/°C
S
VIO
Input offset voltage long-term drift
(see Note 4)
25°C
0.04
1
µV/mo
25°C
Full range
25°C
pA
nA
pA
nA
I
I
Input offset current
Input bias current
IO
15
30
3
IB
Full range
–1.6
to 4
–2
to 6
25°C
V
V
V
ICR
Common-mode input voltage range
–1.6
to 4
Full range
25°C
Full range
25°C
3.5
3
3.7
3.6
3.1
–3.9
–3.5
–2.7
80
All packages
FK and JG
R
R
R
R
R
R
= 10 kΩ
= 600 Ω
= 100 Ω
= 10 kΩ
= 600 Ω
= 100 Ω
= ±2.8 V,
= 0 to 2.5 V,
V
V
L
L
L
L
L
L
0
0
2.5
2
Maximum positive peak
output voltage swing
V
OM +
packages
Full range
25°C
2.5
2
D and P
packages
Full range
25°C
–3.7
–3
–2.5
–2
–2.5
–2
15
All packages
Full range
25°C
Maximum negative peak
output voltage swing
FK and JG
packages
V
OM –
V
Full range
25°C
D and P
packages
Full range
25°C
All packages
V
V
R
R
R
R
R
= 10 kΩ
L
L
L
L
L
Full range
25°C
2
1
65
= 600 Ω
= 600 Ω
= 100 Ω
= 100 Ω
Full range
25°C
0.5
1
FK and JG
packages
16
Large-signal differential
voltage amplification
A
VD
V = 0 to – 2.5 V,
0
V/mV
Full range
25°C
0.5
0.75
0.5
0.5
0.25
45
V
= 0 to 2 V,
0
0
Full range
25°C
D and P
packages
3
V
= 0 to –2 V,
Full range
†
Full range is – 55°C to 125°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
electrical characteristics at specified free-air temperature, V
continued)
= ± 5 V (unless otherwise noted
CC ±
TLE2161M
TLE2161AM
TLE2161BM
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN TYP
MAX
12
4
r
Input resistance
25°C
25°C
10
Ω
pF
Ω
i
c
z
Input capacitance
i
Open-loop output impedance
I
= 0
25°C
280
82
o
O
25°C
65
60
75
65
CMRR Common-mode rejection ratio
V
= V
min,
R = 50 Ω
S
dB
dB
IC
ICR
Full range
25°C
93
V
R
= ±5 V to ±15 V,
CC±
k
Supply-voltage rejection ratio (∆V
/∆V
CC±
)
IO
SVR
= 50 Ω
Full range
25°C
S
280
325
350
I
Supply current
µA
µA
CC
Full range
V
= 0,
No load
O
Supply-current change over operating
temperature range
∆I
CC
Full range
39
†
Full range is – 55°C to 125°C.
operating characteristics, V
= ± 5 V, T = 25°C
A
CC ±
TLE2161M
TLE2161AM
TLE2161BM
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
10
59
43
1.1
1
MAX
SR
Slew rate (see Figure 1)
A
VD
= 5,
R
= 10 kΩ,
C = 100 pF
L
V/µs
L
R
R
= 20 Ω,
= 20 Ω,
f = 10 Hz
f = 1 kHz
S
S
V
n
Equivalent input noise voltage (see Figure 2)
nV/√Hz
V
Peak-to-peak equivalent input noise voltage
Equivalent input noise current
f = 0.1 Hz to 10 Hz
f = 1 kHz
µV
n(PP)
I
n
fA/√Hz
A
R
= 5,
= 10 kΩ
V
= 2 V, f = 10 kHz,
VD
L
O(PP)
THD
Total harmonic distortion
0.025%
f = 100 kHz,
f = 100 kHz,
ε = 0.1%
R
= 10 kΩ,
C
C
= 100 pF
= 100 pF
5.8
4.3
5
L
L
L
Gain-bandwidth product (see Figure 3)
MHz
R
= 600 kΩ,
L
t
s
Settling time
µs
ε = 0.01%
10
B
Maximum output-swing bandwidth
Phase margin (see Figure 3)
A
= 5,
= 5,
= 5,
R
R
R
= 10 kΩ
= 10 kΩ,
= 600 Ω,
420
70°
84°
kHz
OM
VD
L
L
L
A
VD
C
C
= 100 pF
= 100 pF
L
L
φ
m
A
VD
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
electrical characteristics at specified free-air temperature, V
= ±15 V (unless otherwise noted)
CC ±
TLE2161M
TLE2161AM
TLE2161BM
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
3
25°C
Full range
25°C
0.6
TLE2161M
TLE2161AM
TLE2161BM
6
0.5
0.3
1.5
3.6
0.5
1.7
V
Input offset voltage
mV
IO
Full range
25°C
Full range
Full range
V
IC
= 0,
R
= 50 Ω
α
Temperature coefficient of input offset voltage
6
0.04
2
µV/°C
S
VIO
Input offset voltage long-term drift
(see Note 4)
25°C
µV/mo
25°C
Full range
25°C
pA
nA
pA
nA
I
I
Input offset current
Input bias current
IO
20
40
4
IB
Full range
–11
to 13
–12
to 16
25°C
V
V
V
ICR
Common-mode input voltage range
–11
to 13
Full range
25°C
Full range
25°C
13.2
12.5
12.5
12
13.7
13.2
R
R
R
R
= 10 kΩ
L
L
V
Maximum positive peak output voltage swing
V
V
OM +
= 600 Ω
Full range
25°C
–13.2 –13.7
= 10 kΩ
L
Full range –12.5
V
OM –
Maximum negative peak output voltage swing
Large-signal differential voltage amplification
25°C
Full range
25°C
–12.5
–12
30
20
25
7
–13
230
100
25
= 600 Ω
L
V
O
V
O
V
O
= ±10 V,
= 0 to 8 V,
= 0 to – 8 V,
R
R
R
= 10 kΩ
L
L
L
Full range
25°C
A
VD
= 600 Ω
= 600 Ω
V/mV
Full range
25°C
3
Full range
25°C
1
12
4
r
i
Input resistance
10
Ω
pF
Ω
c
z
Input capacitance
25°C
i
Open-loop output impedance
I
O
= 0
25°C
280
90
o
25°C
72
65
75
65
CMRR Common-mode rejection ratio
V
V
= V
min,
R
= 50 Ω
dB
dB
µA
µA
IC
ICR
S
Full range
25°C
93
= ±5 V to ±15 V,
= 50 Ω
CC±
k
Supply-voltage rejection ratio (∆V
/∆V )
IO
SVR
CC±
R
Full range
25°C
S
290
350
375
I
Supply current
CC
Full range
V
O
= 0,
No load
Supply-current change over operating
temperature range
∆I
CC
Full range
46
†
Full range is – 55°C to 125°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
operating characteristics at specified free-air temperature, V
= ±15 V (unless otherwise noted)
CC ±
TLE2161M
TLE2161AM
TLE2161BM
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
25°C
7
5
10
SR
Slew rate (see Figure 1)
A
VD
= 5,
R
= 10 kΩ,
C = 100 pF
L
V/µs
L
Full range
R
R
= 20 Ω,
= 20 Ω,
f = 10 Hz
f = 1 kHz
70
40
Equivalent input noise voltage
(see Figure 2)
S
S
V
n
25°C
nV/√Hz
Peak-to-peak equivalent input
noise voltage
V
f = 0.1 Hz to 10 Hz
25°C
25°C
25°C
1.1
1.1
µV
N(PP)
I
n
Equivalent input noise current f = 1 Hz
fA/√Hz
V = 2 V,
O(PP)
= 10 kΩ
A
VD
= 5,
f = 10 kHz,
THD
Total harmonic distortion
0.025%
R
L
f = 100 kHz,
f = 100 kHz,
ε = 0.1%
R
R
= 10 kΩ,
= 600 Ω,
C
C
= 100 pF
= 100 pF
6.4
5.6
5
Gain-bandwidth product
(see Figure 3)
L
L
L
L
25°C
MHz
t
Settling time
25°C
25°C
25°C
µs
s
ε = 0.01%
10
Maximum output-swing
bandwidth
B
A
VD
= 5,
R
= 10 kΩ
116
kHz
OM
L
A
= 5,
= 5,
R
R
= 10 kΩ,
= 600 Ω,
C
C
= 100 pF
= 100 pF
72°
78°
VD
L
L
L
L
φ
Phase margin (see Figure 3)
m
A
VD
†
Full range is – 55°C to 125°C.
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
PARAMETER MEASUREMENT INFORMATION
8 kΩ
2 kΩ
V
CC +
V
CC +
–
+
–
+
S
V
O
V
O
V
I
2 kΩ
V
CC –
V
CC –
C
L
(see Note A)
R
R
S
NOTE A: C includes fixture capacitance.
L
Figure 1. Slew-Rate Test Circuit
Figure 2. Noise-Voltage Test Circuit
10 kΩ
V
CC +
100 Ω
–
V
I
V
O
+
R
V
CC –
C
L
L
(see Note A)
NOTE A: C includes fixture capacitance.
L
Figure 3. Gain-Bandwidth Product and Phase-Margin Test Circuit
typical values
Typical values presented in this data sheet represent the median (50% point) of device parametric performance.
Input bias and offset current
At the picoampere bias-current level typical of the TLE2161, TLE2161A, and TLE2161B, accurate
measurement of the bias current becomes difficult. Not only does this measurement require a picoammeter,
but test socket leakages can easily exceed the actual device bias currents. To accurately measure these small
currents, Texas Instruments uses a two-step process. The socket leakage is measured using picoammeters
with bias voltages applied but with no device in the socket. The device is then inserted into the socket, and a
second test that measures both the socket leakage and the device input bias current is performed. The two
measurements are then subtracted algebraically to determine the bias current of the device.
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
V
Input offset voltage
Input bias current
Distribution
4
IO
vs Common-mode input voltage
vs Free-air temperature
5
6
I
IB
I
Input offset current
vs Free-air temperature
vs Free-air temperature
vs Output current
vs Output current
vs Supply voltage
vs Frequency
6
IO
V
V
V
V
V
Common-mode input voltage range limits
Maximum positive peak output voltage
Maximum negative peak output voltage
Maximum peak output voltage
7
ICR
8
OM
9
OM
10, 11, 12
13, 14, 15
OM
Maximum peak-to-peak output voltage
O(PP)
vs Frequency
vs Free-air temperature
16
17
A
Large-signal differential voltage amplification
VD
OS
I
Short-circuit output current
Large-signal voltage amplification
Output impedance
vs Elapsed time
vs Free-air temperature
vs Frequency
18
19
20
21
z
o
CMRR Common-mode rejection ratio
vs Frequency
vs Supply voltage
vs Free-air temperature
22
23
I
Supply current
Pulse response
CC
Small signal
Large signal
24, 25
26, 27
Noise voltage (referred to input)
Equivalent input noise voltage
Total harmonic distortion
0.1 to 10 Hz
vs Frequency
vs Frequency
28
29
V
n
THD
30, 31
vs Supply voltage
vs Free-air temperature
32
33
Gain-bandwidth product
vs Supply voltage
vs Free-air temperature
34
35
φ
m
Phase margin
Phase shift
vs Frequency
16
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
†
TYPICAL CHARACTERISTICS
TLE2161
DISTRIBUTION OF
INPUT BIAS CURRENT
vs
INPUT OFFSET VOLTAGE
COMMON-MODE INPUT VOLTAGE
15
10
5
60
50
40
30
20
10
0
736 Amplifiers Tested From 3 Wafer Lots
V
V
T
= ±15 V
ID
= 25°C
CC
±
V
= ±15 V
= 25°C
CC
= 0
±
T
A
A
P Package
0
– 4
– 3
V
– 2 – 1
– Input Offset Voltage – mV
0
1
2
3
4
– 20 – 15 –10 – 5
0
5
10
15
20
V
– Common-Mode Input Voltage – V
IO
IC
Figure 4
Figure 5
COMMON-MODE
INPUT BIAS CURRENT
INPUT VOLTAGE RANGE LIMITS
vs
AND INPUT OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
5
4
3
2
1
V
V
+2
+1
10
10
10
10
10
CC +
V
= ±15 V
CC
±
V
IC
= 0
CC +
Positive Limit
V
CC +
I
IB
V
CC –
V
CC –
V
CC –
+4
I
IO
Negative Limit
+3
+2
1
25
45
65
85
105
125
– 75 – 50 – 25
0
25
50
75
100 125
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
Figure 6
Figure 7
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
TYPICAL CHARACTERISTICS
MAXIMUM POSITIVE PEAK
OUTPUT VOLTAGE
vs
MAXIMUM NEGATIVE PEAK
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT CURRENT
16
– 16
– 14
– 12
– 10
T
A
= 25°C
T
A
= 25°C
14
12
10
V
CC
= ±15 V
V = ±15 V
CC
±
±
– 8
8
– 6
– 4
– 2
6
4
V
CC
= ± 5 V
V
= ±5 V
±
2
0
CC
±
0
0
– 10
– 20
– 30
– 40
– 50 – 60
0
5
10
15
20
25
30
35
40
I
– Output Current – mA
I
– Output Current – mA
O
O
Figure 8
Figure 9
MAXIMUM PEAK OUTPUT VOLTAGE
MAXIMUM PEAK OUTPUT VOLTAGE
vs
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
20
15
20
15
R
T
= 600Ω
= 25°C
R
T
= 10 kΩ
= 25°C
L
A
L
A
V
OM +
V
OM +
10
5
10
5
0
0
– 5
– 5
– 10
– 10
V
OM –
V
OM –
– 15
– 20
– 15
– 20
0
2
4
6
8
10 12 14 16 18 20
0
2
4
6
8
10 12 14 16 18 20
| V
| – Supply Voltage – V
| V
| – Supply Voltage – V
CC
±
CC
±
Figure 10
Figure 11
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
TYPICAL CHARACTERISTICS
MAXIMUM PEAK-TO-PEAK
OUTPUT VOLTAGE
vs
MAXIMUM PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
FREQUENCY
6
10
8
R
T
= 100Ω
= 25°C
V
R
T
A
= ±5 V
L
A
CC
L
±
V
OM +
= 10 kΩ
4
2
0
= 25°C
6
4
– 2
– 4
2
V
OM –
– 6
0
0
2
4
6
8
10
10 k
100 k
f – Frequency – Hz
1 M
10 M
|V
CC
| – Supply Voltage – V
±
Figure 12
Figure 13
MAXIMUM PEAK-TO-PEAK
OUTPUT VOLTAGE
vs
MAXIMUM PEAK-TO-PEAK
OUTPUT VOLTAGE
vs
FRQUENCY
FREQUENCY
30
40
V
R
T
A
= ±15 V
V
= ±5 V
CC
±
CC
L
±
= 10 kΩ
= 25°C
R = 10 kΩ
T = 25°C
A
L
35
25
20
30
25
15
10
5
20
15
10
5
0
0
10 k
100 k
1 M
10 M
10 k
100 k
1 M
10 M
f – Frequency – Hz
f – Frequency – Hz
Figure 14
Figure 15
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
†
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
AMPLIFICATION AND PHASE SHIFT
vs
FRQUENCY
FREE-AIR TEMPERATURE
60°
80°
120
400
350
300
250
200
R
= 10 kΩ
L
100
80
Phase Shift
100°
120°
140°
160°
180°
200°
A
VD
60
V
V
= ±15 V
CC
±
±
40
150
100
20
V
= ±15 V
CC
±
R
= 10 kΩ
= 100 pF
= 25°C
L
L
0
= ±5 V
CC
C
T
A
50
– 20
0
0.1
1
10 100 1 k 10 k 100 k 1 M 10 M
– 75 – 50 – 25
0
25
50
75 100 125
f – Frequency – Hz
T
A
– Free-Air Temperature – °C
Figure 16
Figure 17
SHORT-CIRCUIT OUTPUT CURRENT
LARGE-SIGNAL VOLTAGE AMPLIFICATION
vs
vs
ELAPSED TIME
FREE-AIR TEMPERATURE
80
60
40
20
80
60
40
20
0
V
V
= ±15 V
= 0
CC
±
V
= – 100 mV
ID
O
V
ID
= –100 mV
V
= ±15 V
CC
= 25°C
±
T
A
0
V
O
= 0
– 20
– 20
– 40
V
= 100 mV
ID
– 40
– 60
– 80
V
= 100 mV
50
– 60
ID
– 80
– 75 – 50 – 25
0
10
20
30
40
60
0
25
50
75 100 125
t – Elapsed Time – s
T
A
– Free-Air Temperature – °C
Figure 18
Figure 19
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
†
TYPICAL CHARACTERISTICS
OUTPUT IMPEDANCE
vs
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
FREQUENCY
100
80
60
40
20
0
1000
100
10
V
T
= ±5 V
V
T
= ±15 V
CC
A
±
CC
A
±
= 25°C
= 25°C
A
=100
VD
= 10
A
VD
1
0.1
A
VD
= 1
0.01
0.001
10
100
1 k
10 k
100 k
1 M
10
100
1 k
10 k
100 k 1 M
10 M
f – Frequency – Hz
f – Frequency – Hz
Figure 20
Figure 21
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
340
320
300
280
260
340
320
V
= 0
O
V
= 0
O
No Load
No Load
T
= 125°C
A
300
280
260
240
V
= ±15 V
CC
T
A
= 25°C
±
V
= ±5 V
CC
±
T
A
= – 55°C
240
0
2
4
6
8
10 12 14 16 18 20
–75 – 50 – 25
0
25
50
75
100 125
|V
CC
| – Supply Voltage – V
T
A
– Free-Air Temperature – °C
±
Figure 22
Figure 23
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
TYPICAL CHARACTERISTICS
SMALL-SIGNAL
PULSE RESPONSE
SMALL-SIGNAL
PULSE RESPONSE
100
50
100
50
0
0
V
= ± 5 V
= 5
= 10 kΩ
CC
±
V
A
= ± 15 V
CC
±
A
R
C
VD
= 5
– 50
– 100
VD
– 50
– 100
L
R
C
= 10 kΩ
= 100 pF
= 25°C
L
L
= 100 pF
= 25°C
L
T
A
T
A
See Figure 1
See Figure 1
0
0.5
1.5
2
2.5
3
1
0
2
3
1
0.5
1.5
2.5
t – Time – µs
t – Time – µs
Figure 24
Figure 25
LARGE-SIGNAL
LARGE-SIGNAL
PULSE RESPONSE
PULSE RESPONSE
4
3
15
10
2
5
1
0
V
= ±15 V
0
– 5
– 10
– 15
CC
±
V
A
= ± 5 V
CC
±
A
R
C
= 5
VD
= 5
VD
= 10 kΩ
= 100 pF
= 25°C
L
L
R
C
= 10 kΩ
= 100 pF
= 25°C
L
L
– 1
– 2
T
A
T
A
See Figure 1
See Figure 1
0
10
15
0
10
20
30
40
5
t – Time – µs
t – Time – µs
Figure 26
Figure 27
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
TYPICAL CHARACTERISTICS
NOISE VOLTAGE
(REFERRED TO INPUT)
EQUIVALENT INPUT NOISE VOLTAGE
vs
OVER A 10-SECOND INTERVAL
FREQUENCY
1
100
80
60
40
20
0
V
= ±15 V
CC±
f = 0.1 to 10 Hz
= 25°C
V
R
= ±5 V
CC±
= 20 Ω
S
T
A
T
= 25°C
A
See Figure 2
0.5
0
– 0.5
– 1
0
1
2
3
4
5
6
7
8
9
10
1
10
100
1 k
10 k
t – Time – s
f – Frequency – Hz
Figure 28
Figure 29
TOTAL HARMONIC DISTORTION
TOTAL HARMONIC DISTORTION
vs
vs
FREQUENCY
FREQUENCY
0.6
0.5
0.4
0.3
0.2
0.1
0
0.25
V = ± 5 V
CC
±
V
= ±5 V
= 2
CC
±
A
= 10
A
VD
VD
V
= 2 V
V
= 2 V
O(PP)
= 25°C
O(PP)
0.2
0.15
0.1
T
T
A
= 25°C
A
Source Signal
Source Signal
0.05
0
10
100
1 k
10 k
100 k
10
100
1 k
10 k
100 k
f – Frequency – Hz
t – Frequency – Hz
Figure 30
Figure 31
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
TYPICAL CHARACTERISTICS
GAIN-BANDWIDTH PRODUCT
GAIN-BANDWIDTH PRODUCT
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
7
6.6
6.2
5.8
5.4
5
7
6.6
6.2
5.8
5.4
5
f = 100 kHz
f = 100 kHz
R
C
= 10 kΩ
= 100 pF
L
L
R
C
= 10 kΩ
= 100 pF
= 25°C
L
L
See Figure 3
T
A
See Figure 3
V
= ±15 V
CC
±
V
= ± 5 V
CC
±
0
4
|V
8
12
16
20
– 75 – 50 – 25
0
25
50
75 100 125
– Free-Air Temperature – °C
T
A
| – Supply Voltage – V
CC
±
Figure 32
Figure 33
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
PHASE MARGIN
vs
SUPPLY VOLTAGE
74°
78°
76°
74°
72°
70°
68°
66°
A
R
C
= 5
= 10 kΩ
= 100 pF
= 25°C
VD
L
L
A
R
C
= 5
= 10 kΩ
= 100 pF
VD
L
L
73°
72°
71°
70°
69°
68°
67°
T
A
See Figure 3
See Figure 3
V
= ±5 V
CC
±
V
= ±15 V
CC
±
– 75 – 50 – 25
0
25
50
75
100 125
0
2
4
6
8
10 12 14 16 18 20
T
A
– Free-Air Temperature – °C
|V
CC
| – Supply Voltage – V
±
Figure 34
Figure 35
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts , the model generation software used
with Microsim PSpice . The Boyle macromodel (see Note 5) and subcircuit in Figure 36 and Figure 37 were
°
generated using the TLE2161 typical electrical and operating characteristics at 25 C. Using this information,
output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
•
•
•
•
•
•
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
•
•
•
•
•
•
Gain-bandwidth product
Common-mode rejection ratio
Phase margin
Quiescent power dissipation
Input bias current
DC output resistance
AC output resistance
Open-loop voltage amplification
Short-circuit output current limit
99
+
dln
9
3
egnd
92
V
CC+
ro2
fb
–
90
91
+
vlp
+
rss
iss
vb
dlp
+
–
–
rp
hlim
vln
–
+
–
2
1
10
–
IN –
IN +
+
vc
dc
r2
53
j1
j2
C2
dp
6
7
+
–
11
12
vlim
gcm
ga
C1
8
ro1
rd1
4
rd2
54
de
5
V
CC –
+
–
ve
OUT
Figure 36. Boyle Macromodel
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, ”Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE
Journal of Solid-State Circuits, SC-9, 353 (1974).
PSpice and Parts are trademark of MicroSim Corporation.
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
APPLICATION INFORMATION
macromodel information (continued)
.subckt TLE2161 1 2 3 4 5
c1
11 12 125.4E–14
c2
6
5
7
5.000E–12
dc
de
dlp
dln
dp
53 dx
54 5d
x
90 91 dx
92 90 dx
4
3
0
dx
egnd 99
poly(2) (3,0) (4,0) 0 .5 .5
fb
ga
gcm
iss
7
6
0
3
99 poly(5) vb vc ve vlp vln 0 4.085E6 –4E6 4E6 4E6 –4E6
0
6
11 12 201.1E–6
10 99 3.576E–9
10 dc 45.00E–6
hlim 90
0
2
1
9
vlim 1K
10 jx
j1
11
12
6
j2
10 jx
r2
100.0E3
rd1
rd2
ro1
ro2
rp
4
11 4.973E3
12 4.973E3
4
8
5
280
99 280
113.2E3
7
3
4
rss
vb
vc
ve
10 99 4.444E6
9
3
0
dc 0
53 dc 2
54
7
4
8
0
dc 2
dc 0
dc 50
vlim
vlp
vln
91
0
92 dc 50
(Is=800.0E–18)
.model dx
D
.model jx PJF (Is=1.000E–12 Beta=480E–6 Vto=–1)
.ends
Figure 37. Macromodel Subcircuit
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
APPLICATION INFORMATION
input characteristics
The TLE2161, TLE2161A and TLE2161B are specified with a minimum and a maximum input voltage that if
exceeded at either input could cause the device to malfunction.
Because of the extremely high input impedance and resulting low bias-current requirements, the TLE2161,
TLE2161A, and TLE2161B are well suited for low-level signal processing; however, leakage currents on printed
circuit boards and sockets can easily exceed bias-current requirements and cause degradation in system
performance. It is a good practice to include guard rings around inputs (see Figure 38). These guards should
be driven from a low-impedance source at the same voltage level as the common-mode input.
V
I
+
–
V
I
+
–
V
O
V
O
R2
R1
R3
R4
R3
R4
R2
R1
Where
Figure 38. Use of Guard Rings
input offset voltage nulling
The TLE2161 series offers external null pins that can further reduce the input offset voltage. The circuit in
Figure 39 can be connected as shown if the feature is desired. When external nulling is not needed, the null
pins may be left disconnected.
–
+
IN –
IN +
OUT
N2
N1
100 kΩ
5 kΩ
V
CC –
Figure 39. Input Offset Voltage Nulling
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
19-Nov-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
5962-9095801QPA
5962-9095802QPA
5962-9095803QPA
ACTIVE
CDIP
CDIP
CDIP
JG
8
8
8
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
-55 to 125
0 to 70
9095801QPA
TLE2161M
Samples
Samples
Samples
ACTIVE
ACTIVE
JG
1
Non-RoHS
& Green
SNPB
SNPB
9095802QPA
TLE2161AM
JG
1
Non-RoHS
& Green
9095803QPA
TLE2161BM
TLE2161ACD
TLE2161AID
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
CDIP
D
D
8
8
8
8
75
75
RoHS & Green
NIPDAU
NIPDAU
NIPDAU
SNPB
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
2161AC
2161AI
2161AI
Samples
Samples
Samples
Samples
RoHS & Green
TLE2161AIDR
TLE2161AMJGB
D
2500 RoHS & Green
JG
1
1
Non-RoHS
& Green
-55 to 125
-55 to 125
0 to 70
9095802QPA
TLE2161AM
TLE2161BMJGB
ACTIVE
CDIP
JG
8
Non-RoHS
& Green
SNPB
N / A for Pkg Type
9095803QPA
TLE2161BM
Samples
TLE2161CD
TLE2161ID
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
CDIP
D
D
8
8
8
8
8
75
75
75
RoHS & Green
RoHS & Green
RoHS & Green
NIPDAU
NIPDAU
NIPDAU
NIPDAU
SNPB
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
2161C
2161I
2161I
2161I
Samples
Samples
Samples
Samples
Samples
TLE2161IDG4
TLE2161IDR
TLE2161MJGB
D
D
2500 RoHS & Green
JG
1
Non-RoHS
& Green
-55 to 125
9095801QPA
TLE2161M
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
19-Nov-2022
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLE2161, TLE2161A, TLE2161AM, TLE2161M :
Catalog : TLE2161A, TLE2161
•
Military : TLE2161M, TLE2161AM
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLE2161AIDR
TLE2161IDR
SOIC
SOIC
D
D
8
8
2500
2500
330.0
330.0
12.4
12.4
6.4
6.4
5.2
5.2
2.1
2.1
8.0
8.0
12.0
12.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TLE2161AIDR
TLE2161IDR
SOIC
SOIC
D
D
8
8
2500
2500
340.5
340.5
336.1
336.1
25.0
25.0
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TUBE
T - Tube
height
L - Tube length
W - Tube
width
B - Alignment groove width
*All dimensions are nominal
Device
Package Name Package Type
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
TLE2161ACD
TLE2161ACD
TLE2161AID
TLE2161AID
TLE2161CD
TLE2161CD
TLE2161ID
D
D
D
D
D
D
D
D
D
D
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
8
8
8
8
8
8
8
8
8
8
75
75
75
75
75
75
75
75
75
75
505.46
507
6.76
8
3810
3940
3940
3810
3940
3810
3940
3810
3810
3940
4
4.32
4.32
4
507
8
505.46
507
6.76
8
4.32
4
505.46
507
6.76
8
4.32
4
TLE2161ID
505.46
505.46
507
6.76
6.76
8
TLE2161IDG4
TLE2161IDG4
4
4.32
Pack Materials-Page 3
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