5962-7900901VCA [TI]
抗辐射 V 类双路差分线路驱动器 | J | 14 | -55 to 125;
| 型号： | 5962-7900901VCA |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 抗辐射 V 类双路差分线路驱动器 | J | 14 | -55 to 125 驱动 线路驱动器或接收器 驱动程序和接口 |
| 文件： | 总12页 (文件大小：222K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN55183-SP
www.ti.com ....................................................................................................................................................................................................... SLLS932–JULY 2008
RAD-TOLERANT CLASS V, DUAL DIFFERENTIAL LINE DRIVER
1
FEATURES
SN55183 . . . J OR W PACKAGE
•
•
•
•
•
•
Single 5-V Supply
(TOP VIEW)
Differential Line Operation
Dual Channels
1A
1B
1C
VCC
2D
2C
1
2
3
4
5
6
7
14
13
12
TTL Compatibility
Short-Circuit Protection of Outputs
1D
1Y
11 2B
10 2A
Output Clamp Diodes to Terminate Line
Transients
1Z
GND
9
8
2Y
2Z
•
•
•
High-Current Outputs
Quad Inputs
Single-Ended or Differential AND/NAND
Outputs
SN55183 . . . FK PACKAGE
(TOP VIEW)
•
•
Designed for Use With Dual Differential Drivers
SN55182 and SN75182
Designed to Be Interchangeable With National
Semiconductor DS7830 and DS8830
3
2
1 20 19
18
4
5
6
7
8
1C
NC
1D
NC
1Y
2C
NC
2B
NC
2A
17
16
15
14
•
•
Rad-Tolerant: >40 KRad(Si) TID
QML-V Qualified, SMD 5962-79008
9 10 11 12 13
NC − No internal connection
DESCRIPTION
The SN55183 dual differential line driver is designed to provide differential output signals with high current
capability for driving balanced lines, such as twisted pair, at normal line impedances without high power
dissipation. The device can be used as a TTL expander/phase splitter, because the output stages are similar to
TTL totem-pole outputs.
The driver is of monolithic single-chip construction, and both halves of the dual circuits use common power
supply and ground terminals.
The SN55183 is characterized for operation over the full military temperature range of –55°C to 125°C.
PACKAGING/ORDERING INFORMATION(1)
TA
PACKAGE(2)
J package
W package
ORDERABLE PART NUMBER
5962-7900801VCA
TOP-SIDE MARKING
5962-7900801VCA
5962-7900801VDA
–55°C to 125°C
5962-7900801VDA
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
(2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN55183-SP
SLLS932–JULY 2008 ....................................................................................................................................................................................................... www.ti.com
Logic Symbol†
1
&
1A
1B
1C
1D
2A
2B
2C
2D
5
6
1Y
1Z
2
3
4
10
11
12
13
9
8
2Y
2Z
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the J and W packages.
Logic Diagram (Positive Logic)
1
2
1A
1B
1C
1D
5
6
1Y
1Z
3
4
10
11
2A
2B
2C
2D
9
8
2Y
2Z
12
13
Positive logic: y = ABCD, Z = ABCD
Pin numbers shown are for the J and W packages.
2
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Product Folder Link(s): SN55183-SP
SN55183-SP
www.ti.com ....................................................................................................................................................................................................... SLLS932–JULY 2008
Schematic (Each Driver)
14
V
CC
545 Ω
V
2 kΩ
3 kΩ
9 Ω
6, 8
Z
1, 10
2, 11
3, 12
A
B
C
300 Ω
545 Ω
V
3 kΩ
4 kΩ
3.2 kΩ
9 Ω
4, 13
D
5, 9
Y
300 Ω
7
2 kΩ
GND
Resistor values shown are nominal.
Pin numbers shown are for the J and W packages.
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
7
UNIT
VCC
VI
Supply voltage(2)
V
V
s
Input voltage
5.5
1
Duration of output short circuit(3)
Continuous total power dissipation
Storage temperature range
See Dissipation Ratings Table
Tstg
–65
150
300
°C
°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds
J or W package
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to network ground terminal.
(3) Not more than one output should be shorted to ground at any one time.
Copyright © 2008, Texas Instruments Incorporated
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SN55183-SP
SLLS932–JULY 2008 ....................................................................................................................................................................................................... www.ti.com
DISSIPATION RATINGS
T
A ≤ 25°C
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 125°C
POWER RATING
PACKAGE(1)
POWER RATING
J
1375 mW
11.0 mW/°C
8.0 mW/°C
880 mW
640 mW
275 mW
200 mW
W
1000 mW
(1) SN55183 chips are alloy mounted.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
4.5
2
NOM
MAX
UNIT
VCC
VIH
VIL
IOH
IOL
TA
Supply voltage
5
5.5
V
V
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
0.8
–40
40
V
mA
mA
°C
–55
125
4
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Product Folder Link(s): SN55183-SP
SN55183-SP
www.ti.com ....................................................................................................................................................................................................... SLLS932–JULY 2008
ELECTRICAL CHARACTERISTICS
over recommended ranges of VCC and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –0.8 mA
MIN TYP(1)
MAX UNIT
2.4
Y (AND)
outputs
VOH High-level output voltage
VIH = 2 V
VIL = 0.8 V
VIL = 0.8 V
VIH = 2 V
V
IOH = –40 mA
IOL = 32 mA
IOL = 40 mA
IOH = –0.8 mA
IOH = –40 mA
IOL = 32 mA
IOL = 40 mA
1.8
3.3
0.2
Y (AND)
outputs
VOL Low-level output voltage
VOH High-level output voltage
VOL Low-level output voltage
V
0.22
0.4
2.4
1.8
Z (NAND)
outputs
V
3.3
0.2
Z (NAND)
outputs
V
0.22
0.4
IIH
II
High-level input current
VIH = 2.4 V
VIH = 5.5 V
120
µA
Input current at maximum input
voltage
2
mA
IIL
Low-level input current
Short-circuit output current(2)
VIL = 0.4 V
VCC = 5 V,
–4.8
mA
mA
IOS
TA =125°C(3)
–40
–100
10
–120
Supply current (average per
driver)
All inputs at 5
V,
ICC
VCC = 5 V,
No load
18
mA
(1) All typical values are at VCC = 5 V, TA = 25°C.
(2) Not more than one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.
(3) TA = 125°C is applicable to SN55183 only.
SWITCHING CHARACTERISTICS
VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
CL = 15 pF,
See FIgure 1(a)
tPLH
tPHL
Propagation delay time, low- to high-level Y output
AND gates
8
12
18
12
8
ns
ns
ns
ns
CL = 15 pF,
See FIgure 1(a)
Propagation delay time, high- to low-level Y output
Propagation delay time, low- to high-level Z output
Propagation delay time, high- to low-level Z output
AND gates
12
6
NAND
gates
CL = 15 pF,
See FIgure 1(a)
tPLH
tPHL
NAND
gates
CL = 15 pF,
See FIgure 1(a)
6
Y output with respect to Z output,
RL = 100 Ω in series with 5000 pF,
See Figure 1(b)
Propagation delay time,
low- to high-level differential output
tPLH
9
8
16
16
ns
ns
Y output with respect to Z output,
RL = 100 Ω in series with 5000 pF,
See Figure 1(b)
Propagation delay time,
high- to low-level differential output
tPHL
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Product Folder Link(s): SN55183-SP
SN55183-SP
SLLS932–JULY 2008 ....................................................................................................................................................................................................... www.ti.com
PARAMETER MEASUREMENT INFORMATION
2.5 V
V
CC
= ±5 V
Input
Input
1.5 V
1.5 V
0 V
V
t
t
PLH
PHL
Y
Pulse
Generator
(see Note A)
OH
Y
Output
1.5 V
1.5 V
C
= 15 pF
L
Output
V
OL
(see Note B)
t
t
Z
PHL
PLH
Output
C = 15 pF
(see Note B)
V
V
L
OH
Z
1.5 V
1.5 V
Output
OL
TEST CIRCUIT
VOLTAGE WAVEFORMS
(a) OUTPUTS Y AND Z
V
CC
= 5 V
Input
3 V
0 V
Y
Pulse
Generator
(see Note A)
Input
Output
1.5 V
1.5 V
100 W
5000 pF
t
t
PHL
PLH
V
YS
Z
Differential
Output
Output
0 V
0 V
Voltage
−V
YS
TEST CIRCUIT
VOLTAGE WAVEFORMS
(b) DIFFERENTIAL OUTPUT
NOTES: A. The pulse generators have the following characteristics: Z = 50 Ω, t ≤ 10 ns, t ≤ 10 ns, t = 0.5 µs, PRR ≤ 1 MHz.
O
r
f
w
B. C includes probe and jig capacitance.
L
C. Waveforms are monitored on an oscilloscope with r ≥ 1 MΩ.
i
Figure 1. Test Circuits and Voltage Waveforms
6
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SN55183-SP
www.ti.com ....................................................................................................................................................................................................... SLLS932–JULY 2008
TYPICAL CHARACTERISTICS(1)
HIGH-LEVEL OUTPUT VOLTAGE
vs
INPUT THRESHOLD VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
FREE-AIR TEMPERATURE
2.4
2.2
2
4
3.5
3
V
V
= 5 V
CC
V
CC
= 5 V
200-Ω Load
100-Ω Load
= 1.5 V
O
V
IH
min
50-Ω Load
1.8
1.6
1.4
1.2
1
2.5
2
T
= 25°C
A
NAND Gate
AND Gate
T
= − 55°C
A
1.5
1
V
IL
max
0.8
0.6
T
= 125°C
A
0.5
0
0.4
0
−20 −40 −60 −80 −100 −120 −140 −160
−75 −50 −25
0
25
50
75
100 125
I
− High-Level Output Current − mA
T − Free-Air Temperature − °C
A
OH
Figure 2.
Figure 3.
DIFFERENTIAL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
3
2
4
3
2
1
V
= 5 V
V
CC
= 5 V
CC
T
A
= 125°C
T
A
= 25°C
T
A
= 25°C
T
A
= −55°C
1
0
T
A
= −55°C
T = 125°C
A
0
0
20 40 60 80 100 120 140 160 180 200
0
25
50
75
100
125
I
− Differential Output Current − mA
I
− Low-Level Output Current − mA
OD
OL
Figure 4.
Figure 5.
(1) Operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied.
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SN55183-SP
SLLS932–JULY 2008 ....................................................................................................................................................................................................... www.ti.com
TYPICAL CHARACTERISTICS(2) (continued)
PROPAGATION DELAY TIME
(DIFFERENTIAL OUTPUT)
vs
TOTAL POWER DISSIPATION
(BOTH DRIVERS)
vs
FREE-AIR TEMPERATURE
FREQUENCY
20
15
10
5
240
220
200
180
160
140
120
100
80
V
= 5 V
CC
V
= 5 V
See Figure 1(b)
CC
No Load
Input: 3-V Square Wave
T = 25°C
A
t
PLH
t
PHL
60
40
0.1
0
−75 −50 −25
0
25
50
75
100 125
0.4
1
4
10
40
100
f − Frequency − MHz
T
A
− Free-Air Temperature − °C
Figure 6.
Figure 7.
8
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Product Folder Link(s): SN55183-SP
SN55183-SP
www.ti.com ....................................................................................................................................................................................................... SLLS932–JULY 2008
APPLICATION INFORMATION
V
CC
= 5 V
V
CC
= 5 V
1/2 ’183
Inverting
Input
1/2 ’182
A
B
C
D
Z
Y
Inputs
0.002 µF
(see Note A)
Output
R
T
Resp Time Cont
100 pF
(see Note B)
Noninverting
Input Strobe
Twisted
Pair
GND
GND
NOTES: A. When the inputs are open circuited, the output is high. A capacitor may be used for dc isolation of the line-terminating resistor. At
the frequency of operation, the impedance of the capacitor should be relatively small.
Example: let f = 5 MHz
C = 0.002 µF
1
2pfC
1
Z(
Z(
+
+
)
circuit
6
*6
ǒ
Ǔǒ
Ǔ
2p 5 10 0.002 10
) [ 16W
circuit
B. Use of a capacitor to control response time is optional.
Figure 8. Transmission of Digital Data Over Twisted-Pair Line
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Product Folder Link(s): SN55183-SP
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
5962-7900901VCA
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
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OTHER QUALIFIED VERSIONS OF SN55183-SP :
Catalog: SN55183
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 1
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