54ACTQ244DM [TI]

ACT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDIP20, CERAMIC, DIP-20;
54ACTQ244DM
型号: 54ACTQ244DM
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

ACT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDIP20, CERAMIC, DIP-20

驱动 CD 输出元件 逻辑集成电路
文件: 总10页 (文件大小:215K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
March 1993  
54ACQ/74ACQ244 54ACTQ/74ACTQ244  
#
Quiet Series Octal Buffer/Line Driver  
with TRI-STATE Outputs  
É
General Description  
Features  
Y
CC  
I
and I  
reduced by 50%  
OZ  
The ’ACQ/’ACTQ244 is an octal buffer and line driver de-  
signed to be employed as a memory address driver, clock  
driver and bus oriented transmitter or receiver which pro-  
vides improved PC board density. The ACQ/ACTQ utilizes  
NSC Quiet Series technology to guarantee quiet output  
switching and improved dynamic threshold performance.  
FACT Quiet SeriesTM features GTOTM output control and  
undershoot corrector in addition to a split ground bus for  
superior performance.  
Y
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Y
Y
Y
Guaranteed pin-to-pin skew AC performance  
Improved latch-up immunity  
TRI-STATE outputs drive bus lines or buffer memory  
É
address registers  
Y
Y
Y
Y
Outputs source/sink 24 mA  
Faster prop delays than the standard ’AC/’ACT244  
4 kV minimum ESD immunity  
Standard Military Drawing (SMD)  
Ð ’ACTQ244: 5962-8776003  
Ð ’ACQ244: 5962-92176  
Logic Symbol  
Connection Diagrams  
IEE/IEC  
Pin Assignment  
for DIP, Flatpak, QSOP and SOIC  
Pin Assignment  
for LCC  
TL/F/10235–3  
TL/F/10235–2  
TL/F/10235–1  
Truth Tables  
Pin Names  
Description  
Inputs  
Outputs  
(Pins 12, 14, 16, 18)  
OE , OE  
1
TRI-STATE Output Enable Inputs  
OE  
1
I
n
2
I I  
0
Inputs  
7
L
L
L
L
H
Z
O O  
0
Outputs  
7
H
X
H
Inputs  
Outputs  
(Pins 3, 5, 7, 9)  
OE  
2
I
n
L
L
L
L
H
Z
H
X
H
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
e
e
e
e
H
L
HIGH Voltage Level  
LOW Voltage Level  
X
Z
Immaterial  
High Impedance  
FACTTM, FACT Quiet SeriesTM, and GTOTM are trademarks of National Semiconductor  
Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/10235  
RRD-B30M75/Printed in U. S. A.  
Absolute Maximum Rating (Note 1)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales  
Office/Distributors for availability and specifications.  
Recommended Operating  
Conditions  
Supply Voltage (V  
’ACQ  
’ACTQ  
)
CC  
2.0V to 6.0V  
4.5V to 5.5V  
b
a
0.5V to 7.0V  
Supply Voltage (V  
)
CC  
DC Input Diode Current (I  
)
IK  
Input Voltage (V )  
I
0V to V  
0V to V  
CC  
e b  
b
a
V
I
V
I
0.5V  
a
20 mA  
20 mA  
Output Voltage (V  
)
O
CC  
e
V
CC  
0.5V  
Operating Temperature (T )  
A
74ACQ/ACTQ  
54ACQ/ACTQ  
b
b
a
0.5V  
DC Input Voltage (V )  
I
0.5V to V  
0.5V to V  
CC  
b
b
a
40 C to 85 C  
§
55 C to 125 C  
§
§
DC Output Diode Current (I  
)
a
OK  
§
e b  
b
a
V
V
0.5V  
a
20 mA  
20 mA  
O
O
Minimum Input Edge Rate DV/Dt  
’ACQ Devices  
e
V
CC  
0.5V  
a
DC Output Voltage (V  
DC Output Source  
)
O
0.5V  
50 mA  
50 mA  
CC  
V
V
from 30% to 70% of V  
@
IN  
CC  
3.0V, 4.5V, 5.5V  
125 mV/ns  
CC  
g
g
or Sink Current (I  
)
O
Minimum Input Edge Rate DV/Dt  
’ACTQ Devices  
DC V  
or Ground Current  
CC  
per Output Pin (I or I  
CC  
)
V
V
from 0.8V to 2.0V  
@
GND  
)
IN  
4.5V, 5.5V  
125 mV/ns  
b
a
65 C to 150 C  
CC  
Storage Temperature (T  
§
§
STG  
Note: All commercial packaging is not recommended for applications requir-  
a
ing greater than 2000 temperature cycles from 40 C to 125 C.  
DC Latch-Up Source or  
Sink Current  
b
§
§
g
300 mA  
Junction Temperature (T )  
J
CDIP  
PDIP  
175 C  
§
140 C  
§
Note 1: Absolute maximum ratings are those values beyond which damage  
to the device may occur. The databook specifications should be met, without  
exception, to ensure that the system design is reliable over its power supply,  
temperature, and output/input loading variables. National does not recom-  
mend operation of FACT circuits outside databook specifications.  
DC Electrical Characteristics for ’ACQ Family Devices  
54ACQ  
74ACQ  
74ACQ  
e
e
T
A
V
CC  
(V)  
T
55 C to 125 C  
A
e a  
Symbol  
Parameter  
T
25 C  
§
Units  
Conditions  
A
b
a
b a  
40 C to 85 C  
§
§
Guaranteed Limits  
§
§
Typ  
e
0.1V  
V
V
V
Minimum High Level  
Input Voltage  
3.0  
4.5  
5.5  
1.5  
2.25  
2.75  
2.1  
3.15  
3.85  
2.1  
3.15  
3.85  
2.1  
3.15  
3.85  
V
IH  
OUT  
b
V
V
V
or V  
CC  
0.1V  
e
Maximum Low Level  
Input Voltage  
3.0  
4.5  
5.5  
1.5  
2.25  
2.75  
0.9  
1.35  
1.65  
0.9  
1.35  
1.65  
0.9  
1.35  
1.65  
V
OUT  
or V  
0.1V  
0.1V  
IL  
b
CC  
e b  
OUT  
Minimum High Level  
Output Voltage  
3.0  
4.5  
5.5  
2.99  
4.49  
5.49  
2.9  
4.4  
5.4  
2.9  
4.4  
5.4  
2.9  
4.4  
5.4  
I
50 mA  
OH  
e
*V  
IN  
V
IL  
or V  
IH  
b
b
b
3.0  
4.5  
5.5  
2.56  
3.86  
4.86  
2.4  
3.7  
4.7  
2.46  
3.76  
4.76  
12 mA  
24 mA  
24 mA  
V
V
I
OH  
e
e
V
OL  
Maximum Low Level  
Output Voltage  
3.0  
4.5  
5.5  
0.002  
0.001  
0.001  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
I
50 mA  
OUT  
*V  
IN  
V or V  
IL IH  
3.0  
4.5  
5.5  
0.36  
0.36  
0.36  
0.50  
0.50  
0.50  
0.44  
0.44  
0.44  
12 mA  
24 mA  
24 mA  
V
I
OL  
e
(Note 1)  
I
Maximum Input  
Leakage Current  
V
V
, GND  
IN  
I
CC  
g
g
g
5.5  
0.1  
1.0  
1.0  
mA  
e
²
Minimum Dynamic  
Output Current  
I
I
I
5.5  
5.5  
50  
75  
mA  
mA  
V
V
V
1.65V Max  
3.85V Min  
OLD  
OHD  
CC  
OLD  
b
b
e
50  
75  
OHD  
e
Maximum Quiescent  
Supply Current  
V
CC  
IN  
5.5  
4.0  
80.0  
40.0  
mA  
or GND (Note 1)  
*All outputs loaded thresholds on input associated with output under test.  
²
Maximum test duration 2.0 ms, one output loaded at a time.  
2
DC Electrical Characteristics for ’ACQ Family Devices (Continued)  
74ACQ  
54ACQ  
74ACQ  
e
e
T
A
V
CC  
(V)  
T
A
55 C to 125 C  
e a  
Symbol  
Parameter  
T
25 C  
§
Units  
Conditions  
A
b
a
b a  
40 C to 85 C  
§
§
Guaranteed Limits  
§
§
Typ  
e
I
Maximum TRI-STATE  
Leakage Current  
V (OE)  
I
V
, V  
OZ  
IL IH  
e
g
g
g
2.5  
5.5  
0.25  
5.0  
mA  
V
V
V
, GND  
CC  
, GND  
I
e
V
CC  
O
V
OLP  
V
OLV  
V
IHD  
V
ILD  
Quiet Output  
Maximum Dynamic V  
Figures 2-12,13  
(Notes 2, 3)  
5.0  
5.0  
5.0  
5.0  
1.1  
1.5  
V
V
V
V
OL  
OL  
Quiet Output  
Figures 2-12,13  
(Notes 2, 3)  
b
b
0.6  
3.1  
1.9  
1.2  
3.5  
1.5  
Minimum Dynamic V  
Minimum High Level  
Dynamic Input Voltage  
(Notes 2, 4)  
Maximum Low Level  
Dynamic Input Voltage  
(Notes 2, 4)  
@
@
Note 1: I and I  
IN  
3.0V are guaranteed to be less than or equal to the respective limit 5.5V V  
.
CC  
CC  
@ @  
for 54ACQ 25 C is identical to 74ACQ 25 C.  
§ §  
I
CC  
Note 2: Plastic DIP package.  
Note 3: Max number of outputs defined as (n). Data Inputs are driven 0V to 5V. One output GND.  
@
b
Note 4: Max number of Data Inputs (n) switching. (n  
e
1) Inputs switching 0V to 5V (’ACQ). Input-under-test switching: 5V to threshold (V ), 0V to threshold  
ILD  
(V ), f  
IHD  
1 MHz.  
DC Electrical Characteristics for ’ACTQ Family Devices  
54ACTQ  
74ACTQ  
74ACTQ  
e
e
T
A
V
CC  
(V)  
T
A
55 C to 125 C  
e a  
Symbol  
Parameter  
T
25 C  
§
Units  
Conditions  
A
b
a
b a  
40 C to 85 C  
§
§
Guaranteed Limits  
§
§
Typ  
e
0.1V  
V
V
V
Minimum High Level  
Input Voltage  
4.5  
5.5  
1.5  
1.5  
2.0  
2.0  
2.0  
2.0  
2.0  
2.0  
V
IH  
OUT  
V
V
V
b
or V  
CC  
0.1V  
e
Maximum Low Level  
Input Voltage  
4.5  
5.5  
1.5  
1.5  
0.8  
0.8  
0.8  
0.8  
0.8  
0.8  
V
OUT  
or V  
0.1V  
0.1V  
IL  
b
CC  
e b  
OUT  
Minimum High Level  
Output Voltage  
4.5  
5.5  
4.49  
5.49  
4.4  
5.4  
4.4  
5.4  
4.4  
5.4  
I
50 mA  
OH  
e
*V  
IN  
OH  
V
IL  
or V  
IH  
b
b
4.5  
5.5  
3.86  
4.86  
3.70  
4.70  
3.76  
4.76  
I
24 mA  
24 mA  
V
V
e
e
V
OL  
Maximum Low Level  
Output Voltage  
4.5 0.001  
5.5 0.001  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
I
50 mA  
OUT  
*V  
V or V  
IL IH  
IN  
4.5  
5.5  
0.36  
0.36  
0.50  
0.50  
0.44  
0.44  
I
24 mA  
24 mA  
OL  
V
e
e
I
I
Maximum Input  
Leakage Current  
V
V
, GND  
CC  
IN  
I
I
g
g
g
g
g
5.5  
5.5  
0.1  
1.0  
5.0  
1.0  
2.5  
mA  
mA  
Maximum TRI-STATE  
Leakage Current  
V
V
V , V  
IL IH  
OZ  
g
0.25  
e
V
, GND  
CC  
O
e
b
2.1V  
I
I
I
I
Maximum I /Input  
CC  
5.5  
5.5  
5.5  
0.6  
1.1  
1.6  
50  
1.5  
75  
mA  
mA  
mA  
V
V
V
V
V
CC  
CCT  
OLD  
OHD  
CC  
I
e
²
Minimum Dynamic  
Output Current  
1.65V Max  
e
3.85V Min  
OLD  
OHD  
b
b
50  
75  
e
Maximum Quiescent  
Supply Current  
V
CC  
IN  
5.5  
5.0  
5.0  
4.0  
1.5  
80.0  
40.0  
mA  
V
or GND (Note 1)  
V
Quiet Output  
Maximum Dynamic V  
Figures 2-12,13  
(Notes 2, 3)  
OLP  
OLV  
OL  
V
Quiet Output  
Minimum Dynamic V  
Figures 2-12,13  
(Notes 2, 3)  
b
b
1.2  
0.6  
V
OL  
*All outputs loaded thresholds on input associated with output under test.  
²
Maximum test duration 2.0 ms, one output loaded at a time.  
3
DC Electrical Characteristics for ’ACTQ Family Devices (Continued)  
74ACTQ  
54ACTQ  
74ACTQ  
e
e
T
A
V
T
CC  
A
e a  
Symbol  
Parameter  
T
A
25 C  
§
Units  
Conditions  
b
a
55 C to 125 C  
b a  
40 C to 85 C  
(V)  
§
§
§
§
Typ  
Guaranteed Limits  
V
V
Minimum High Level  
(Notes 2, 4)  
(Notes 2, 4)  
IHD  
5.0  
5.0  
1.9  
2.2  
0.8  
V
V
Dynamic Input Voltage  
Maximum Low Level  
ILD  
1.2  
Dynamic Input Voltage  
@
@
for 54ACTQ 25 C is identical to 74ACTQ 25 C.  
Note 1: I  
§
§
CC  
Note 2: Plastic DIP package.  
@
Note 3: Max number of outputs defined as (n). Data Inputs are driven 0V to 3V. One output GND.  
b
Note 4: Max number of Data Inputs (n) switching. (n 1) Inputs switching 0V to 3V (’ACTQ). Input-under-test switching: 3V to threshold (V ), 0V to threshold  
ILD  
e
(V ), f  
IHD  
1 MHz.  
AC Electrical Characteristics  
74ACQ  
54ACQ  
e b  
74ACQ  
e b  
40 C  
T
55 C  
T
§
to 125 C  
§
A
A
e a  
A
V *  
CC  
(V)  
T
25 C  
§
50 pF  
a
e
a
e
Symbol  
Parameter  
to 85 C  
Units  
§
50 pF  
§
50 pF  
e
C
L
C
C
L
L
Min  
Typ  
Max  
Min  
Max  
Min  
Max  
t
t
t
, t  
PHL PLH  
Propagation Delay  
Data to Output  
3.3  
5.0  
2.0  
1.5  
7.0  
5.0  
9.0  
6.0  
1.0  
1.0  
12.5  
9.0  
2.0  
1.5  
9.5  
6.5  
ns  
ns  
ns  
ns  
, t  
PZL PZH  
Output Enable Time  
3.3  
5.0  
2.5  
1.5  
8.0  
6.5  
12.0  
8.0  
1.0  
1.0  
12.0  
10.0  
2.5  
1.5  
12.5  
8.5  
, t  
PHZ PLZ  
Output Disable Time  
3.3  
5.0  
1.0  
1.0  
9.0  
7.5  
13.5  
9.0  
1.0  
1.0  
11.5  
10.0  
1.0  
1.0  
14.0  
9.5  
t
t
Output to Output  
3.3  
5.0  
1.0  
0.5  
1.5  
1.0  
1.5  
1.0  
OSHL,  
Skew** Data to Output  
OSLH  
g
*Voltage Range 5.0 is 5.0V 0.5V.  
g
Voltage Range 3.3 is 3.3V 0.3V.  
**Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification  
applies to any outputs switching in the same direction, either HIGH to LOW (t  
) or LOW to HIGH (t  
). Parameter guaranteed by design.  
OSLH  
OSHL  
AC Electrical Characteristics  
74ACTQ  
54ACTQ  
e b  
74ACTQ  
e b  
40 C  
T
55 C  
T
A
§
to 125 C  
§
A
e a  
A
V *  
CC  
(V)  
T
25 C  
§
50 pF  
a
e
a
e
Symbol  
Parameter  
to 85 C  
Units  
§
50 pF  
§
50 pF  
e
C
L
C
C
L
L
Min  
Typ  
Max  
Min  
Max  
Min  
Max  
t , t  
PHL PLH  
Propagation Delay  
Data to Output  
5.0  
1.5  
5.5  
6.5  
1.5  
9.0  
1.5  
7.0  
ns  
t
, t  
PZL PZH  
Output Enable Time  
Output Disable Time  
5.0  
5.0  
1.5  
1.0  
7.0  
8.0  
8.5  
9.5  
1.5  
1.5  
10.5  
10.5  
1.5  
1.0  
9.0  
ns  
ns  
t , t  
PHZ PLZ  
10.0  
t
t
Output to Output  
OSHL,  
5.0  
0.5  
1.0  
1.0  
ns  
Skew** Data to Output  
OSLH  
g
*Voltage Range 5.0 is 5.0V 0.5V.  
**Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification  
applies to any outputs switching in the same direction, either HIGH to LOW (t  
) or LOW to HIGH (t  
). Parameter guaranteed by design.  
OSLH  
OSHL  
4
Capacitance  
Symbol  
Parameter  
Typ  
Units  
Conditions  
e
e
C
C
Input Capacitance  
4.5  
pF  
V
V
OPEN  
5.0V  
IN  
CC  
Power Dissipation  
Capacitance  
PD  
CC  
70  
pF  
FACT Noise Characteristics  
The setup of a noise characteristics measurement is critical  
to the accuracy and repeatability of the tests. The following  
is a brief description of the setup used to measure the noise  
characteristics of FACT.  
V
/V  
OLP OLV  
and V  
/V :  
OHP OHV  
Determine the quiet output pin that demonstrates the  
greatest noise levels. The worst case pin will usually be  
the furthest from the ground pin. Monitor the output volt-  
ages using a 50X coaxial cable plugged into a standard  
SMB type connector on the test fixture. Do not use an  
active FET probe.  
#
Equipment:  
Hewlett Packard Model 8180A Word Generator  
PC-163A Test Fixture  
Tektronics Model 7854 Oscilloscope  
Measure V  
and V  
OLV  
on the quiet output during the  
and V on the quiet out-  
#
#
OLP  
HL transition. Measure V  
OHP  
put during the LH transition.  
OHV  
Procedure:  
1. Verify Test Fixture Loading: Standard Load 50 pF, 500X.  
Verify that the GND reference recorded on the oscillo-  
scope has not drifted to ensure the accuracy and repeat-  
ability of the measurements.  
2. Deskew the word generator so that no two channels have  
greater than 150 ps skew between them. This requires  
that the oscilloscope be deskewed first. Swap out the  
channels that have more than 150 ps of skew until all  
channels being used are within 150 ps. It is important to  
deskew the word generator channels before testing. This  
will ensure that the outputs switch simultaneously.  
V
and V  
:
IHD  
ILD  
Monitor one of the switching outputs using a 50X coaxial  
cable plugged into a standard SMB type connector on  
the test fixture. Do not use an active FET probe.  
#
3. Terminate all inputs and outputs to ensure proper loading  
of the outputs and that the input levels are at the correct  
voltage.  
First increase the input LOW voltage level, V , until the  
IL  
output begins to oscillate. Oscillation is defined as noise  
#
#
#
on the output LOW level that exceeds V limits, or on  
IL  
output HIGH levels that exceed V limits. The input  
IH  
LOW voltage level at which oscillation occurs is defined  
4. Set V  
to 5.0V.  
CC  
5. Set the word generator to toggle all but one output at a  
frequency of 1 MHz. Greater frequencies will increase  
DUT heating and affect the results of the measurement.  
as V  
.
ILD  
Next increase the input HIGH voltage level on the word  
generator, V until the output begins to oscillate. Oscilla-  
IH  
tion is defined as noise on the output LOW level that  
6. Set the word generator input levels at 0V LOW and 3V  
HIGH for ACT devices and 0V LOW and 5V HIGH for AC  
devices. Verify levels with a digital volt meter.  
exceeds V limits, or on output HIGH levels that exceed  
IL  
V
limits. The input HIGH voltage level at which oscilla-  
.
IH  
tion occurs is defined as V  
IHD  
Verify that the GND reference recorded on the oscillo-  
scope has not drifted to ensure the accuracy and repeat-  
ability of the measurements.  
TL/F/10235–4  
FIGURE 1. Quiet Output Noise Voltage Waveforms  
Note A. V  
and V  
are measured with respect to ground reference.  
OLP  
OHV  
k
150 ps.  
e
e
e
3 ns, t 3 ns, skew  
f
Note B. Input pulses have the following characteristics: f  
1 MHz, t  
r
5
TL/F/10235–5  
FIGURE 2. Simultaneous Switching Test Circuit  
Ordering Information  
The device number is used to form part of a simplified purchasing code where the package type and temperature range are  
defined as follows:  
74ACTQ 244  
P
C
QR  
Temperature Range Family  
Special Variations  
e
e
e
e
74ACQ  
54ACQ  
Commercial  
Military  
Commercial TTL-Compatible  
Military TTL-Compatible  
X
QR  
Devices shipped in 13 reels  
×
Commercial grade device with  
burn-in  
e
e
74ACTQ  
54ACTQ  
e
QB  
Military grade device with  
environmental and burn-in  
processing shipped in tubes  
Device Type  
Package Code  
Temperature Range  
e
e
e
e
e
e
e
P
D
F
L
S
QS  
Plastic DIP  
Ceramic DIP  
Flatpak  
Leadless Chip Carrier (LCC)  
Small Outline Package (SOIC)  
Quarter Size Outline Package (QSOP)  
b a  
C
Commercial ( 40 C to 85 C)  
§
§
e
b a  
Military ( 55 C to 125 C)  
M
§
§
6
Physical Dimensions inches (millimeters)  
20-Terminal Ceramic Leadless Chip Carrier (L)  
NS Package Number E20A  
20-Lead Ceramic Dual-In-Line Package (D)  
NS Package Number J20A  
7
Physical Dimensions inches (millimeters) (Continued)  
20-Lead Small Outline Integrated Circuit (S)  
NS Package Number M20B  
20-Lead Quarter Size Outline Package (QS)  
NS Package Number MQA20  
8
Physical Dimensions inches (millimeters) (Continued)  
20-Lead Plastic Dual-In-Line Package (P)  
NS Package Number N20B  
20-Lead Plastic Chip Carrier (Q)  
NS Package Number V20A  
9
Ý
Lit. 114674  
Physical Dimensions inches (millimeters) (Continued)  
20-Lead Ceramic Flatpak (F)  
NS Package Number W20A  
LIFE SUPPORT POLICY  
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant  
into the body, or (b) support or sustain life, and whose  
failure to perform, when properly used in accordance  
with instructions for use provided in the labeling, can  
be reasonably expected to result in a significant injury  
to the user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
National Semiconductor  
Corporation  
2900 Semiconductor Drive  
P.O. Box 58090  
Santa Clara, CA 95052-8090  
Tel: 1(800) 272-9959  
TWX: (910) 339-9240  
National Semiconductor  
GmbH  
Livry-Gargan-Str. 10  
D-82256 Furstenfeldbruck  
Germany  
Tel: (81-41) 35-0  
Telex: 527649  
Fax: (81-41) 35-1  
National Semiconductor National Semiconductor  
National Semiconductores  
Do Brazil Ltda.  
Rue Deputado Lacorda Franco  
120-3A  
Sao Paulo-SP  
Brazil 05418-000  
Tel: (55-11) 212-5066  
Telex: 391-1131931 NSBR BR  
Fax: (55-11) 212-1181  
National Semiconductor  
(Australia) Pty, Ltd.  
Building 16  
Business Park Drive  
Monash Business Park  
Nottinghill, Melbourne  
Victoria 3168 Australia  
Tel: (3) 558-9999  
Japan Ltd.  
Hong Kong Ltd.  
Sumitomo Chemical  
Engineering Center  
Bldg. 7F  
13th Floor, Straight Block,  
Ocean Centre, 5 Canton Rd.  
Tsimshatsui, Kowloon  
1-7-1, Nakase, Mihama-Ku Hong Kong  
Chiba-City,  
Tel: (852) 2737-1600  
Fax: (852) 2736-9960  
Ciba Prefecture 261  
Tel: (043) 299-2300  
Fax: (043) 299-2500  
Fax: (3) 558-9998  
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.  

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