54ACT11241 [TI]

OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS; 八路缓冲器/线路驱动器,具有三态输出
54ACT11241
型号: 54ACT11241
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS
八路缓冲器/线路驱动器,具有三态输出

驱动器 输出元件
文件: 总5页 (文件大小:89K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢊ ꢃꢄꢂꢋꢈꢌ ꢍꢎ ꢎꢏ ꢐꢑꢒ ꢋꢓ ꢔꢏꢈ ꢕ ꢐꢓ ꢖ ꢏꢐ  
ꢗ ꢓꢄ ꢘꢈ ꢙ ꢚꢑꢄꢂꢄ ꢏꢈ ꢊ ꢍꢄ ꢛꢍ ꢄ  
SCAS011B − D2957, JULY 1987 − REVISED APRIL 1993  
54ACT11241 . . . JT PACKAGE  
74ACT11241 . . . DB, DW OR NT PACKAGE  
3-State Outputs Drive Bus Lines or Buffer  
Memory Address Registers  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
Flow-Through Architecture Optimizes  
1Y1  
1Y2  
1Y3  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
1G  
PCB Layout  
2
1A1  
1A2  
1A3  
1A4  
Center-Pin V  
and GND Configurations  
Minimize High-Speed Switching Noise  
3
CC  
4
1Y4  
5
GND  
GND  
GND  
GND  
2Y1  
2Y2  
2Y3  
2Y4  
EPICt (Enhanced-Performance Implanted  
6
V
CMOS) 1-mm Process  
CC  
7
V
CC  
500-mA Typical Latch-Up Immunity at 125°C  
8
2A1  
2A2  
2A3  
2A4  
2G  
Package Options Include Plastic Small-  
Outline Packages, Plastic Shrink  
Small-Outline Packages, Ceramic Chip  
Carriers, and Standard Plastic and Ceramic  
300-mil DIPs  
9
10  
11  
12  
54ACT11241 . . . FK PACKAGE  
(TOP VIEW)  
description  
These octal buffers or line drivers are designed  
specifically to improve both the performance and  
density of three-state memory address drivers,  
clock drivers, and bus-oriented receivers and  
transmitters. Taken together with the ACT11240  
and ACT11244, these devices provide the choice  
of selected combinations of inverting and  
noninverting outputs, symmetrical G (active-low  
output control) inputs, and complementary G and  
G inputs. These devices feature high fan-out.  
4
3
2 1 28 27 26  
5
6
7
8
9
25  
24  
23  
22  
2A3  
2A4  
2G  
1A2  
1A1  
1G  
NC  
NC  
21 2Y4  
1Y1  
1Y2  
1Y3  
10  
2Y3  
2Y2  
20  
19  
11  
12 13 14 15 16 17 18  
The 54ACT11241 is characterized for operation  
over the full military temperature range of − 55°C  
to 125°C. The 74ACT11241 is characterized for  
operation from − 40°C to 85°C.  
NC − No internal connection  
FUNCTION TABLE  
OUTPUT  
CONTROL  
1G  
DATA  
INPUT  
1A  
OUTPUT  
CONTROL  
2G  
DATA  
OUTPUT  
INPUT  
2Y  
OUTPUT  
1Y  
2A  
H
L
L
X
L
Z
L
L
H
H
X
L
Z
L
H
H
H
H
EPIC is a trademark of Texas Instruments Incorporated.  
ꢄꢨ  
Copyright 1993, Texas Instruments Incorporated  
ꢤ ꢨ ꢥ ꢤꢝ ꢞꢲ ꢠꢟ ꢣ ꢫꢫ ꢩꢣ ꢡ ꢣ ꢢ ꢨ ꢤ ꢨ ꢡ ꢥ ꢭ  
2−1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001  
ꢀ ꢁꢂ ꢃ ꢄ ꢅꢅ ꢆꢁ ꢅ ꢇ ꢈ ꢉ ꢁꢂ ꢃꢄ ꢅꢅ ꢆ ꢁꢅ  
ꢊꢃ ꢄꢂ ꢋꢈ ꢌ ꢍꢎ ꢎꢏ ꢐꢑ ꢒ ꢋꢓ ꢔ ꢏꢈ ꢕ ꢐꢓ ꢖ ꢏ ꢐꢑ  
ꢗꢓ ꢄ ꢘ ꢈꢙ ꢚꢑ ꢄꢂꢄꢏ ꢈ ꢊ ꢍꢄ ꢛꢍꢄ ꢑ  
SCAS011B − D2957, JULY 1987 − REVISED APRIL 1993  
logic symbol  
logic diagram (positive logic)  
24  
24  
1G  
EN  
1G  
23  
22  
21  
20  
1
2
3
4
1Y1  
1A1  
1A2  
1A3  
1A4  
23  
1
2
3
4
1Y1  
1Y2  
1Y3  
1Y4  
1A1  
1Y2  
1Y3  
1Y4  
22  
1A2  
21  
1A3  
13  
2G  
EN  
20  
17  
16  
15  
14  
9
10  
11  
12  
1A4  
2A1  
2A2  
2A3  
2A4  
2Y1  
2Y2  
2Y3  
2Y4  
13  
2G  
17  
9
10  
11  
2Y1  
2Y2  
2Y3  
2Y4  
2A1  
This symbol is in accordance with ANSI/IEEE Std 91-1984  
and IEC Publication 617-12.  
16  
2A2  
15  
2A3  
14  
12  
2A4  
Pin numbers shown are for the DW, JT, and NT packages.  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V  
+ 0.5 V  
+ 0.5 V  
I
CC  
CC  
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V  
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
IK  
I
I
CC  
Output clamp current, I  
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
Continuous current through V  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA  
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
}
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and  
functional operation of the device at the se or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2−2  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001  
ꢊ ꢃꢄꢂꢋꢈꢌ ꢍꢎ ꢎꢏ ꢐꢑꢒ ꢋꢓ ꢔꢏ ꢈꢕ ꢐ ꢓꢖ ꢏ ꢐ  
ꢗ ꢓꢄ ꢘꢈ ꢙ ꢚꢑꢄꢂꢄ ꢏꢈ ꢊ ꢍꢄ ꢛꢍ ꢄ  
SCAS011B − D2957, JULY 1987 − REVISED APRIL 1993  
recommended operating conditions  
54ACT11241  
74ACT11241  
UNIT  
MIN  
4.5  
2
MAX  
MIN  
4.5  
2
MAX  
V
V
V
V
V
Supply voltage  
5.5  
5.5  
V
V
CC  
IH  
IL  
High-level input voltage  
Low-level input voltage  
Input voltage  
0.8  
0.8  
V
0
0
V
V
0
0
V
V
V
I
CC  
CC  
Output voltage  
V
O
CC  
CC  
I
I
High-level output current  
Low-level output current  
Input transition rise or fall rate  
Operating free-air temperature  
24  
24  
24  
24  
mA  
mA  
ns/V  
°C  
OH  
OL  
Dt/Dv  
0
10  
0
10  
T
55  
125  
− 40  
85  
A
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
A
= 25°C  
54ACT11241  
74ACT11241  
PARAMETER  
TEST CONDITIONS  
V
UNIT  
CC  
MIN  
4.4  
TYP  
MAX  
MIN  
4.4  
MAX  
MIN  
4.4  
5.4  
3.8  
4.8  
MAX  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
5.5 V  
5.5 V  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
I
I
= − 50 mA  
OH  
5.4  
5.4  
3.94  
4.94  
3.7  
= − 24 mA  
V
OH  
V
OH  
4.7  
{
{
3.85  
I
I
= − 50 mA  
OH  
3.85  
= − 75 mA  
OH  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
I
= 50 mA  
OL  
OL  
0.36  
0.36  
0.5  
0.44  
0.44  
I
= 24 mA  
V
OL  
V
0.5  
{
1.65  
I
I
= 50 mA  
OL  
{
1.65  
5
= 75 mA  
OL  
I
I
I
V
= V  
or GND  
0.5  
0.1  
8
10  
1
mA  
mA  
mA  
OZ  
O CC  
V = V  
or GND  
or GND,  
1
I
I
CC  
V = V  
I = 0  
O
160  
80  
CC  
I
CC  
One input at 3.4 V,  
Other inputs at GND or V  
}
5.5 V  
0.9  
1
1
mA  
DI  
CC  
CC  
C
C
V = V  
CC  
or GND  
or GND  
5 V  
5 V  
4
pF  
pF  
i
I
V = V  
O CC  
10  
o
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.  
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V  
.
CC  
2−3  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001  
ꢀ ꢁꢂ ꢃ ꢄ ꢅꢅ ꢆꢁ ꢅ ꢇ ꢈ ꢉ ꢁꢂ ꢃꢄ ꢅꢅ ꢆ ꢁꢅ  
ꢊꢃ ꢄꢂ ꢋꢈ ꢌ ꢍꢎ ꢎꢏ ꢐꢑ ꢒ ꢋꢓ ꢔ ꢏꢈ ꢕ ꢐꢓ ꢖ ꢏ ꢐꢑ  
ꢗꢓ ꢄ ꢘ ꢈꢙ ꢚꢑ ꢄꢂꢄꢏ ꢈ ꢊ ꢍꢄ ꢛꢍꢄ ꢑ  
SCAS011B − D2957, JULY 1987 − REVISED APRIL 1993  
switching characteristics over recommended operating free-air temperature range,  
V
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)  
CC  
T
A
= 25°C  
TYP  
6.6  
54ACT11241  
74ACT11241  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
9
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
10.7  
9.5  
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
10  
t
t
PLH  
PHL  
PZH  
A
Y
Y
Y
6.3  
8.5  
9.1  
t
7.5  
11.3  
10.5  
10.6  
11.2  
13  
12.3  
11.3  
11  
G or G  
G or G  
ns  
t
7.4  
11.9  
11.4  
12  
PZL  
t
7.6  
PHZ  
t
8.2  
11.7  
PLZ  
operating characteristics, V  
= 5 V, T = 25°C  
CC  
A
PARAMETER  
TEST CONDITIONS  
= 50 pF, f = 1 MHz  
L
TYP  
UNIT  
Outputs enabled  
27  
9
C
Power dissipation capacitance per buffer  
C
pF  
pd  
Outputs disabled  
PARAMETER MEASUREMENT INFORMATION  
2 × V  
CC  
TEST  
S1  
Open  
2 × V  
S1  
t
/t  
PLH PHL  
/t  
500 Ω  
Open  
GND  
From Output  
Under Test  
t
PLZ PZL  
CC  
GND  
t
/t  
PHZ PZH  
C
= 50 pF  
L
500 Ω  
(see Note A)  
LOAD CIRCUIT  
Output  
Control  
(low-level  
enabling)  
3 V  
0 V  
1.5 V  
1.5 V  
t
PZL  
3 V  
0 V  
t
PLZ  
Input  
(see Note B)  
Output  
Waveform 1  
[ V  
CC  
1.5 V  
1.5 V  
50% V  
CC  
20% V  
S1 at 2 × V  
(see Note C)  
CC  
CC  
V
OL  
t
PLH  
t
PHZ  
t
PHL  
t
PZH  
Output  
Waveform 2  
S1 at GND  
V
OH  
V
OH  
80% V  
CC  
50% V  
CC  
50% V  
Output  
CC  
50% V  
CC  
V
OL  
[ 0 V  
(see Note C)  
VOLTAGE WAVEFORMS  
NOTES: A. C includes probe and jig capacitance.  
VOLTAGE WAVEFORMS  
L
B. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t = 3 ns, t = 3 ns.  
O
r
f
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
D. The outputs are measured one at a time with one input transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
2−4  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001  
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