29323-BRF-001-A_15 [TE]

Line-Card-on-a-Chip;
29323-BRF-001-A_15
型号: 29323-BRF-001-A_15
厂家: TE CONNECTIVITY    TE CONNECTIVITY
描述:

Line-Card-on-a-Chip

文件: 总2页 (文件大小:507K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
3/6-Port DS3/E3/STS-1 Integrated  
Line Termination Device for Transport  
M29323/6 Line-Card-on-a-Chip”  
The M29323/6 provides a complete physical-layer solution  
>
KEY FEATURES  
for flexible DS3/E3/STS-1 clear channel services. The  
M29323/6 aggressively drives down cost for existing solu-  
tions and as well as reduces PCB real-estate and power.  
> High integration – LIUs with  
DJAT, DS3/E3  
framers/mappers, STS-1  
framers/mappers, STS-  
12/STM-4 framer  
> Parallel 8-bit, 77.76 MHz TDM  
telecom bus  
> Embedded CLADs for  
supported line rates  
Each port of the M29323/6 operates independently allowing  
for a mix of DS3, E3 or STS-1 on the same device. This  
enables ADMs/OEDs and MSPPs to deploy a single line card  
that supports the simultaneous mapping for SDH or SONET  
transport of both DS3 and E3.  
> Pattern generator/detector  
for BERT  
> Flexibility – mix DS3, E3 and  
STS-1 on one device  
> Comprehensive loopbacks  
> Easy implementation TAP  
software + high integration  
= faster time-to-market  
The M29323/6 includes 3/6 independent DS3/E3/STS-1 line  
interface units (LIUs) with built-in digital jitter attenuators  
(DJAT), 6/12 DS3/E3 framers and 3/6 STS-1 framers. Each  
port is capable of supporting DS3/E3/STS-1  
In addition, the M29323/6 supports pseudo-random bit  
sequence (PRBS) testing and a full set of loopback  
functions at different functional blocks.  
mapped/demapped signals to/from SONET/SDH.  
The M29323/6 line side interfaces support electrical  
DS3/E3/STS-1, requiring only the addition of transformers  
and passive termination. The M29323/6 system interface  
supports STS-12/STM-4 for the SONET/SDH traffic via a  
standard 8-bit, 77 MHz TDM telecom bus. Thus, a channelized  
OC-12/STM-4 or OC-3/STM-1 can be broken down to  
DS3/E3/STS-1 streams by the M29323/6 on a channel-by-  
channel basis.  
Using the telecom application package (TAP) software  
to abstract the physical registers, developers can easily  
implement the M29323/6 solution, reducing design time.  
The M29323/6 are offered in a 27mm FCBGA package.  
The M29323/6 requires only one 19.44 MHz reference clock  
(passive crystal) or 77.76/155.52 MHz SONET reference  
clock for generating all the necessary internal line rate  
clocks. The generated clocks are also available through  
an output pin.  
>
OH Access  
M29326  
6x DS3/E3  
to STS-1E  
Mapper/  
12x  
DS3/E3  
Framers  
Demapper  
6 Lines  
DS3/E3/  
STS-1E  
(EC-1)  
6x DS3/E3  
or  
Lines  
STS-1E  
LIU + DJAT  
OC-12  
Mux/  
Telecorn  
Bus  
8-Bit 77 MHz  
Demux  
Mini-  
Framer  
6x  
STS-1  
Framers  
PRBS  
Generator  
and Monitor  
Microprocessor  
Interface  
JTAG  
Test I/F  
STS-1 Overhead Access  
Systems Control  
STS-12 Overhead Access  
M29326 Functional Block Diagram  
Product Features  
• 3/6 DS3/E3/STS-1 LIUs with jitter  
attenuation/desynchronization  
• 3/6 STS-1 SONET/SDH framers  
support transport overhead access;  
includes monitor and generator  
• Local (source) and remote (line)  
capability at various internal  
points in the device  
Applications  
• SONET/SDH ADM/OED  
Adaptive receive equalizer enables  
> 1800 ft of cable reach  
• MSPP  
• STS-12/STM-4 SONET/SDH TDM  
supporting mapping/demapping of  
12 STS-1E or AU-3 into/from STS  
12/STM-4 frame  
• PRBS detector and generator  
supporting framed and unframed  
modes  
• Optical ADM  
• DCS  
– Programmable transmit pulse  
mask configuration  
• JTAG (IEEE 1149.1) boundary scan  
• NGDLC  
– Dynamic loop bandwidth to comply  
with all standard intrinsic and  
output jitter requirements  
• Pointer processing  
• Single rail 1.8 V core supply with  
3.3 V LvTTL I/O, 1.8V LVDS I/O  
• Class V voice switch  
• Overhead insertion and extraction  
• 6/12 DS3/E3 framers support  
DS3-M13, DS3-M23, DS3 C-bit  
parity E3-G.751, E3-G.832  
• Parallel 77.76 MHz x 8-bit Telecom  
bus interface  
• Embedded CLADs internally  
generating the DS3, E3, STS-1 clocks  
Ordering Information  
• M29323-12P  
• M29326-12P  
• Synchronous 16-bit microprocessor  
interface bus at 30–77 MHz bus rate  
• -40C to +85C operation  
• 3/6 DS3/E3 mappers/demappers  
supporting DS3/VC-3/AU-3;  
DS3/TUG-3/AU-4; E3/VC-3/AU-3;  
E3/TUG-3/AU-4  
– Glueless connection to  
Motorola MPC860  
www.mindspeed.com/salesoffices  
General Information:  
© 2004 Mindspeed Technologies . All rights reserved. Mindspeed and the Mindspeed  
logo are trademarks of Mindspeed Technologies. All other trademarks are the property  
of their respective owners. Although Mindspeed Technologies strives for accuracy in all  
its publications, this material may contain errors or omissions and is subject to change  
without notice. This material is provided as is and without any express or implied  
warranties, including merchantability, fitness for a particular purpose and non-  
infringement. Mindspeed Technologies shall not be liable for any special, indirect, inci-  
dental or consequential damages as a result of its use.  
Headquarters – Newport Beach  
4000 MacArthur Blvd., East Tower  
Newport Beach, CA 92660-3007  
29323/6-BRF-001-A M04-0928  

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