28478-EVMD-001-A [TE]

Evaluation Module Users Guide;
28478-EVMD-001-A
型号: 28478-EVMD-001-A
厂家: TE CONNECTIVITY    TE CONNECTIVITY
描述:

Evaluation Module Users Guide

文件: 总79页 (文件大小:506K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CN8478/CN8474A/  
CN8472A/CN8471A  
Evaluation Module Users Guide  
N8478UG1A  
August 16, 1999  
Information provided by Conexant Systems, Inc. (Conexant) is believed to be accurate and reliable. However, no responsibility is  
assumed by Conexant for its use, nor any infringement of patents or other rights of third parties which may result from its use. No  
license is granted by implication or otherwise under any patent rights of Conexant other than for circuitry embodied in Conexant  
products. Conexant reserves the right to change circuitry at any time without notice. This document is subject to change without  
notice.  
Conexant products are not designed or intended for use in life support appliances, devices, or systems where malfunction of a  
Conexant product can reasonably be expected to result in personal injury or death. Conexant customers using or selling Conexant  
products for use in such applications do so at their own risk and agree to fully indemnify Conexant for any damages resulting from  
such improper use or sale.  
Conexant and the Conexant symbol are trademarks of Conexant Systems, Inc.  
Product names or services listed in this publication are for identification purposes only, and may be trademarks or registered  
trademarks of their respective companies. All other marks mentioned herein are the property of their respective holders.  
© 1999 Conexant Systems, Inc.  
Printed in U.S.A.  
All Rights Reserved  
Reader Response: To improve the quality of our publications, we welcome your feedback. Please send comments or  
suggestions via e-mail to Conexant Reader Response@conexant.com. Sorry, we can't answer your technical  
questions at this address. Please contact your local Conexant sales office or local field applications engineer if you  
have technical questions.  
N8478UG1A  
Conexant  
Preliminary Information/Conexant Proprietary and Confidential  
Table of Contents  
List of Figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v  
List of Tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii  
1.0  
2.0  
Product Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1  
1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1  
1.2 Reference Documents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2  
1.3 Online Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2  
Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1  
2.1 Contents and Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1  
2.2 Board Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1  
2.3 Software Installation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2  
2.3.1  
2.3.2  
2.3.3  
Installing the CN8478 EVM Toolbox . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2  
Uninstalling the CN8478 EVM Toolbox . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2  
Driver Setup (OEMSETNT.INF, ROKWAN.SYS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2  
2.4 Windows NT Architectural Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3  
2.4.1  
2.4.2  
2.4.3  
2.4.4  
2.4.5  
Network Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4  
Windows NT Registry Entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5  
Software Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6  
Protocol Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7  
Generic Queries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7  
2.5 Api_t1e1ReadRegisterMap(). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8  
2.5.1  
2.5.2  
2.5.3  
Api_t1e1Configuration() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8  
Api_ReadDeviceStatistics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9  
Api_read_device_register(). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9  
3.0  
Hardware Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1  
3.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1  
3.2 Expansion Bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2  
3.3 PCI Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3  
3.4 Serial Buses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4  
N8478UG1A  
Conexant  
iii  
Preliminary Information/Conexant Proprietary and Confidential  
Table of Contents  
N8478UG1A  
Evaluation Module Users Guide  
3.5 T1 / E1 Line Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5  
3.6 Bt8370 Clocking Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5  
4.0  
Software Architecture. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1  
4.1 Software Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1  
4.1.1  
4.1.2  
4.1.3  
NT NDIS Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2  
CN8478 Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2  
Bt8370 Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3  
4.2 Development Tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3  
4.3 APIs—Backdoor Mechanism. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4  
4.3.1  
4.3.2  
4.3.3  
4.3.4  
4.3.5  
4.3.6  
4.3.7  
Backdoor Read. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5  
Backdoor Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10  
Backdoor Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11  
Backdoor Action Start. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11  
Backdoor Action Stop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-12  
Backdoor Action Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-13  
Backdoor Loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14  
5.0  
Using the CN8478 EVM Toolbox. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1  
5.1 Starting the CN8478 EVM Toolbox . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1  
5.2 Main Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1  
5.3 Application Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2  
5.3.1  
5.3.2  
5.3.3  
Application Level Menus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2  
Loopback Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5  
Summary of Application Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9  
5.4 Logical Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10  
5.4.1  
5.4.2  
5.4.3  
CN8478 Logical Level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10  
Bt8370 Logical Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11  
Summaries of Logical Level Windows. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11  
5.5 Physical Level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-13  
5.5.1  
5.5.2  
5.5.3  
Register Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-13  
Source, Values, and Destination Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-13  
Summary of Physical Level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-14  
iv  
Conexant  
N8478UG1A  
Preliminary Information/Conexant Proprietary and Confidential  
N8478UG1A  
Table of Contents  
Evaluation Module Users Guide  
6.0  
List of Acronyms and Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1  
Appendix A: Sample Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1  
Appendix B: Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1  
Appendix C: Mechanical Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-1  
Appendix D: Circuit Schematics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-1  
Appendix E: Circuit Board Drawings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-1  
Sales Offices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3  
N8478UG1A  
Conexant  
v
Preliminary Information/Conexant Proprietary and Confidential  
Table of Contents  
N8478UG1A  
Evaluation Module Users Guide  
vi  
Conexant  
N8478UG1A  
Preliminary Information/Conexant Proprietary and Confidential  
N8478UG1A  
List of Figures  
Evaluation Module Users Guide  
List of Figures  
Figure 2-1.  
Figure 2-2.  
Figure 2-3.  
Figure 2-4.  
Figure 3-1.  
Figure 3-2.  
Figure 3-3.  
Figure 3-4.  
Figure 4-1.  
Figure 4-2.  
Figure 4-3.  
Figure 5-1.  
Figure 5-2.  
Figure 5-3.  
Figure 5-4.  
Figure 5-5.  
Figure 5-6.  
Figure 5-7.  
Figure 5-8.  
Figure 5-9.  
Figure 5-10.  
Figure 5-11.  
Figure 5-12.  
Figure 5-13.  
Figure 5-14.  
Figure A-1.  
Windows NT Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3  
Title? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4  
Title? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5  
Software Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6  
Bt8474 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1  
Expansion Bus Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2  
Serial Bus Between MUSYCC and T1 Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4  
Bt8370 Serial Clock Generation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5  
Software Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1  
Backdoor Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4  
Structure of Data in Shared Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8  
Main Menu of the CN8478 EVM Toolbox. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1  
Application Level Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2  
Options Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3  
Explore Messages Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4  
PCI Configuration Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5  
Bt8370 Loopback Test Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6  
CN8478 Loopback Tests Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6  
Example of Test. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-7  
Channel Statistics Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-7  
Monitor Errors Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8  
Transmit and Receive Information Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8  
Bt847x Logical Level Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10  
Bt8370 Logical Level Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11  
CN8478 Registers Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-13  
Typical Development Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1  
N8478UG1A  
Conexant  
v
Preliminary Information/Conexant Proprietary and Confidential  
List of Figures  
N8478UG1A  
Evaluation Module Users Guide  
vi  
Conexant  
N8478UG1A  
Preliminary Information/Conexant Proprietary and Confidential  
N8478UG1A  
List of Tables  
Evaluation Module Users Guide  
List of Tables  
Table 4-1.  
Table 4-2.  
Table 4-3.  
Table 4-4.  
Table 4-5.  
Table 4-6.  
Table 4-7.  
Table 4-8.  
Table 4-9.  
Table 4-10.  
Table 4-11.  
Table 4-12.  
Table 4-13.  
Table 4-14.  
Table 4-15.  
Table 4-16.  
Table 4-17.  
Table 4-18.  
Table 4-19.  
Table 4-20.  
Table 4-21.  
Table 5-1.  
Table 5-2.  
Table 5-3.  
Read Shared Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5  
Read Shared Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5  
Read Shared Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5  
Read Bt847x Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6  
Read Bt847x Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6  
Read Bt8370 Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6  
Read Bt8370 Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7  
Read Message Maps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7  
Read Message Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8  
Read PCI Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9  
Write Bt8370 Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10  
Write Bt847x Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10  
Write Bt847x Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10  
Card Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11  
Bt847x Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11  
Bt847x Loopback Without Self Test. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11  
Stop Bt847x Loopback Test. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-12  
Configuration of Bt847x Time Slot Assignments and Channel Protocols . . . . . . . . . . . . . . 4-13  
Configure Loopback Message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14  
Run Bt8370 Loopback. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14  
Stop Bt8370 Loopback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14  
Summary of Application Level Window. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9  
Summary of CN8478 Logical Level Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11  
Summary of Bt8370 Logical Level Window. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-12  
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1.0 Product Overview  
1.1 Introduction  
This document describes the requirements and plan to build an Evaluation  
Module (EVM) for CN8478/CN8474A/CN8472A/CN8471A (MUSYCC). This  
document captures EVM requirements from marketing and engineering for the  
specification, design, software development, integration, and production phases.  
As a marketing collateral, the EVM is sold or otherwise made available to  
customers for the purposes of demonstrating features and accelerating customers’  
time to market.  
The CN8478 EVM is a demonstration and test platform that allows system  
developers and product designers to test and evaluate the functionality and  
performance of the CN8478 chip.  
The CN8478 EVM is an eight-channel synchronous communication module  
with T1 and E1 interfaces. Each physical line is supported by the Bt8370 T1/E1  
transceiver, which provides support for data link maintenance, and one  
High-Level Data Link Control (HDLC) controller supported by the CN8478,  
which formats up to 256 HDLC channels.  
The CN8478 EVM software is implemented under the Windows NT 4.0  
operating system as a Network Driver Interface Specification (NDIS) MiniPort  
driver. The WinNT driver code is available with the CN8478 EVM product.  
The CN8478 EVM Toolbox is divided into three levels: physical level, logical  
level, and application level. It is used to perform several functions:  
Loopback testing  
Reading channel statistics  
Reading PCI configurations  
Configuring dynamic hyperchanneling  
Reading from and writing to device registers  
Reading from and writing to shared memory  
Viewing register map  
Performance monitoring  
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1.2 Reference Documents  
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1.2 Reference Documents  
These related documents are available from Conexant, Network Access Products  
Division:  
CN8478/CN8474A/CN8472A/CN8471A—Multichannel Synchronous  
Communications Controller (MUSYCC)  
Bt8370—Fully Integrated T1/E1 Framer and Line Interface  
Other documents:  
Microsoft DDK/NDIS Drivers  
1.3 Online Documentation  
Technical product documentation for the CN8478 and Bt8370 is available from  
Conexant Information website.  
1
2
3
Go to http://www.conexant.com/techinfo.  
After registering, select Network Access.  
On the Network Access page, select the device number.  
Alternative component selection and specification for the bill of materials are  
also provided in Portable Document Format (PDF) in the same directory.  
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2.0 Installation  
2.1 Contents and Requirements  
The following items are included in your packing list:  
CN8478 Evaluation Module (EVM) board  
CN8478 EVM CD software  
CN8478/CN8474A/CN8472A/CN8471A datasheet  
Bt8370 datasheet  
CN8478 Evaluation Module Users Guide  
To use the CN8478 EVM, you need the following system:  
IBM PC or compatible with 32 MB RAM memory and a controller card  
(PCI 32 bit, 2.0 or higher)  
Windows NT server 4.0 operating system  
A protocol analyzer (optional)  
Your telecom equipment to be tested  
To use the online help, you need the following software:  
Acrobat Reader 3.0  
2.2 Board Installation  
To install the board, follow these steps:  
1. Power down the computer and follow the manufacturers directions to  
remove the cover from your computer.  
2. Locate an empty PCI bus slot and plug in the CN8478 EVM board.  
3. Plug the protocol analyzer into a T1/E1 port; otherwise, leave the T1/E1  
ports disconnected.  
4. Follow the manufacturers directions to replace the cover on your computer  
and power up.  
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2.3 Software Installation  
Copy the software for the driver and the Toolbox from the supplied CD onto the  
hard drive.  
2.3.1 Installing the CN8478 EVM Toolbox  
Run Setup.exefrom the CD path: projects/EVM847x\setup.exe The  
.
installation batch file adds the CN8478 EVM Toolbox to the Program menu.  
2.3.2 Uninstalling the CN8478 EVM Toolbox  
To uninstall CN8478 EVM Toolbox, run Add/Remove Programs in the Control  
Panel window and select CN8478 EVM Toolbox. This removes all files and  
information from the registry entries.  
2.3.3 Driver Setup (OEMSETNT.INF, ROKWAN.SYS)  
Each NDIS driver must provide a setup file, called an OEMSETNT.INF script,  
containing information about how the driver is loaded and its relationships to  
other network drivers. During system setup, the network is configured on the  
machine, and the setup file for each network component writes to the registry.  
This describes how these components fit within the set of installed network  
drivers that are bound into the network stack. The new network driver is the  
Conexant WAN Adapter, ROCKWAN.SYS. To install the driver, perform the  
following steps:  
1. From the Start menu, choose Settings and Control Panel.  
2. From the Control Panel, double click the Network icon.  
3. From the Network window, choose Adapters.  
4. In the Adapters screen, click Add. This opens a window with all Network  
Adapters in the system. Click HaveDisk.  
5. Type the path: projects/Windows Driver/wmp-nt40 and click OK.  
,
This path contains the driver file (i.e. OEMSETNT.INF, ROKWAN.SYS).  
If the path is incorrectly typed, this error message is received:  
“Setup Message: Setup cannot find OEMSETUP.INF or  
OSMSETNT.INF. Please type a new path to the OEMSETUP.INF  
file. “  
6. The next window is Select OEM Option window. Choose Conexant WAN  
Adapter. Click OK.  
7. The next window is the Conexant WAN Miniport Driver Bus Location  
screen. Select the PCI Bus Type. Select the Bus Number where the PCI bus  
is located. Click OK. The following message is displayed:  
“Rockwell WAN setup is completed.  
8. Click OK.  
9. To set up the bindings of the configuration, click the Close button from  
Network windows.  
10. To complete installation, shut down and restart your computer.  
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2.4 Windows NT Architectural Model  
2.4 Windows NT Architectural Model  
The generic architecture of the Windows NT CN8478 EVM is defined as a  
modular system.  
Figure 2-1 illustrates the Windows NT architecture as a modular system.  
Figure 2-1. Windows NT Architecture  
NT Executive  
Kernel  
Hardware Abstraction Layer  
(HAL)  
Hardware Platform  
8478_049  
Hardware platform = PCI card and MIC/WAH adaptor, which contains the  
CN8478 part.  
Where:  
Hardware Abstraction Layer (HAL) virtualizes hardware interfaces.  
Kernel manages the basic operation of Windows NT. The activities the  
kernel schedules are called threads, the most basic entity in the system that  
can be scheduled. Threads are defined in the context of the process. A  
process is defined as an address space, a set of objects visible to the  
process, and a set of threads that run in the context of the process.  
NT Executive system services interface consists of several distinct software  
components that offer their services both to user-mode process and to one  
another. These Executive components are independent and communicate  
through well-defined interfaces as illustrated in Figure 2-2.  
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Figure 2-2. NT Executive Components  
NT Executive  
Object  
Mgr  
Process  
Mgr  
Virtual  
Memory Mgr  
I/O Mgr  
Config  
Mgr  
Security  
Monitor  
Local Proc  
Call  
8478_050  
The Backdoor mechanism (messages) communicates to the I/O manager in order  
to query and get data.  
The I/O manager converts the I/O request from user and kernel-mode threads  
into properly sequenced calls to the NIC driver routine. Through the backdoor  
mechanism, an interface is defined so all device drivers can communicate with  
the application (GUI) in the same way. Therefore, the application need not know  
any specific device drivers’ APIs that will be called in the device-specific part of  
NIC driver.  
2.4.1 Network Driver  
The CN8500 EVM NIC driver is a network device driver, implemented as a  
component in the I/O architecture. Windows NT includes integrated networking  
capabilities and support for distributed applications. The networking level is  
supported by a series of network drivers, illustrated in Figure 2-3.  
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2.4 Windows NT Architectural Model  
Figure 2-3. Networking Level  
Provider Interface/Server  
Transport Driver Interface  
NDIS Interface  
Network adapter card  
drivers and miniport drivers  
Network  
8478_051  
2.4.2 Windows NT Registry Entry  
Setup—loads new configuration data to the Registry.  
Recognizer—places hardware configuration in your Registry when you  
start a computer running Windows NT.  
Windows NT Kernel—extracts information from the Registry (such as  
which device drivers to load and their load order) during the system  
startup.  
Device drivers—send and receive load parameters and configuration data  
from the Registry.  
A device driver must report system resources it uses, such as hardware  
interrupts and DMA channels, so the system can add this information to  
the Registry. Application and device drivers can read this Registry  
information to provide users with smart installation and configuration  
programs.  
Administrative tools—can be used to modify configuration data.  
Agenda—  
Process—an address space, set of objects (resources) visible to the process,  
and a set of threads that run in the context of the process. A thread is most  
the basic schedulable entity in the system. The process has its own set of  
registers, its own kernel stack, a thread environment block, and user stack  
in the address space of its process.  
Kernel—schedules threads to be executed. The threads are defined in the  
context of the process which defines an address space, a set of objects  
visible to the process, and a set of threads that runs in the context of the  
process. The kernel manages two types of objects:  
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1. Dispatcher objects have a signal state, which includes the following:  
events, mutants, semaphores, threads and timers.  
2. Control objects control the operation of the kernel.  
2.4.3 Software Block Diagram  
The diagram in Figure 2-4 indicates the basic software blocks .  
Figure 2-4. Software Block Diagram  
Application  
GUI  
T1/E1T3/E3 HDLC  
Protocol Structure Update  
Device IO Control  
I/O Control Thread  
I/O Manager  
User Mode  
Kernel Mode  
SYS File Loaded in the OS  
Device Independent Handler  
(Device IO Control)  
or  
(Serial Driver)  
SEND_MESSAGE  
WinNT  
Device Specific (ID_DEVICE)  
Handler Protocol Structure  
Message  
(Parser)  
B1  
HPI  
C1  
HPI  
A1  
HPI  
HDLC  
T1/E1  
T3/E3  
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2.4 Windows NT Architectural Model  
2.4.4 Protocol Structure  
2.4.4.1 Backdoor  
Structure  
The Backdoor structure is a message protocol communication between the driver  
and the GUI.  
For WinNT, this structure is passed to the DeviceIOControl which passes the  
control to the Service Access Point (SAP) which is the WinNT Device-specific  
function.  
The implementation of the Backdoor structure is as follows:  
typedef struct tBackDoor {  
DWORD KeyCode; / * per device*  
DWORD ReqCode; / *request Code*/  
DWORD ReqSubCode; /* subrequest Code*/  
DWORD TotalSize; /* backdoor total structure *./  
DWORD NeededSize;  
DWORD ResultCode;  
DWORD Param1;  
DWORD Param2;  
DWORD Param3;  
DWORD Param4;  
DWORD Param5;  
DWORD Param6;  
DWORD vParam1Size;  
DWORD vParam1Offset;  
DWORD vParam2Size;  
DWORD vParam2Offset;  
DWORD vParam3Size;  
DWORD vParam3Offset;  
DWORD vParam4Size;  
DWORD vParam4Offset;  
//v for variable  
BYTE data[4];  
}BACK_DOOR, *PBACK_DOOR;  
2.4.5 Generic Queries  
READ_SHARED_MEMORY  
READ_SHARED_MEMORY_LOCATION  
2.4.5.1 T1/E1 Device  
Driver  
The Backdoor structure in order to provide protocol message communication  
between the Application Level and the Device Driver.  
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2.4.5.2 T1/E1 HPI  
Primitive Functions  
System and backdoor initialization  
Pbd->parm1 = port_number (group number)  
Pbd->Reqcode = BACKDOOR _READ  
Pbd->ReqSubCode = BACKDOR_READ_XXXX_REGITER_MAP  
Pbd->NeedSize = sizeof(BACKDOOR) + sizeof(GRP_REG_MAP)  
Pdb->TotolSize = sizeof(BACKDOOR) + sizeof(GRP_REG_MAP)  
Pdb->vParm1Offset = sizeof(BACKDOOR)  
Pdb->vParma1Size = sizeof(GRP_REG_MAP)  
Note:  
If the image will be kept in local memory, no call to the HPI is performed;  
otherwise,  
NdisMoveMemory(Pdb->parm1Offset,  
&Reg_local_image(device_id), pdb-vParm1Size);  
Aa call the HPI .  
2.5 Api_t1e1ReadRegisterMap()  
Description  
Synopsis  
This function calls the HPI T1/E1 to provide the T1/E1 register  
map.  
STATUS Api_t1e1ReadRegisterMap  
(
DEVADDR  
Void  
)
deviceAddr  
*
Input Parameters deviceAddr—specifies the device’s base address as seen by the  
MPU.  
Output Parameters deviceId— identifier used in subsequent device HPI primitives.  
Body Call the adequate HPI.  
Returns  
• SUCCESS  
• ERR_code  
Pbd->parm1 = port_number (group number)  
Pbd->Reqcode = BACKDOOR _READ  
Pbd->ReqSubCode= BACKDOR_READ_XXXX_REGITER_MAP  
Pbd->NeedSize=sizeof(BACKDOOR) + sizeof(GRP_REG_MAP)  
Pdb-TotolSize = sizeof(BACKDOOR) + sizeof(GRP_REG_MAP)  
Pdb->vParm1Offset = sizeof(BACKDOOR)  
Pdb->vParma1Size = sizeof(Bt83xx_device)  
2.5.1 Api_t1e1Configuration()  
Description  
This function calls the specific device drive API in order to pro-  
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vide the device driver configuration..  
STATUS Api_t1e1Configuration  
Synopsis  
(
DEVADDRdeviceAddr  
Void *  
)
Input Parameters deviceAddr—This value specifies the device’s base address as  
seen by the MPU.  
Output Parameters deviceId—The device identifier used in subsequent device HPI  
primitives.  
Body: Call the adequate HPI  
Returns  
• SUCCESS  
Example:  
Call T1/E1 HPI to provide the configuration.  
2.5.2 Api_ReadDeviceStatistics  
2.5.3 Api_read_device_register()  
Description  
This function calls the specific device drive API in order to pro-  
vide the device driver configuration..  
Synopsis  
STATUS Api_t1e1Configuration  
(
DEVADDRdeviceAddr  
Void *  
)
Input Parameters deviceAddr—specifies the device’s base address as seen by the  
MPU.  
Output Parameters deviceId – The device identifier used in subsequent device HPI  
primitives.  
Body: Call the adequate HPI  
Returns  
• SUCCESS  
Example:  
Call T1/E1 HPI to provide the configuration.  
Init  
BACKDOOR_ADAPTER_INIT  
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Init_device_specific_mode(E1,T1)  
Init_device_diagnostics  
Action_start  
Start_hdlc_loopback  
Reset_global  
Reset_local  
start_TX_pulse_template  
start_loopback_option  
start_TX_isolated_pulse  
start_TX_all_ones  
Action_stop  
stop_hdlc_loopback  
stop_TX_pulse_template  
stop_loopback_option  
stop_TX_isolated_pulse  
stop_TX_all_ones  
Action_configure  
Configure_device  
Configure_hdlc_loopback  
Action_write  
Write_device_register  
Write_shared_memory_location  
Genereal  
Api_readPciConfiguration  
Api_readSharedMemory  
Api_readRegistryConfiguration  
t1e1InitDev()  
Description  
Synopsis  
This function initializes a device’s registers to an initial,  
default state as specified by the t1e1 register configuration  
structure. All registers configured by other HPI primitives will  
be overwritten. This function is typically called only once,  
immediately after t1e1RegisterDev().  
STATUS t1e1InitDev  
(
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2.5 Api_t1e1ReadRegisterMap()  
DEVIDdeviceId  
tRegisterConfigStruct*pRegisterConfig  
)
Input Parameters  
deviceId – The device identifier.  
*pRegisterConfig – Pointer to a device configuration structure.  
This structure contains values for all of the device’s configura-  
tion and control registers. Registers not included are those  
which are updated by the device.  
Output Parameters  
Returns  
None  
• SUCCESS  
• ERROR  
HDLC  
HAL  
The HAL will inculde services such as read and write for the EBUS.  
Read_EBUS ();  
Write_EBUS();  
Interrupt Handler  
Interrupt Handler per device  
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3.0 Hardware Description  
3.1 Block Diagram  
Figure 3-1 illustrates a block diagram of the evaluation board. It includes four  
Bt8370 circuits, receive and transmit connected (T1 or E1) lines interface, a serial  
bus used to transfer data between these circuits, and the Bt8474 (MUSYCC). The  
data is transferred between the Bt8474 and the host through the Peripheral  
Component Interconnect (PCI) bus. The Bt8370 circuits are configured and  
controlled using the Expansion Bus (EBUS).  
Figure 3-1. Bt8474 Block Diagram  
BT8370  
Port 0  
BT8370  
Port 1  
BT8370  
Port 2  
BT8370  
Port 3  
Address Decode Logic  
Serial Ports  
(Data)  
EBUS  
(Control)  
PCI Bus  
8478_053  
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3.2 Expansion Bus  
The expansion bus, mastered by the Bt8474, controls and configures the four  
Bt8370 chips. It is configured as an Intel-style bus (refer to the Bt8474 datasheet for  
details), and uses only the sixteen lower address/data lines of the 32 bits available on  
the Bt8474. However, even though 16-bit data transfer can be achieved in this  
configuration, all EBUS data access will be 8 bits wide because the connected  
devices (the four Bt8370 chips and the latch register) support only this format.  
The address decoding logic is centered on U2 and U3, which generate all  
necessary chip select signals for the different devices connected to the bus.  
Figure 3-2 illustrates the resulting memory map of the E-bus.  
Figure 3-2. Expansion Bus Memory Map  
Offset(1)  
EAD [31:0]  
FFFF(2)  
D1FF  
D000  
BT8370  
PORT 3  
34000  
30000  
C1FF  
C000  
BT8370  
PORT 2  
B1FF  
BT8370  
PORT 1  
2C000  
28000  
B000  
AFFF  
LATCH(1)  
A000  
Write  
operation  
BT8370  
PORT 0  
81FF  
8000  
20000  
0000  
NOTE(S)  
(1)  
PCI physical address location BAR1 Offset  
Where BAR1 PCI Configuration Register 4 (addr 0x10)  
(2)  
3.  
All address values in hex.  
All values are phsical addresses as they appear on the bus.  
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3.3 PCI Bus  
The latch (U4) controls some hardware signals on the board. Although the  
latch address ranges from A000 to AFFF (hex), only one physical location can be  
accessed with any of these. This latch cannot be read, and only the following bits  
are used (numbering from 0–7):  
Bit 1—When reset, disables interrupt A on the Bt8474 (INTA# line  
disconnected from PCI bus).  
Bit 2—When reset, disables interrupt B on the Bt8474.  
Bit 4—When reset, activates the reset signal on all four Bt8370 devices.  
This allows the software driver to perform a hardware reset whenever  
necessary.  
Upon power–up, all these signals are reset (all active); therefore, all Bt8370  
circuits will remain in the reset state until the software sets Bit 4.  
3.3 PCI Bus  
The PCI interface on the Bt8474 is connected to a 5 V, 32-bit PCI bus. The two  
interrupt lines, INTA* and INTB*, can be disabled by software, if necessary, by  
setting to zero the appropriate bits in the previously described latch.  
The JTAG port is also wired to the connector for testing. The optional J2  
header allows connection to the GNT# signal if a PCI bus analyzer is used.  
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3.4 Serial Buses  
The Bt8474 transfers data to and from the four Bt8370 chips, using four  
independent serial buses. Figure 3-3 illustrates all signals used and their direction.  
Figure 3-3. Serial Bus Between MUSYCC and T1 Transceivers  
BCLK0 - BIT CLOCK  
TFSYNC0 - TX SYNC  
RFSYNC0 -RX SYNC  
TD0 - TX DATA  
8370  
PORT 0  
RD0 - RX DATA  
ROOF0 - OUT OF FRAME  
BCLK1 - BIT CLOCK  
TFSYNC1 -TX SYNC  
RFSYNC1 -RX SYNC  
TD1 - TX DATA  
8370  
PORT 1  
RD1 - RX DATA  
ROOF1 - OUT OF FRAME  
8474  
MUSYCC  
BCLK2 - BIT CLOCK  
TFSYNC2 -TX SYNC  
RFSYNC2 -RX SYNC  
TD2 - TX DATA  
8370  
PORT 2  
RD2 - RX DATA  
ROOF2 - OUT OF FRAME  
BCLK3 - BIT CLOCK  
TFSYNC3 -TX SYNC  
RFSYNC3 -RX SYNC  
TD3 - TX DATA  
8370  
PORT 3  
RD3 - RX DATA  
ROOF3 - OUT OF FRAME  
8478_055  
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3.5 T1 / E1 Line Interface  
3.5 T1 / E1 Line Interface  
The line interface connects the Bt8370 to the T1 or E1 line. The transformer has a  
3 kV insulation to allow the board to pass tests in European countries. The line  
filter reduces the electromagnetic interference. The Polyswitch and P1553AB  
components (FSx and Zx) protect the transformer from power surges. The  
optional E1 jumper allows the user to change the receive termination impedance  
to match the T1 or E1 requirements. By default, the board does not have this  
header and is configured for T1 line (100 ). If the jumper is set, the board is  
configured for E1 (75 ).  
3.6 Bt8370 Clocking Options  
The Bt8370 offers several synchronization options for its serial port, allowing a  
flexible clocking configuration. Figure 3-4 illustrates the clock inputs and outputs  
wiring. See the Bt8370 data sheet for a description of the different pins and how  
to use them.  
Figure 3-4. Bt8370 Serial Clock Generation  
(1)  
10 MHz  
OSC.  
REFCLK  
TCKO  
TSBCKI  
CLADO  
TO BT8474  
CLOCK INPUT  
BT8370  
(3-STATE)  
RCKO  
CLADI  
EXTERNAL  
TCKI  
SHARED  
CLOCK  
(1)  
CLOCK  
(1)  
OPTIONAL SHUNT  
NOTE(S)  
(1)  
Common to all 8370 devices.  
8478 056  
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4.0 Software Architecture  
4.1 Software Block Diagram  
Figure 4-1 illustrates the basic software blocks in the CN8478 EVM.  
Figure 4-1. Software Block Diagram  
EVMToolbox  
Application Level  
Logical Level  
Physical Level  
Device IO Control  
User Mode  
Kernel Mode  
NT NDIS—Interface  
DriverEntry - QueryInformationHdlr  
DevSpecific  
OID_RSS_DEV_SPECIFIC  
APIs  
The BACKDOOR mechanism  
Bt8474 Driver  
Bt8370 Driver  
8478_057  
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Communication between the user and kernel modes uses the DeviceIOControl  
function that passes the defined I/O control code to the NDIS driver, requesting  
the Device Specific driver.  
4.1.1 NT NDIS Interface  
The NT NDIS interface implements the functions required to comply with the  
NDIS 4.0 specification. These functions respond to query and set operations from  
the NDIS wrapper, and maintain proper state information for the WAN links.  
In the NT kernel mode driver, the starting point is the DriverEntry function,  
which initializes driver data structures and prepares the environment for all other  
components.  
The Query InformationHdlr function returns information about the  
capabilities and status of the driver, in this case, for a specific NIC driver handled  
by the CN8478 EVM Toolbox. This function calls the DevSpecific function,  
which is the envelope for all APIs used to configure and perform the application  
requests.  
4.1.2 CN8478 Driver  
The CN8478 driver is the set of functions used to reset, configure, and maintain  
the device. The CN8478 driver supports a dynamically grouped configuration:  
Channel assignments  
Protocols (Transparent, SS7-HDLC-FCS16, HDLC-FCS16,  
HDLC-FCS32)  
Receive and transmit message loopbacks  
Time slot assignments  
Communication between the CN8478 and the host is done through the service  
request mechanism. The following service requests are supported by the CN8478  
driver:  
Soft Chip Reset  
Global Configuration  
Channel Group Configuration  
Read Channel Configuration  
Channel Activation and Deactivation  
The device must acknowledge each request to a specific group before any  
other service request may be issued. All buffer descriptors and packet blocks are  
statically allocated; however, a large amount of RAM is required. The transmit  
and receive mechanism is implemented by a linked circular list. The host creates a  
circular list of buffers for each channel, and the last buffer in the list points to the  
first one. All buffers in the list are initially host-owned. The host-fill process  
merely checks the OWNER status of the next buffer before filling. If the next  
buffer is host-owned, the host fills it and flips the OWNER bit to grant ownership  
to MUSYCC. If the next buffer is MUSYCC-owned, the host waits for MUSYCC  
to empty the buffer and become host-owned. At this point, the buffer can be  
filled.  
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4.2 Development Tools  
4.1.3 Bt8370 Driver  
The Bt8370 driver is the set of functions used to reset, configure, and maintain  
the device. Background threads monitor the current state of the device to correct  
any deviation from the expected performance level.  
4.2 Development Tools  
The development tools are Microsoft Visual C++, Professional Edition; Microsoft  
Visual Basic, Professional Edition; and Microsoft Development Network–DDK.  
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4.3 APIs—Backdoor Mechanism  
You can interface with the software driver by using the Backdoor structure,  
submitting requests and receiving responses. This interface is called  
APIs—Backdoor mechanism. Figure 4-2 illustrates the Backdoor mechanism.  
Figure 4-2. Backdoor Mechanism  
VParam1Size  
VParam1Offset  
VParam2Size  
VParam2Offset  
Data 1  
Data 2  
8478_058  
Tables 4-1 through 4-21 list the Backdoor parameters, instances, and hex values.  
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4.3.1 Backdoor Read  
Table 4-1. Read Shared Memory Map  
Backdoor Parameters  
Instances  
KeyCode  
ROK  
ReqCode  
BACKDOOR_READ  
ReqSubCode  
Param1  
BACKDOOR_READ_SHARED_MEM  
Group number  
VParam1Size  
VParam1Offset  
Shared Memory Map Size  
Size of (BACKDOOR structure)  
NOTE(S): All CN8478 shared memory map values are returned in the Data 1 area.  
Table 4-2. Read Shared Memory Map  
Backdoor Parameters  
KeyCode  
Instances  
ROK  
ReqCode  
ReqSubCode  
Param1  
BACKDOOR_READ  
BACKDOOR_READ_SHARED_MEM_LOCATION  
Group number  
Param2  
RegOffset + Current Channel Number (if required)  
NOTE(S): The output of the register content in shared memory is returned in Param 3.  
Table 4-3. Read Shared Memory Map  
Backdoor Parameters  
KeyCode  
Instances  
ROK  
ReqCode  
BACKDOOR_READ  
ReqSubCode  
Param1  
BACKDOOR_READ_BT847x_REGISTER_MAP  
Group number  
VParam1Size  
VParam1Offset  
Shared Memory Map Size  
Sizeof(BACKDOOR structure)  
NOTE(S): All register map values are returned in the Data1 area.  
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Table 4-4. Read Bt847x Register  
Backdoor  
Parameters  
Hex Value  
Instances  
KeyCode  
ReqCode  
ReqSubCode  
Param1  
ROK  
524F4B00  
0
BACKDOOR_READ  
BACKDOOR_READ_BT847x_REGISTER  
Group number  
3
0...3  
0...800  
Param2  
RegOffset + CurrentChannelNumber (if required)  
NOTE(S): The WAN Miniport driver returns register value in Param3.  
Table 4-5. Read Bt847x Register  
Backdoor  
Instances  
Hex Value  
Parameters  
KeyCode  
ReqCode  
ReqSubCode  
Param1  
ROK  
524F4B00  
0
BACKDOOR_READ  
BACKDOOR_READ_BT847x_REGISTER  
Group number  
3
0...3  
Param2  
RegOffset + CurrentChannelNumber (if required)  
ROK  
0...800  
524F4B00  
KeyCode  
NOTE(S): All Bt8370 Registers values are returned in the Data 1 area.  
.
Table 4-6. Read Bt8370 Register  
Backdoor  
Parameters  
Instances  
Hex Value  
KeyCode  
ReqCode  
ReqSubCode  
Param1  
ROK  
524F4B00  
BACKDOOR_READ  
0
BACKDOOR_READ_BT8370_REGISTER  
Group number  
7
0...3  
0...1FF  
Param2  
RegOffset + CurrentChannelNumber (if required)  
NOTE(S): The WAN Miniport driver returns register value in Param3.  
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.
Table 4-7. Read Bt8370 Register  
Backdoor  
Parameters  
Instances  
Hex Value  
KeyCode  
ReqCode  
ReqSubCode  
Param1  
ROK  
524F4B00  
BACKDOOR_READ  
0
BACKDOOR_READ_BT8370_REGISTER  
Group number  
7
0...3  
Param2  
RegOffset + CurrentChannelNumber (if required)  
ROK  
0...1FF  
KeyCode  
524F4B00  
NOTE(S): The Wan Miniport driver returns register value in Param3.  
Table 4-8. Read Message Maps  
Backdoor  
Instances  
Hex Value  
Parameters  
KeyCode  
ROK  
524F4B00  
ReqCode  
BACKDOOR_READ  
BACKDOOR_READ_MESSAGE_MAPS  
Group number  
0
ReqSubCode  
Param1  
9
0...3  
VParam1Size  
3 ×  
2 ×  
MSG_DESC × TX_MESSAGES_PER_CH ×  
NUM_CHANNELS_PER_GROUP  
20 = C0 (192  
dec)  
VParam1Offset  
VParam2Size  
Size of (BACKDOOR structure)  
54  
MSG_DESC ×  
3 ×  
8 ×  
20 = 300h  
(768 dec)  
RX_MESSAGES_PER_CH ×  
NUM_CHANNELS_PER_GROUP  
VParam2Offset  
Size of (BACKDOOR structure) + Vparam1Size  
NOTE(S):  
1. TX_MESSAGES_PER_CH is returned in Param2.  
2. TX_MESSAGE_LENGTH is returned in Param3.  
3. RX_MESSAGES_PER_CH is returned in Param4.  
4. RX_MESSAGE_LENGTH is returned in Param5.  
5. All message descriptors (buffer descriptor, data pointer, and pointer to next message  
descriptor) for each channel for transmitted messages are returned in the Data1 area.  
6. All message descriptors (buffer descriptor, data pointer, and pointer to next message  
descriptor) for each channel for received messages are returned in the Data2 area.  
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Figure 4-3 illustrates the structure of data in shared memory. There are two  
transmit messages per channel, and the transmit message length is equal to 2 kB.  
Figure 4-3. Structure of Data in Shared Memory  
Description  
Data Ptr  
2 kB Data  
Next Ptr  
Description  
Data Ptr  
2 kB Data  
Next Ptr  
8478_067  
Table 4-9. Read Message Data  
Backdoor  
Parameters  
Instances  
Hex Value  
KeyCode  
ROK  
524F4B00  
0
ReqCode  
ReqSubCode  
Param1  
BACKDOOR_READ  
BACKDOOR_READ_MESSAGE_DATA  
Group number  
10  
0...3  
0...1F  
0 or 1  
0..7  
Param2  
Channel Number  
Param3  
Transmit message number  
Receive message number  
TX_MESSAGES_LENGTH  
Param4  
Vparam1Size  
800  
(2048 dec)  
Vparam1Offset  
Vparam2Size  
Size of (BACKDOOR structure)  
RX_MESSAGES_LENGTH  
54  
800  
(2048 dec)  
Vparam2Offset  
Size of (BACKDOOR structure) + Vparam1Size  
854  
NOTE(S):  
1. Tx message data is returned in the Data1 area.  
2. Rx message data is returned in the Data2 area.  
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Table 4-10. Read PCI Configuration  
Backdoor  
Parameters  
Instances  
Hex Value  
KeyCode  
ROK  
524F4B00  
ReqCode  
BACKDOOR_READ  
0
ReqSubCode  
VParam1Size  
VParam1Offset  
VParam2Size  
VParam2Offset  
BACKDOOR_READ_PCI_CONFIG  
11  
0C  
54  
0C  
Size of (BACKDOOR structure)  
Size of (BACKDOOR structure) + Vparam1Size  
60  
NOTE(S): Function 0 PCI Configuration is returned in the Data1 area.  
Table 0-1. Read Registry Configuration  
Backdoor  
Instances  
Hex Value  
Parameters  
KeyCode  
ROK  
524F4B00  
ReqCode  
BACKDOOR_READ  
0
ReqSubCode  
VParam1Size  
BACKDOOR_READ_REGISTERY_CONFIG  
12  
COMMON_PARAMETERS + (GROUP_PARAMETERS  
8 + (10 ×  
4) = 40h  
(64 dec)  
×
NUM_OF_GROUP)  
VParam1Offset  
VParam2Size  
Size of (BACKDOOR structure)  
54h  
MAX_GROUPS ×  
4 ×  
20 ×  
28 = 1400h  
(5120 dec)  
NUM_CHANNELS_PER_GROUP×  
MAX_CALLED_NUMBER_LENGTH  
VParam2Offset  
Size of (BACKDOOR structure) + Vparam1Size  
94h  
NOTE(S): The registry configuration parameters are returned in the Data1 area.  
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4.3.2 Backdoor Write  
Table 4-11. Write Bt8370 Register  
Backdoor  
Parameters  
Instances  
Hex Value  
KeyCode  
ReqCode  
ReqSubCode  
Param1  
ROK  
524F4B00  
5
BACKDOOR_WRITE  
BACKDOOR_WRITE_BT8370_REGISTER  
Group number  
0
0...3  
0...1FF  
Param2  
RegOffset + Current Channel Number (if required)  
Table 4-12. Write Bt847x Register  
Backdoor  
Parameters  
Instances  
Hex Value  
KeyCode  
ReqCode  
ReqSubCode  
Param1  
ROK  
524F4B00  
BACKDOOR_WRITE  
5
BACKDOOR_WRITE_BT847x_REGISTER  
Group number  
1
0...3  
0...800  
Param2  
RegOffset + Current Channel Number (if required)  
Table 4-13. Write Bt847x Register Map  
Backdoor  
Parameters  
Instances  
Hex Value  
KeyCode  
ReqCode  
ReqSubCode  
Param1  
ROK  
524F4B00  
BACKDOOR_WRITE  
5
BACKDOOR_WRITE_SHARED_MEM_LOCATION  
Group number  
2
0...3  
0...800  
Param2  
RegOffset + Current Channel Number (if required)  
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4.3.3 Backdoor Initialization  
Table 4-14. Card Initialization  
Backdoor  
Parameters  
Instances  
Hex Value  
KeyCode  
ROK  
524F4B00  
ReqCode  
BACKDOOR_INIT  
1
0
ReqSubCode  
BACKDOOR_INIT_ADAPTER  
Table 4-15. Bt847x Initialization  
Backdoor  
Parameters  
Instances  
Hex Value  
KeyCode  
ROK  
524F4B00  
ReqCode  
BACKDOOR_INIT  
1
1
ReqSubCode  
BACKDOOR_INIT_BT847x  
4.3.4 Backdoor Action Start  
Table 4-16. Bt847x Loopback Without Self Test  
Backdoor  
Parameters  
Instances  
Hex Value  
KeyCode  
ROK  
524F4B00  
2
ReqCode  
ReqSubCode  
Param1  
BACKDOOR_ACTION_START  
BACKDOOR_ACTION_START_BT847X_ LOOPBACK  
Group number  
0
0...3  
0...1F  
Param2  
Channel number  
Table 0-2. Bt847x Loopback With Self Test  
Backdoor  
Instances  
Hex Value  
Parameters  
KeyCode  
ROK  
524F4B00  
ReqCode  
BACKDOOR_ACTION_START  
2
1
ReqSubCode  
BACKDOOR_ACTION_START_BT847X_  
LOOPBACKTEST  
Param1  
Param2  
Group number  
0...3  
Channel number  
0...1F  
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4.3.5 Backdoor Action Stop  
Table 4-17. Stop Bt847x Loopback Test  
Backdoor  
Parameters  
Instances  
Hex Value  
KeyCode  
ROK  
BACKDOOR_ACTION_STOP  
524F4B00  
3
ReqCode  
ReqSubCode  
Param1  
BACKDOOR_ACTION_STOP_BT847X_ LOOPBACK  
Group number  
0
0...3  
0...1F  
Param2  
Channel number or FFFFFFFFh (for all channels)  
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4.3.6 Backdoor Action Configuration  
Table 4-18. Configuration of Bt847x Time Slot Assignments and Channel Protocols  
Backdoor  
Parameters  
Instances  
Hex Value  
KeyCode  
ROK  
524F4B00  
ReqCode  
BACKDOOR_ACTION_CONFIGURE  
BACKDOOR_ACTION_CONFIGURE_BT847x  
Group number  
4
ReqSubCode  
Param1  
4
0...3  
VParam1Size  
Max number of time slots ×  
Number of groups  
80h ×  
4 = 200h  
(512)  
VParam1Offset  
VParam2Size  
Size of (BACKDOOR structure)  
(Not used)  
54h  
100h ×  
4 = 400h  
(1024)  
VParam2Offset  
VParam3Size  
Size of (BACKDOOR structure) + vParam1Size  
54h +200h =  
254h  
Number of channels per group ×  
Number of groups  
20h ×  
4 = 80h (128)  
VParam3Offset  
Data 1  
Size of (BACKDOOR structure) + vParam1Size +  
vParam2Size  
54h +200h +  
400h = 654h  
Data1[0] = Channel assigned to time slot 0  
Data1[1] =  
Channel  
assigned to  
time slot 1  
Data1[127] = Channel assigned to time slot 127  
0...1F  
0...1F  
0..1F  
Data2  
Data3  
...  
(not used)  
Data3[0] = Protocol assigned to Channel 0  
Data3[1] =  
Protocol  
assigned to  
Channel 1  
Data3[31] = Protocol assigned to Channel 31  
..  
0...3  
0...3  
0...3  
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Table 4-19. Configure Loopback Message  
Backdoor  
Parameters  
Instances  
Hex Value  
KeyCode  
ReqCode  
ReqSubCode  
Param1  
ROK  
BACKDOOR_ACTION_CONFIGURE  
524F4B00  
4
BACKDOOR_ACTION_CONFIGURE_LOOPBACKMESSAGE  
Loopback message  
9
0…Quick  
brown fox  
1…0x00 pattern  
2…0x55 pattern  
3…0xAA  
pattern  
4…0xFF pattern  
5…User define pattern  
User define pattern value  
0...5  
Param2 (optional)  
0...FF  
4.3.7 Backdoor Loop  
Table 4-20. Run Bt8370 Loopback  
Backdoor  
Parameters  
Instances  
Hex Value  
KeyCode  
ReqCode  
ReqSubCode  
Param1  
ROK  
524F4B00  
BACKDOOR_LOOP  
6
BACKDOOR_LOOP_RUN  
2
Group number  
0...3  
Param2  
0 or channel number for local or remote loop per channel  
0 or 0...1F  
2...4  
Param3  
Loopback type:  
2…FRAMER_LOOPBACK  
3…PERCHANNEL_LOCAL_LOOPBACK  
4…PERCHANNEL_REMOTE_LOOPBACK  
Table 4-21. Stop Bt8370 Loopback  
Backdoor  
Parameters  
Instances  
Hex Value  
KeyCode  
ReqCode  
ReqSubCode  
Param1  
ROK  
524F4B00  
BACKDOOR_LOOP  
6
BACKDOOR_LOOP_STOP  
2
Group number  
0...3  
Param2  
0 or channel number for local or remote loop per channel  
0 or 0...1F  
2...4  
Param3  
Loopback type:  
2…FRAMER_LOOPBACK  
3…PERCHANNEL_LOCAL_LOOPBACK  
4…PERCHANNEL_REMOTE_LOOPBACK  
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5
5.0 Using the CN8478 EVM Toolbox  
This chapter describes how to use the CN8478 EVM Toolbox for Windows NT.  
5.1 Starting the CN8478 EVM Toolbox  
The software installation process adds the CN8478 EVM Toolbox to the  
Programs menu.  
To start the CN8478 EVM Toolbox, perform these steps:  
1. From the Start menu, choose Programs.  
2. From the Program menu, click on CN8478 EVM Toolbox.  
The main menu appears, as illustrated in Figure 5-1. The main menu is always  
displayed so you can move from one level to another. All windows can be open at  
the same time.  
Figure 5-1. Main Menu of the CN8478 EVM Toolbox  
5.2 Main Menu  
The CN8478 EVM can be configured at three levels:  
1. Application level—performs testing and maintenance.  
2. Logical level—allows channel assignments and time slot monitoring.  
3. Physical level—is a component register editor.  
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5.3 Application Level  
Use the application level to perform tests and maintenance. The application level  
window illustrated in Figure 5-2 is used to run loopback tests, analyze statistics,  
view received and transmitted messages, examine the PCI bus configuration, and  
update registers.  
The CN8478 is initialized each time the application level is opened.  
Therefore, open it first and leave it open while working in other levels.  
Figure 5-2. Application Level Window  
5.3.1 Application Level Menus  
The enabled menus are File, Options, and Help. Edit is not enabled.  
5.3.1.1 File Menu  
You can dump either CN8478 registers or Bt8370 registers by saving to a file and  
folder you select. The address and contents of the devices registers are saved in  
the file. The file can be retrieved through Notepad, Word, or another Windows NT  
program.  
5-2  
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5.3 Application Level  
5.3.1.2 Options Menu  
Use the Options menu (illustrated in Figure 5-3) to initialize the card and the  
CN8478, select loopback message patterns, explore messages, view Card  
configuration, and view the PCI configuration.  
Figure 5-3. Options Menu  
Initialize Card and Initialize  
Initialize Card and Initialize CN8478 are like reset buttons. Initialize Card  
performs a full reset (CN8478 and Bt8370). Initialize CN8478 resets only the  
CN8478.  
CN8478  
Loopback Messages Type  
Explore Messages  
The Loopback Message Type option allows you to select the pattern of the  
message type. Six patterns are available (Quick Brown Fox, 0x00 pattern, 0x55  
pattern, 0xAA pattern, 0xFF pattern, and User Defined).  
If you select the Explore Messages option during a loopback test, the message  
descriptor and message data are displayed for the active channel, as illustrated in  
Figure 5-4.  
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Figure 5-4. Explore Messages Window  
NOTE(S): Message data can be displayed in either hexadecimal or ASCII format, as illustrated above. Double-click the message  
data to switch between formats.  
5-4  
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Evaluation Module Users Guide  
5.3 Application Level  
View PCI Configuration  
The PCI Configuration window displays the PCI configuration parameters, as  
illustrated in Figure 5-5.  
Figure 5-5. PCI Configuration Window  
5.3.1.3 Help Menu  
Online help is accessible from the Help button in the Application Level window.  
Help includes information about the CN8478 EVM Toolbox and the CN8478 and  
Bt8370 chips.  
Choices include:  
A brief version of this chapter  
CN8478/CN8474A/CN8472A/CN8471A data sheet  
Access to Conexants Home Page  
5.3.2 Loopback Tests  
The Application Level window provides a framer loopback test for diagnostics,  
maintenance, and troubleshooting. There are two loopback interfaces, one for  
each device—the Bt8370 and the CN8478.  
5.3.2.1 Bt8370  
Loopback  
Select the applicable Bt8370 device and port by selecting the group from the  
Group drop-down list box.  
The default configuration for Bt8370 loopback is run (the arrow is green).  
Clicking the Stop button stops the loopback (the arrow turns red). The stop  
condition takes the Bt8370 out of loopback mode but does not stop the transmit  
message if a CN8478 loopback test is still running. The Bt8370 loopback  
interface is illustrated in Figure 5-6.  
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Figure 5-6. Bt8370 Loopback Test Area  
5.3.2.2 CN8478  
Loopback  
While the Bt8370 is running, you can run a CN8478 loopback test. The CN8478  
default configuration is one time slot per channel, protocol HDLC-FCS16. (Use  
the logical level to change the configurations.)  
To run a loopback test, follow these steps:  
1. Select the group (port) number from the Group drop-down list box in the  
Loopback Tests area, illustrated in Figure 5-7.  
Figure 5-7. CN8478 Loopback Tests Area  
2. If you want to disable Self Test for a particular channel, it must be done  
before you begin the test. Select the channel from the Channel drop-down  
list box, and click With Self Test to remove the check. When Self Test is  
disabled, matching between transmit and receive is not performed for that  
channel during the loopback test.  
3. In the grid at the bottom of the application level window, select the  
channels you want to test by clicking at the junction of the channel to test  
and the Run Bt847x Test row. This begins the test. An example of the Run  
CN8478 Test running 10 of the 23 channels is illustrated in Figure 5-8.  
4. With Self Test enabled, the Verify Success box indicates whether or not the  
contents of the transmitted frame are identical with the contents of the  
received frame; the matching is done byte by byte. In Figure 5-8, all  
channels have Self Test enabled except channel 6.  
5. To stop the loopback test in one channel, click the X under the channel  
number.  
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Evaluation Module Users Guide  
5.3 Application Level  
Figure 5-8. Example of Test  
NOTE(S): A gray column means that the corresponding channel is disabled. In T1 interface mode, the channels 24 through 31  
are disabled.  
During the loopback test you have four options (in addition to those on the  
Options menu):  
Stop tests for all channels  
Show statistics  
Monitor errors  
View transmit and receive information rate  
Stop Test  
When you click Stop Test for All Channels, all loopback tests stop. Click again in  
the grid to restart the tests individually.  
Show Statistics  
When you click Show Statistics, the Channel Statistics window appears, which  
displays statistics of transmit and receive messages, as well as important events  
and errors for the selected channel. You can also double-click anywhere in the  
grid during the loopback test to show statistics. Figure 5-9 illustrates the statistics  
for Channel 4.  
Figure 5-9. Channel Statistics Window  
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5.3 Application Level  
Evaluation Module Users Guide  
Monitor Errors  
When you click Monitor Errors, the Toolbox retrieves real-time information from  
the driver related to receive and transmit errors in all running channels. The  
display is updated every five seconds. Receive errors are checksum, buffers,  
abort, short, and out-of-frame. Transmit errors are abort and short. Another error  
is Verify Failed. When you click Stop Monitoring, the grid returns to the  
loopback, which has continued running in the background.  
Figure 5-10 illustrates the monitor errors display.  
Figure 5-10. Monitor Errors Display  
Transmit and Receive  
Information  
The Transmit and Receive Information area, illustrated in Figure 5-11, gives  
information about the number of bytes received and transmitted and the data rate  
in bits-per-second for the active channels. When a test is running, transmit and  
receive information is updated each second.  
Figure 5-11. Transmit and Receive Information Area  
5-8  
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Evaluation Module Users Guide  
5.3 Application Level  
5.3.3 Summary of Application Level  
User interactions in the Application window are listed in Table 5-1.  
Table 5-1. Summary of Application Level Window  
Name  
Description  
File  
Dumps Bt8487 registers or Bt8370 registers into a file.  
Options  
Initialize Card—Initialize the Adapter.  
Initialize CN8478—Initialize the CN8478.  
Loopback Message Type—Loopback messages type for testing CN8478.  
Explore Messages—Zoom the messages (ASCII and hex) of the specific channel.  
View Configuration Parameters—View the registry configuration parameters.  
View PCI Configuration—View PCI configuration.  
Help  
Help file online.  
Group  
Specifies the number of the Bt8370 devices used in the CN8478 EVM board.  
Stops or runs the Bt8370 loopback.  
Bt8370 Loopback  
Self Test  
Compares the content of the Tx and Rx messages during loopback tests.  
Starts the CN8478 loopback test for each channel selected.  
Stops the CN8478 loopback test for all the channels.  
Shows statistics for the group and channel selected.  
Displays minimum and maximum number of channels that can be tested.  
Displays Tx and Rx information about transmission speed.  
Checks for Rx and Tx errors.  
Run CN8478 Test  
Stop test for all ch  
Show statistics  
Min and Max  
Tx Bytes Out/Rx Bytes In  
Monitor Errors  
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5.4 Logical Level  
Evaluation Module Users Guide  
5.4 Logical Level  
In Logical level, you can configure the protocol and time slots’ assignment for  
each logical channel.  
NOTE: The configuration should not be changed while the channels are active.  
This means that a “Stop test for all ch” is recommended before changing  
channel configurations.  
The CN8478 is initialized when the Application level is opened. Therefore,  
open it and leave it open while working in the Logical level.  
There are two modes in logical level: CN8478 and Bt8370.  
5.4.1 CN8478 Logical Level  
The Timeslot Map Configuration area allows hyperchannel capability tests. You can  
map several time slots on one logical channel and then run a loopback test in the  
application level window. Figure 5-12 illustrates the Logical level window. The  
speed of appropriate channels is shown in the Transmit and Receive information  
area.  
Figure 5-12. Bt847x Logical Level Window  
Follow these steps to assign a new time slot to a channel:  
1. Select the group in the Options menu.  
2. In the Bt847x Logical level window, click the specific channel, then click  
the time slot. The color of the time slot cell changes to match the channel  
cell color.  
3. When you finish selecting time slots for the channel, click the Write button  
to save the configuration. (Clicking Default causes the configuration to  
return to one time slot per channel.)  
Follow these steps to assign protocols to a channel:  
1. Click one of the four protocols in the Protocol area, and then click the  
channel.  
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5.4 Logical Level  
2. Click the Write button to save the desired configuration in the 8474  
register map.  
5.4.2 Bt8370 Logical Level  
The Bt8370 Logical level window, illustrated in Figure 5-13, displays information  
about all Bt8370 registers on each channel. In this window, the Refresh button  
updates the register value.  
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5.4 Logical Level  
Evaluation Module Users Guide  
Figure 5-13. Bt8370 Logical Level Window  
5.4.3 Summaries of Logical Level Windows  
Table 5-2 and Table 5-3 lists user interactions in the CN8478 and Bt8370 Logical  
level window respectively.  
Table 5-2. Summary of CN8478 Logical Level Window  
Name  
Description  
File  
Exit  
Devices  
Options  
Bt8370 and CN8478  
Refresh—refreshes the screen.  
Group—specifies the 8370 device to be used  
Loopback Message Type—displays types of loopback messages  
View Configuration Parameter—displays the registry configuration parameters  
View PCI Configuration—displays the PCI configuration  
Help  
Online help  
Time Map Configuration  
Protocol Configuration  
Default  
Time slots assignments for each logical channel  
Protocol configuration per channel  
Returns to default configuration—one time slot per channel, protocol HDLC-FCS16  
Write user’s configuration  
Write  
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Evaluation Module Users Guide  
5.4 Logical Level  
Table 5-3. Summary of Bt8370 Logical Level Window  
Name  
Description  
File  
Exit  
Devices  
Help  
Bt8370 / CN8478  
Online help  
Group  
Register  
Refresh  
Specifies the number of the Bt8370 devices used in the CN8478 EVM board  
Drop-down menu of registers  
Provides latest register value  
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5.5 Physical Level  
Evaluation Module Users Guide  
5.5 Physical Level  
The Physical level is a component register editor where you configure your  
settings. The default is the CN8478 Registers window, where you can edit the  
CN8478 and Bt8472 devices. You can select the Bt8370 Registers window from  
the Devices menu.  
The CN8478 is initialized when the Application level is opened. Therefore,  
open it and leave it open while working in the Physical level.  
5.5.1 Register Area  
Each register consists of an address, a name, and list of fields. Each field consists  
of a name, an option list or a range of values, and description. Select the group  
and channel before selecting the register. Figure 5-14 illustrates the CN8478  
registers window.  
Figure 5-14. CN8478 Registers Window  
5.5.2 Source, Values, and Destination Area  
Select where the value is to be read or written in the Source and Destination areas.  
On the CN8478, some registers are present both in shared memory and in the  
register map.  
5.5.2.1 Read  
5.5.2.2 Write  
All registers are read at the opening of the window or during a device selection.  
To update the register value, click the Read button.  
When you configure something differently from the default configuration, you  
must click the Write button. The data can be written into either shared memory or  
the register map.  
5-14  
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Evaluation Module Users Guide  
5.5 Physical Level  
5.5.2.3 Values  
In the Values area, the contents of a specific register are displayed in three  
different formats: current, shared memory, and register map.  
Current  
In the Current box, you can enter a specific value for a specific register that can  
be written in either shared memory or the register map. An automatic check is  
done that allows you to write to specific registers in the register map area.  
Shared Memory  
Register Map  
This field displays the variables content from the shared memory.  
This field displays the variables content from the register map.  
5.5.2.4 Description Bar  
The description bar at the bottom of the screen describes the selected bit field.  
5.5.3 Summary of Physical Level  
Table 5-4 lists the user interactions with the Registers windows.  
Table 5-4. Summary of Registers Window Interactions  
Name  
Description  
Dump—Dumps the registers into a file  
File  
Exit  
Edit  
Cut, copy, paste, delete  
CN8478 or Bt8370  
Refresh  
Devices  
Options  
Help  
Online Help  
Grp (Group)  
Specifies the group (port) from 03  
Ch (Channel)  
Specifies the channel from 031  
Register  
Specifies registers mapped in either shared memory or register map  
Specifies the bit field map related to the register map  
Specifies values and ranges for the register map  
Read or write to shared memory or register map in these fields  
Displays a register’s contents  
Field  
Options/Value(Hex)/Ranges  
Source and Destination  
Values  
Current/Shared Memory/Register Map  
Displays component contents of register of the selected bit field mask in shared  
memory or register map  
Description bar  
Displays the description of the current bit field  
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5.5 Physical Level  
Evaluation Module Users Guide  
5-16  
Conexant  
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6
6.0 List of Acronyms and  
Abbreviations  
API  
Application Program Interface  
Expansion Bus  
EBUS  
HDLC  
INTA  
JTAG  
NDIS  
NIC  
High-level Data Link Control  
Integer Array  
Test access port and boundary scan architecture  
Network Driver Interface Specification  
Network Interface Controller  
Peripheral Component Interconnect  
Portable Document Format  
PCI  
PDF  
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Preliminary Information/Conexant Proprietary and Confidential  
6.0 List of Acronyms and Abbreviations  
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6-2  
Conexant  
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A
Appendix A: Sample Connection  
The typical development environment illustrated in Figure A-1 consists of a host  
computer, a PCI bus, version 2.0 or higher, and CN8478 EVM Software. The  
evaluation environment consists of three types of system components:  
performance test (which contains the network simulator), target test, and protocol  
analyzer.  
Figure A-1. Typical Development Environment  
Evaluation  
Typical Environment  
Performance Test  
Network Simulator  
8474EVM Card  
TARGET  
- Diagnostics  
- Integration  
Host Computer –  
IBM PC or Compatible  
8474EVM Software  
Protocol Analyzer  
T1/E1 Analyzer  
8478_059  
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A-1  
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Appendix A : Sample Connection  
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Evaluation Module Users Guide  
A-2  
Conexant  
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B
Appendix B: Bill of Materials  
Table B-1 displays the bill of materials.  
Figure B-1. Bill of Materials (1 of 3)  
Ite  
m
Qty  
Reference  
Value  
Type  
Manufacturer Body  
0805  
RSS Part #  
1
51  
C1, C2, C3, C4, C6, C7, C8, C9,  
C10, C11, C12, C13, C14, C15,  
C16, C17, C18, C19, C20, C22,  
C23, C24, C25, C26, C27, C28,  
C32, C33, C34, C35, C36, C37,  
C38, C42, C43, C44, C45, C46,  
C47, C48, C52, C53, C54, C55,  
C56, C57, C58, C62, C63, C64, C65  
0.1  
20% 50 V  
5404R20-031  
2
3
4
5
6
5
4
C5, C21, C31, C41, C51  
C29, C39, C49, C59  
C30, C40, C50, C60  
C61 (no load)  
10  
100 p  
15 p  
0.1  
20%  
6 V  
AVX SMT 12.6x6.3  
5402R02-032  
5404R19-025  
5404R19-015  
5404R20-031:  
5%  
0805  
0805  
0805  
50 V  
4
5%  
100 V  
1
20%  
50 V  
16  
D1, D2, D3, D4, D5, D6, D7, D8,  
D9, D10, D11, D12, D13, D14,  
D15, D16  
6.2 V  
MOTOROLA  
MMSZ5234BT1  
7
8
4
E1, E2, E3, E4  
JUMPER-2  
CA-S36-25B-45  
16  
FS1, FS2, FS3, FS4, FS5, FS6, FS7,  
FS8, FS9, FS10, FS11, FS12, FS13,  
FS14, FS15, FS16  
POLYSWITCH  
RAYCHEM TR600-160  
9
1
1
JP1  
J1  
PCI EDGE CONNECTOR  
10  
CON2  
CA-S36-25B-45  
11  
12  
1
4
J2  
CON1  
CA-S36-25B-45  
J3, J4, J5, J6  
RJ48C 613R51-003  
613R51-003  
N8478UG1A  
Conexant  
B-1  
Preliminary Information/Conexant Proprietary and Confidential  
Appendix B : Bill of Materials  
N8478UG1A  
Document Title  
Figure B-1. Bill of Materials (2 of 3) (Continued)  
Ite  
m
Qty  
Reference  
L1, L2, L3, L4  
Value  
Type  
Manufacturer Body  
FILTER  
RSS Part #  
13  
4
PULSE_ENGINEERING  
PE65854  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
3
7
2
1
8
2
4
4
4
4
8
R1, R5, R8  
0
5%  
0805  
0805  
0805  
0805  
0805  
0805  
1206  
0805  
1206  
1206  
1206  
5424R08-146  
5424R08-097  
5424R08-073  
5424R08-025  
5424R08-089  
5424R08-073  
5424R01-069  
5424R07-297  
5424R01-193  
5424R01-134  
5424R01-097  
0.1W  
R2, R6, R7, R18, R19, R20, R21  
100k  
10k  
100  
47k  
10k  
51.1  
12.4k  
1k  
5%  
0.1W  
R3, R9  
R4  
5%  
0.1W  
5%  
0.1 W  
R10, R11, R12, R13, R14, R15,  
R16, R17  
5%  
0.1W  
R22, R23  
5%  
0.1W  
R24, R30, R36, R42  
R25, R31, R37, R43  
R26, R32, R38, R44  
R27, R33, R39, R45  
1%  
0.25W  
1%  
0.1W  
1%  
0.25W  
240  
100  
1%  
0.25W  
R46, R47, R48, R49, R50, R51,  
R52, R53  
1%  
0.25W  
25  
26  
27  
4
1
1
TR1, TR2, TR3, TR4  
T1044 PULSE_ENG  
T1044  
U1  
BT8474 BROOKTREE  
PQFP-160PIN BT8474  
U2  
74F373  
TI  
SOIC-20PIN-DW  
74F373-DW  
28  
1
U3  
74F138  
TI  
SOIC-16PIN-D  
74F138-D  
B-2  
Conexant  
N8478UG1A  
Preliminary Information/Conexant Proprietary and Confidential  
N8478UG1A  
Appendix B : Bill of Materials  
Document Title  
Figure B-1. Bill of Materials (3 of 3) (Continued)  
Ite  
m
Qty  
Reference  
Value  
Type  
Manufacturer Body  
RSS Part #  
29  
1
U4  
74HCT174  
SOIC-16PIN-D  
74HCT174-D  
30  
31  
1
1
U5  
U6  
74F00  
SOIC-14PIN-D 74F00-D  
74HCT03  
SOIC-14PIN-D  
74HCT03-D  
32  
33  
4
1
U7, U8, U9, U10  
Y1  
BT8370 REV D -  
80MQFP  
10  
FOX  
MHz  
OSC.  
F3356-10.000 MHZ  
34  
35  
1
1
ZU1  
ZU2  
PCI_BRACKET GOMPF  
9334-0006  
PCI_RETAINER GOMPF  
9100-0000B  
36  
37  
2
2
ZU3, ZU4  
ZU5, ZU6  
SCREW_BRACKET  
SCREW_RETAINER  
Z1, Z2, Z3, Z4, Z5, Z6, Z7, Z8  
P1553AB  
TECCOR  
MOD-TO220 P1553AB  
N8478UG1A  
Conexant  
B-3  
Preliminary Information/Conexant Proprietary and Confidential  
Appendix B : Bill of Materials  
N8478UG1A  
Document Title  
B-4  
Conexant  
N8478UG1A  
Preliminary Information/Conexant Proprietary and Confidential  
C
Appendix C: Mechanical Specifications  
Figure C-1. 160-pin PQFP Package Mechanical Drawing  
160 MQFP - 1.95/0.33 Form  
TOP VIEW  
D
BOTTOM VIEW  
D1  
PIN 1  
b
E1  
E
e
S
Y
M
B
O
L
A
ALL DIMENSIONS  
IN MILLIMETERS  
MIN.  
----  
NOM.  
----  
MAX.  
4.07  
A
A1  
A2  
D
0.25  
----  
----  
3.17  
3.42  
3.67  
A2  
31.65  
27.90  
31.65  
27.90  
0.65  
31.90  
28.00  
31.90  
28.00  
----  
32.15  
28.10  
32.15  
28.10  
0.95  
D1  
E
E1  
L
L
e
0.65 BSC.  
----  
A1  
1.95  
(.077)  
REF.  
b
0.22  
0.38  
8478_060  
N8478UG1A  
Conexant  
C-1  
Preliminary Information/Conexant Proprietary and Confidential  
Appendix C : Mechanical Specifications  
N8478UG1A  
Evaluation Module Users Guide  
C-2  
Conexant  
N8478UG1A  
Preliminary Information/Conexant Proprietary and Confidential  
D
Appendix D: Circuit Schematics  
Figures D-1 through D-5 illustrate the following:  
1. PCI Interface  
2. T1/E1 Interface—Port 1  
3. T1/E1 Interface—Port 2  
4. T1/E1 Interface—Port 3  
5. T1/E1 Interface—Port 4  
N8478UG1A  
Conexant  
D-1  
Preliminary Information/Conexant Proprietary and Confidential  
Appendix D : Circuit Schematics  
N8478UG1A  
Evaluation Module Users Guide  
Figure D-1. PCI Interface  
G N D  
V C C  
4
2
V S S I  
1 0 4  
V S S C  
5
V D D I  
1 4  
V S S C  
3 0  
V S S C  
9 8  
V S S C  
1 1 0  
V D D C  
V D D C  
V D D C  
V D D C  
3
2 8  
9 6  
V S S O  
1
V S S O  
3 3  
1 0 8  
V S S O  
4 1  
V S S O  
5 0  
V S S O  
6 0  
V D D O  
V D D O  
V D D O  
V D D O  
V D D O  
V D D O  
V D D O  
V D D O  
3 2  
4 0  
5 9  
8 0  
V S S O  
7 0  
V S S O  
8 1  
V S S O  
9 0  
V S S O  
1 2 1  
8 9  
V S S O  
1 3 0  
1 2 0  
1 4 0  
1 6 0  
V S S O  
1 4 1  
1
C O M P O N E N T S I D E  
S O L D E R S I D E  
PCI INTERFACE  
8478_062  
D-2  
Conexant  
N8478UG1A  
Preliminary Information/Conexant Proprietary and Confidential  
N8478UG1A  
Appendix D : Circuit Schematics  
Evaluation Module Users Guide  
Figure D-2. T1/E1 Interface - Port 1  
1
3
1
3
G N D 0  
8
G N D 1  
3 1  
V D D 0  
V D D 1  
V D D 2  
V D D 3  
V D D 4  
V D D 5  
V D D 6  
7
G N D 2  
4 9  
3 0  
5 0  
5 9  
6 0  
6 9  
7 2  
G N D 3  
5 6  
G N D 4  
6 2  
G N D 5  
6 3  
G N D 6  
7 5  
8478_063  
N8478UG1A  
Conexant  
D-3  
Preliminary Information/Conexant Proprietary and Confidential  
Appendix D : Circuit Schematics  
N8478UG1A  
Evaluation Module Users Guide  
Figure D-3. T1/E1 Interface - Port 2  
1
3
1
3
G N D 0  
8
G N D 1  
3 1  
V D D 0  
V D D 1  
V D D 2  
V D D 3  
V D D 4  
V D D 5  
V D D 6  
7
G N D 2  
4 9  
3 0  
5 0  
5 9  
6 0  
6 9  
7 2  
G N D 3  
5 6  
G N D 4  
6 2  
G N D 5  
6 3  
G N D 6  
7 5  
8478 064  
D-4  
Conexant  
N8478UG1A  
Preliminary Information/Conexant Proprietary and Confidential  
N8478UG1A  
Appendix D : Circuit Schematics  
Evaluation Module Users Guide  
Figure D-4. T1/E1 Interface - Port 3  
1
3
1
3
G N D 0  
8
G N D 1  
3 1  
G N D 2  
4 9  
G N D 3  
5 6  
G N D 4  
6 2  
G N D 5  
6 3  
G N D 6  
7 5  
V D D 0  
V D D 1  
V D D 2  
V D D 3  
V D D 4  
V D D 5  
V D D 6  
7
3 0  
5 0  
5 9  
6 0  
6 9  
7 2  
8478_065  
N8478UG1A  
Conexant  
D-5  
Preliminary Information/Conexant Proprietary and Confidential  
Appendix D : Circuit Schematics  
N8478UG1A  
Evaluation Module Users Guide  
Figure D-5. T1/E1 Interface - Port 4  
1
3
1
3
G N D 0  
8
G N D 1  
3 1  
V D D 0  
V D D 1  
V D D 2  
V D D 3  
V D D 4  
V D D 5  
V D D 6  
7
G N D 2  
4 9  
3 0  
5 0  
5 9  
6 0  
6 9  
7 2  
G N D 3  
5 6  
G N D 4  
6 2  
G N D 5  
6 3  
G N D 6  
7 5  
8478_066  
D-6  
Conexant  
N8478UG1A  
Preliminary Information/Conexant Proprietary and Confidential  
E
Appendix E: Circuit Board Drawings  
Figures E-1 through E-5 illustrate the levelss of the circuit board. Figure E-5 is  
the silkscreen for the top level, which has all the reference designators and  
component outlines.  
N8478UG1A  
Conexant  
E-1  
Preliminary Information/Conexant Proprietary and Confidential  
Appendix E : Circuit Board Drawings  
N8478UG1A  
Evaluation Module Users Guide  
E-2  
Conexant  
N8478UG1A  
Preliminary Information/Conexant Proprietary and Confidential  
0.0 Sales Offices  
Further Information  
Hong Kong  
literature@conexant.com  
1-800-854-8099 (North America)  
33-14-906-3980 (International)  
Phone: (852) 2827 0181  
Fax: (852) 2827 6488  
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Web Site  
Phone: (91 11) 692 4780  
www.conexant.com  
Fax: (91 11) 692 4712  
Korea  
Phone: (82 2) 565 2880  
Fax: (82 2) 565 1440  
World Headquarters  
Conexant Systems, Inc.  
4311 Jamboree Road  
P. O. Box C  
Phone: (82 53) 745 2880  
Fax: (82 53) 745 1440  
Newport Beach, CA  
92658-8902  
Phone: (949) 483-4600  
Fax: (949) 483-6375  
Europe Headquarters  
Conexant Systems France  
Les Taissounieres B1  
1681 Route des Dolines  
BP 283  
U.S. Florida/South America  
Phone: (727) 799-8406  
Fax: (727) 799-8306  
06905 Sophia Antipolis Cedex  
FRANCE  
Phone: (33 1) 41 44 36 50  
Fax: (33 4) 93 00 33 03  
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Phone: (805) 376-0559  
Fax: (805) 376-8180  
Europe Central  
Phone: (49 89) 829 1320  
Fax: (49 89) 834 2734  
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Phone: (215) 244-6784  
Fax: (215) 244-9292  
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Phone: (39 02) 9317 9911  
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Phone: (630) 773-3454  
Fax: (630) 773-3907  
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Fax: (44 1344) 486 555  
U.S. Northeast  
Phone: (978) 692-7660  
Fax: (978) 692-8185  
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Phone: (33 1) 41 44 36 50  
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Phone: (408) 249-9696  
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P. O. Box 12660  
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Phone: (972) 733-0723  
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Herzlia 46733, ISRAEL  
Phone: (972 9) 952 4064  
Fax: (972 9) 951 3924  
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Phone: (919) 858-9110  
Fax: (919) 858-8669  
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Phone: (65) 737 7355  
Fax: (65) 737 9077  
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Room 2808  
International Trade Building  
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Fax: (886 2) 2757 6760  
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Phone: (86 2) 6361 2515  
Fax: (86 2) 6361 2516  

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