5002R-CMR [TERIDIAN]
Dual SCART A/V Switch; 双SCART音频/视频开关
| 型号： | 5002R-CMR |
| 厂家： | 
TERIDIAN SEMICONDUCTOR CORPORATION |
| 描述： | Dual SCART A/V Switch |
| 文件： | 总30页 (文件大小：435K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
SEPTEMBER 2008
DESCRIPTION
FEATURES
• Two SCART connections (Auxiliary, TV)
• Video section
The AVPro® 5002R device is an audio/video switching
IC that supports an input/output port, an input only port,
and an output only port. The device includes
multiplexers that allow the inputs to be routed to the
outputs in various configurations. Additional outputs are
provided to drive an external RF modulator. The video
outputs of the multiplexers are buffered to drive 150Ω
loads. The audio outputs are buffered to provide 2
Vrms output. The 5002R has features optimized for
Canal+ satellite receiver applications, but it can also be
used in other applications that require control of
multiple audio and video sources.
- Integrated output drivers
- RGB, SVHS, composite outputs
- Programmable RGB gain
• Audio section
- Dual mode volume control
0 or 6 dB gain, plus 0 to -63 dB attenuation (1 dB
step)
- Programmable gain on DAC input channels
• Serial port control of switching I2C bus
• 64-lead LQFP, 48 QFN package options
_____________________________________________
BLOCK DIAGRAM
ABLANK
BLANK
EBLANK
TV_R
Aux_R
Aux_G
TV_G
Aux_B
Enc_R
Enc_G
Enc_B
Enc_C
TV_B
TV_YCout
Mux
MOD_YC
Enc_Y
Enc_YC
Enc2_Y
Enc2_C
Aux_YCout
Aux_Cout
Aux_YC
Aux_Cin
TV_YCin
TV_Fnc
Aux_Fnc
DO_0
SCLK
Serial
Port
Other I/O
SDATA
DO_1
Aux_Lin
Rout
Aux_Rin
Lin
Lout
Volume
Control
TV_Rout
TV_Lout
Rin
Mux
TV_Lin
Mod_Mono
TV_Rin
Aux_Lout
Aux_Rout
Aux_Mono
Vref
Rbias
Tgen
Support
Circuits
Page: 1 of 30
© 2005 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
Functional Description
SCART Video Switching
The 5002R is an audio/video switching device. The
device integrates both audio and video drivers so that it
can directly drive the SCART interface. All
programmable functions of the device are controlled
through a standard I2C serial interface and a set of
internal registers.
The device is designed to accept video signals from an
auxiliary SCART connector, TV SCART connector, and
an external video encoder/DAC device. The devices
include a set of analog multiplexers that receive video
signals from these sources and allow routing of the
signals to the various video outputs. The video output
drivers have a nominal gain of 2 V/V to allow for a
series resistance of 75Ω prior to the 75Ω termination. A
block diagram of the video switching function is
provided in Figure 1. Details of the register settings are
provided in the section titled “Serial Port Register
Tables”.
The device will interface to an external video encoder
that provides six video outputs. In addition, the 5002R
includes two programmable digital outputs and
provides inputs for the TV SCART audio/video.
4V
0V
ABLANK
BLANK
Mux
EBLANK
Aux_R
Enc_R
Enc_C
Gain
TV_R
Mux
Mux
Enc2_C
Aux_Cout
Aux_G
Enc_G
Aux_B
Enc_B
TV_G
TV_B
Mux
Mux
Enc_Y
Mux
Mux
TV_YCout
Enc_YC
Aux_YCout
TV_YCin
Enc2_Y
Aux_YC
Aux_Cin
Mux
Mod_YC
Aux_Fnc
Comparator
VGen
Mux
TV_Fnc
FIGURE 1: 5002R VIDEO SWITCHING BLOCK DIAGRAM
Note: Aux_Cin, Enc2_Y and Enc2_C are not available on the 48QFN package option.
Page: 2 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
TV RGB Outputs
Bit 7
Bit 6
Blank source
0
0
1
1
0
1
0
1
BLANK = ABLANK
BLANK = EBLANK
BLANK = 0V
The device accepts RGB video signals from two
sources. The Aux_R, Aux_G, Aux_B input pins are
typically connected to the auxiliary SCART connector.
The Enc_R, Enc_G, Enc_B input pins are connected to
the RGB outputs of an external video encoder device.
These outputs are used as a video source for the TV
SCART pins TV_R, TV_G, and TV_B. The RGB video
source is selected by setting the lower three (3) bits of
serial port Register 1. When these bits are set to
xxxxx000, the RGB source will be the encoder. When
these bits are set to xxxxx001, the source will be the
auxiliary port. The TV RGB outputs can be muted
independently from the TV composite outputs. Setting
Bit 6 of Register 1 low (0) will allow normal operation.
Setting Bit 6 high (1) will set the TV RGB outputs to the
blank level.
BLANK = 4V @ IC output pin
The user must insure that the source of the Blank
output is the same as the source for the RGB outputs,
i.e. ABLANK is selected when the auxiliary RGB is
active and EBLANK is selected when the encoder RGB
is active.
TV Composite Output
The device provides inputs for two composite video
sources that can be switched to the TV SCART
composite video pin, TV_YCout. The Aux_YC input pin
is typically connected to the “Video In” pin (pin 20) on
the auxiliary SCART connector. The Enc_YC input pin
is typically connected to the “YC” or “CVBS” output
from the external video encoder device. Selection of
the video source for the TV composite output is
accomplished when the RGB video source is selected
(see the register tables). When Register 1 is set to
xxxxx000, the Encoder input is selected and when set
to xxxxx001, the Auxiliary input is selected.
RGB Gain: The gain of the RGB outputs can be
adjusted to one of four different levels. Bits 4 and 5 in
Register 2 set the gain of the RGB output amplifiers
according to the following table:
Bit 5
Bit 4
RGB Amplifier Gain
0
0
1
1
0
1
0
1
Gain = 2 V/V = A0
Gain = A0 - 10%
Gain = A0 - 20%
Gain = A0 - 30%
TV SVHS Output Mode
The device supports SVHS video format. The SVHS
mode is selected for the TV SCART using the lower
three (3) bits of Register 1(except for SVHS Enc 4
mode). When the SVHS mode is selected, the
TV_YCout pin will provide the luminance signal output
from the selected source. The chroma output will be
provided on the TV_R pin. The video source for SVHS
mode can be either the auxiliary port or the encoder port.
When the auxiliary port is selected as the video source,
the video on Aux_R will be provided at the TV_R output
pin and the Aux_YC video will be provided at the
TV_YCout pin.
DC Restore: The device will generate a DC restore level
on each video output based on timing referenced to a
horizontal sync pulse. When the sync pulse is detected,
the DC restore circuit will act to position the blank level
to 1.2V at the respective RGB output pins and the
respective composite output pins (0.6V at the respective
RGB and composite video output load). The device can
be programmed to look for the horizontal sync pulse on
all of the RGB input pins or on the associated composite
video input pin (Aux_YC for the auxiliary port or Enc_YC
for the external encoder). Bit 7 of Register 1 determines
the horizontal sync source. At power-up, this bit defaults
to a low (0) state, which programs the device to look for
sync detect on the RGB input signals. In this mode, the
device can detect a horizontal sync on any of the three
RGB input signals. When Bit 7 is set to a high (1) state,
the device will look for a sync detect from the signal on
either the Aux_YC or Enc_YC pin depending on which
source is selected.
The device will support SVHS mode for four encoder
interface formats. The first encoder interface format
accepts chroma signals on the Enc_C pin and
luminance signals on the Enc_Y pin. This is designated
"SVHS, Enc 1" mode. The second format will receive
chroma information on the Enc_B pin and luminance
information on Enc_G. This format is designated
"SVHS, Enc 2". The third format will receive chroma
information from the Enc_R pin and luminance
information from the Enc_G pin. This mode is
designated “SVHS, Enc 3” on the serial port register
table. For these three modes, audio will come from the
Lin/Rin inputs. The fourth format is designated "SVHS
Enc 4" (not available in the 48QFN package option). It is
selected by setting register one to xx110xxx. Chroma
information is received on the Enc2_C input pin.
Blanking: The signal on the Blank output pin is
determined by the state of two MSBs in Register 2
according to the following table:
Page: 3 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
luminance is received on the Enc2_Y input pin. For this
Auxiliary SVHS Output Mode
mode only, audio will come from the TV_Lin/TV_Rin
inputs, and the video will have chroma output on
Aux_Cout, and luminance output on Aux_YCout.
In the SVHS mode, Pin 15 on the auxiliary SCART
connector provides chroma information. To support
this, the auxiliary port on the 5002R includes a chroma
input pin (Aux_Cin) that is externally AC coupled to Pin
15 on the auxiliary SCART connector.
When the SVHS mode is selected, the DC restore on
the TV_R pin will average to approximately 1.7 VDC at
the output pin. The DC restore circuit will act to position
the blank level to 1.2V at the TV_YCout video output
pin. The TV_G and TV_B outputs will be set to 0 VDC
when the SVHS mode is active.
The device also includes an output pin (Aux_Cout) that
provides a chroma output to Pin 15 (RED) on the
auxiliary SCART connector. When connected with the
Aux_R and Aux_Cin pins, this forms a bi-directional
port as shown in the diagram below:
RF Modulator Output
The device provides an output, Mod_YC, to drive an
external RF modulator. The Mod_YC output is a unity
gain amplifier designed to drive a 1kΩ load or higher.
When the device is operating in the RGB mode, the
signal on the Mod_YC output will follow the same
source as the TV_YCout output.
Aux_Cout
AuxiliaryS
Mux
Mux
CART
Pin 15
75
When the device is in the SVHS mode, the Mod_YC
output can be driven by several sources depending on
the SVHS video source. These various options are
detailed in the serial port register table.
Aux_R
Aux_Cin
One case that requires additional detail is the auxiliary
SVHS mode. In the SVHS mode, the Aux_YC video
input will only provide luminance information.
Composite video for the modulator output must be
generated by summing this luma information with the
chroma information from the auxiliary port. The input
pin labeled Aux_Cin is used for this purpose. The
Aux_Cin input pin is AC coupled to the same source
that provides the input signal to Aux_R. An internal
summing node combines the video signal on Aux_Cin
(chroma) with the video signal on Aux_YC (luma) to
generate a composite video signal. In the auxiliary
SVHS mode, this signal is provided at the Mod_YC pin.
Mux
BI-DIRECTIONAL PIN CIRCUIT
Using this configuration, the device will support SVHS
mode for four encoder interface formats. The first
encoder interface format will receive chroma information
from the Enc_C pin and luminance information from the
Enc_Y pin. This format is designated “SVHS, Enc 1”.
The second format will receive chroma information on
the Enc_B input and luminance information on Enc_G.
This format is designated "SVHS, Enc 2". The third
format will receive chroma information from the Enc_R
pin and luminance information from the Enc_G pin. This
mode is designated “SVHS, Enc 3” on the serial port
register table. For these three modes, audio will come
from the Lin/Rin inputs. The fourth format is designated
"SVHS Enc 4" (not available in the 48 QFN option).
Chroma information is received on the Enc2_C input pin
and the luminance is received on the Enc2_Y input pin.
For this mode only, audio will come from the
TV_Lin/TV_Rin inputs.
TV Composite Video Mute
The TV composite video outputs can be muted by
programming the lower three (3) bits in Register 1. The
power-up default condition is xxxxx111, (Auxiliary RGB
source) which sets the TV composite video outputs to 0
VDC and switches the TV audio outputs to
Aux_Lin/Aux_Rin. Setting these bits to xxxxx110
(Encoder RGB source) will also mute the TV composite
video outputs and switch the TV audio outputs to
Lin/Rin.
When the SVHS mode is selected, the DC restore on
the Aux_Cout pin will average to approximately 1.7
VDC at the pin (0.85 at the video output load). The DC
restore on the Aux_YCout pin will set the blank level to
1.2 V at the IC pin or approximately 0.6 V across the
video output load.
Auxiliary Composite Output
The auxiliary port includes a composite video output
pin (AUX_YCout) that is typically connected to the
“Video Out” pin (pin 19) on an auxiliary SCART
connector. Bits 3-5 in Register 1 determine the
source for the AUX_YCout pin as well as for the
Aux_Cout. See register table.
Page: 4 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
TV_Fnc pin as an output, or vice versa. This mode is
useful when the rest of the system powers down and all
signals from the auxiliary port are passed directly through to
the TV port, or vice versa.
The RGB mode of operation requires special
consideration. The output driver on the Aux_Cout pin
acts as part of the load for the RED signal on pin 15 of
the SCART connector. Register 1 must be set to
x0011001 to select the auxiliary SCART as the RGB
source for the TV outputs and selects the external
video encoder as the source for the Auxiliary SCART
connector. This provides an output impedance of
about 0Ω on the Aux_Cout pin. This setting also allows
the Enc_C pin to pass through the Aux_Cout pin. Due
to this, the outputs of the external video encoder
must be disabled to prevent corruption of the
incoming RED video signal.
When a function pin is set as an input, the voltage on that pin
is applied to an internal comparator. The comparator senses
the voltage on the input pin and sets the two (2) LSBs in the
read register according to the following table:
Input voltage
< 2.0 V
Bits
Function
Normal TV
16:9 aspect
Peritelevision
xxxxxx00
xxxxxx01
xxxxxx10
4.5 to 7.0V
>9.5 V
When a function pin is set as an output, the output level
for the pin is determined by the state of the two LSBs in
Register 2, according to the following table:
Auxiliary Video Mute
All auxiliary video outputs can be simultaneously disabled
by programming Bits 3-5 in Register 1. The power-up
default condition is xx111xxx, which sets all auxiliary video
outputs to 0 VDC and switches the auxiliary audio outputs
to Lin/Rin.
Bits
Output voltage
~0 V
Function
xxxxxx00
xxxxxx01
xxxxxx10
xxxxxx11
Normal TV
16:9 aspect
Peritelevision
Peritelevision
~6 V
Function Switching
~ 11 V
The device provides functions switching pins for both the
Auxiliary (Aux_Fnc) and TV (TV_Fnc) SCART ports. Both of
these pins are bi-directional. The direction of the pins is
determined by setting bits in Register 2 according to the
following table:
~ 11 V
Note that both the Aux_Fnc pin and the TV_Fnc pin can
be set as outputs simultaneously, however they will have
the same output voltage.
Bits
Aux_Fnc
output
TV_Fnc
output
The function output circuit includes short circuit protection.
When a function pin is in the 6V or 11V output mode, if the
SCART connection is shorted to ground, then the output is
disabled. Likewise, when a function pin is in the 0V output
mode, if the SCART connection is connected to a voltage
source, then the output is disabled. The load for the
function outputs is designed to be 10kΩ or higher.
xxxx00xx
xxxx01xx
xxxx10xx
xxxx11xx
output
input
input
output
Passthru I/O
Passthru O/I
For the case where Register 2 is set to xxxx11xx, the input
signal on the Aux_Fnc pin is passed directly through to the
Figure 2: 5002R Audio Switching Block Diagram
TV_Lin
TV_Rin
Mux
Mux
Aux_Lout
Aux_Mono
Aux_Rout
Mux
Mux
Mux
Mux
Lout
A
A
Mux
Mux
B
B
C
C
Lin
TV_Lout
Mux
Mux
Aux_Lin
Mod_Mono
TV_Rout
Rin
Aux_Rin
Mux
Mux
Rout
A: DAC Input Gain (0, 6, 9, or 11.5dB)
B: Volume Control Gain (0 or 6dB)
C: Volume Control Attenuation (0 to –63 dB in –1dB steps)
Page: 5 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
SCART Audio Switching
The audio inputs are considered to be associated with
the respective video inputs. As a result, the video
selection determines which audio signals will be
switched to a given SCART output. Refer to the serial
port register table for more information. Also see the
audio switching block diagram shown in Figure 2.
TV SCART Audio Outputs: The first pair of signals is
labeled TV_Lout and TV_Rout on the block diagram.
TV_Lout and TV_Rout are typically used to drive the
TV SCART audio pins. These outputs also have an
internal multiplexer that allows the user to select TV
audio either before or after the internal volume control
function. When Bit 0 in Register 4 is set low (0), the
volume control is used. When this bit is set high (1),
the volume control is bypassed. The power-up default
state is volume control active.
The 5002R provides inputs for the auxiliary audio
source (Aux_Lin/Aux_Rin), a stereo DAC associated
with the video encoder inputs (Lin/Rin), and inputs from
the TV SCART (TV_Lin/TV_Rin).
TV Audio Operation
TV Audio Line Outputs: The second pair of signals is
labeled Lout and Rout on the block diagram. Lout and
Rout are standard line outputs. The Lout/Rout outputs
have an internal multiplexer that allows the user to
select TV audio either before or after the internal
volume control function. When Bit 1 in Register 4 is set
low (0), the volume control is used. When this bit is set
high (1), the volume control is bypassed. The power-up
default state is volume control active. In addition, the
audio inputs from the TV SCART connector
(TV_Lin/TV_Rin) can be switched to the line outputs.
This is controlled by bit-3 of Register 4. Setting this bit
low (0) is the normal operation where the line outputs
follow the TV SCART outputs. Setting this bit high (1)
will switch the line outputs to the audio source on the
TV_Lin/TV_Rin inputs.
The audio source for the TV port is selected in concert
with the video source using the three (3) LSBs of
Register 1. The selected audio signals are input to
internal multiplexers that allow the user to select
between mono and stereo output options. Bits 4 and 5
of Register
3 control the stereo/mono selection
according to the following table:
Bit 1
Bit 0
TV left source
left input
left + right
left input
TV right source
right input
left + right
0
0
1
1
0
1
0
1
left input
right input
right input
At power-up, these bits default to 00 putting the device
in the stereo mode.
RF Mono Output: The TV_Lout and TV_Rout signals
are also summed internally to generate a mono audio
signal for an external RF modulator. This output is
labeled Mod_Mono. The internal summing circuit is
after the volume control mux so the audio control on
this output will be the same as that selected for the
TV_Lout and TV_Rout outputs.
Volume Control: The left and right TV audio channels
can be selected to pass through volume control circuits.
Each volume control circuit is formed by a serially
connected amplifier and attenuator pair. The amplifier
is programmed by register 4, bit 2( “0” for 0 dB and “1”
for 6 dB gains ). The attenuator is programmed by the
lower 6 bits of register 0( “xx000000” for 0 dB and
“xx111111” for –63 dB attenuation, in –1 dB steps ).
TV Audio Mute: A mute function is provided for all TV
audio outputs. The mute function is controlled by
setting Bit 6 in Register 0. When this bit is set to a high
state (1), all TV audio outputs are muted. This will be
the default condition at power-up. When the bit is set to
a low state (0), the audio path will be in normal
operating mode. This bit can be set independent of the
volume control such that the outputs can be muted
before any change in volume, or any switching of audio
sources.
DAC Input Gain (Lin/Rin): To support audio DACs
that have a limited output range, the 5002R provides
programmable gain amplifiers on the Lin and Rin
inputs. The gain is set by Bits 2 and 3 of Register 3,
according to the following table:
Bit 3
Bit 2
Gain
0
0
1
1
0
1
0
1
Gain = 0 dB
Gain = 6 dB
Gain = 9 dB
Gain = 11.5 dB
Page: 6 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
Auxiliary Audio Operation
such that if register 4 is to be programmed, then
registers 0, 1, 2, 3 and 4 need to be sent. If only
register 2 needs to be programmed, then only registers
0, 1 and 2 data need to be sent. It will support standard
and fast bus speed. The default address of the device
is 1001000x (1001000 for Write and 10010001 for
Read).
The auxiliary port includes stereo audio outputs for a
SCART connector (Aux_Lout, Aux_Rout) and a mono
audio output (Aux_Mono). These outputs can choose
between the Lin/Rin input pins or the TV_Lin/TV_Rin
input pins. The audio inputs are switched in concert
with the associated video inputs according to Bits 3-5 in
Register 1.
The 5002R includes a read register in which the upper
four bits identify the specific chip within the AVPro®
family. This allows a single application platform and
software to work with a wide variety of AVPro® chips.
The ID code for the 5002R is 0001.
Internal multiplexers allow the Aux_Lout and Aux_Rout
outputs to be configured into either stereo or mono
audio outputs. The two MSBs of Register 3 control the
stereo/mono selection according to the following table:
Data Transfers
Bit 1
Bit 0
Aux_Lout
source
Lin
Lin+Rin
Lin
Aux_Rout
source
Rin
Lin+Rin
Lin
A data transfer starts when the SDATA pin is driven
from HIGH to LOW by the bus master while the SCLK
pin is HIGH. On the following eight clock cycles, the
device receives the data on the SDATA pin and
decodes that data to determine if a valid address has
been received. The first seven bits of information are
the address with the eighth bit indicating whether the
cycle is a read (bit is HIGH) or a write (bit is LOW). If
the address is valid for this device, on the falling SCLK
edge of the eighth bit of data, the device will drive the
SDATA pin low and hold it LOW until the next rising
edge of the SCLK pin to acknowledge the address
transfer. The device will continue to transmit or receive
data until the bus master has issued a stop by driving
the SDATA pin from LOW to HIGH while the SCLK pin
is held HIGH
0
0
1
1
0
1
0
1
Rin
Rin
At power-up, these bits default to 00 putting the device
in the stereo mode.
The Aux_Mono output is generated through an internal
summing node that combines the signals of the
Aux_Lout and Aux_Rout outputs. All three auxiliary
audio outputs can be muted by setting the MSB in
Register 0. This bit is set high (1) at power-up causing
the outputs to be muted. Setting this bit low (0) enables
all auxiliary audio outputs.
Write Operation: When the read/write bit (LSB) is
LOW and a valid address is decoded, the device will
receive data from the SDATA pin. The device will
continue to latch data into the registers until a stop
condition is detected. The device generates an
acknowledge after each byte of data written.
Digital Outputs
The 5002R provides two programmable digital outputs,
DO_0 and DO_1 (not available on the 48 QFN option).
These pins are general purpose outputs programmed
by setting Bit 0 and 1 in Register 3. Setting the register
bits to 0 puts these outputs in the logic low state.
Setting the register bits to 1 puts the outputs in the logic
high state. Internal pull-up resistors (approximately
17kΩ) are included on these pins.
Read Operation: When the read/write bit (LSB) is
HIGH and a valid address is decoded, the device will
transmit the data from the internal register on the
following eight SCLK cycles. Following the transfer of
the register data and the acknowledge from the master,
the device will release the data bus.
Serial Port Definition
Reset: At power-up the serial port defaults to the states
indicated in boldface type. The device also responds to
the system level reset that is transmitted through the
serial port. When the master sends the address
00000000 followed by the data 00000110, the device
resets to the default condition.
Internal functions of the device are monitored and
controlled by a standard inter-IC (I2C)bus with data
being transferred MSB first on the rising edge of the
clock. The serial port operates in a slave mode only
and can be written to or read from. The device uses 7-
bit addressing, and does not support 10-bit addressing
mode. The write register data is sent sequentially,
Page: 7 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
SERIAL PORT REGISTER TABLES
Read register Device Address = 10010001
FUNCTION
BITS
DESCRIPTION
Function Control Input
xxxxxx00
xxxxxx01
xxxxxx10
xxxx00xx
xxxx11xx
0001xxxx
TV_Fnc or Aux_Fnc pin level =Level 0 < 2V
TV_Fnc or Aux_Fnc pin level =Level 1A ~6.0V
TV_Fnc or Aux_Fnc pin level = Level 1B >9.5V
Ignore these bits
Not Used
Device ID code
This code identifies the device type as the 5002R
Write Registers: Device Address = 10010000 (Bold indicates default setting)
Register 0: Audio Control Register A
FUNCTION
BITS
DESCRIPTION
Volume Control
Attenuation for TV, Line
or Mod_Mono audio
xx000000
xx011111
xx100000
xx111111
x0xxxxxx
Audio volume = maximum (0 dB)
Audio volume = minimum (-31 dB attenuation)
Extended TV audio volume control range. Range is approximately -32 dB to
-63 dB.
TV audio mute
TV audio (TV_Lout/TV_Rout, Lout/Rout, Mod_Mono) output = normal audio
output
TV audio (TV_Lout/TV_Rout, Lout/Rout, Mod_Mono) output = Muted
x1xxxxxx
0xxxxxxx
1xxxxxxx
AUX audio mute
AUX audio (Aux_Lout/Aux_Rout) output = normal audio output
AUX audio (Aux_Lout/Aux_Rout) output = Muted
Page: 8 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
Register 1: Audio/Video Control Register; audio/video source select bits
TV A/V source
Bits
TV_R
TV_G
TV_B
TV_YCout
Mod_YC
TV_Lout,
TV_Rout
RGB/YC, Encoder
RGB/YC, Auxiliary
SVHS, Enc 1
SVHS, Enc 2
SVHS, Enc 3
SVHS, Aux 1**
TV mute
xxxxx000
xxxxx001
xxxxx010
xxxxx011
xxxxx100
xxxxx101
xxxxx110
xxxxx111
Enc_R
Aux_R
Enc_C
Enc_B
Enc_R
Aux_R
Enc_R
Aux_R
Enc_G
Aux_G
0V
0V
0V
0V
Enc_G
Aux_G
Enc_B
Aux_B
0V
0V
0V
0V
Enc_B
Aux_B
Enc_YC
Aux_YC
Enc_Y
Enc_G
Enc_G
Aux_YC
0V
Enc_YC
Aux_YC
Enc_YC
Enc_YC
Enc_B
Lin, Rin
Aux_Lin, Aux_Rin
Lin, Rin
Lin, Rin
Lin, Rin
Aux_Lin, Aux_Rin
Lin, Rin
AuxYC+AuxCin
0V
TV mute
0V
0V
Aux_Lin,Aux_Rin
Aux A/V source
Bits
Aux_Cout
Aux_YCout
Aux_Lout, Aux_Rout
Composite, Enc 1
Composite, Enc 2
Composite, TV
SVHS, Enc 1
SVHS, Enc 2
SVHS, Enc 3
xx000xxx
xx001xxx
xx010xxx
xx011xxx
xx100xxx
xx101xxx
xx110xxx
xx111xxx
0V
0V
0V
Enc_B
Enc_YC
TV_YCin
Enc_Y
Enc_G
Enc_G
Enc2_Y
0V
Lin, Rin
Lin, Rin
TV_Lin, TV_Rin
Lin, Rin
Lin, Rin
Lin, Rin
TV_Lin, TV_Rin
Enc_C
Enc_B
Enc_R
Enc2_C
0V
SVHS, Enc 4***
Aux mute
Lin, Rin
Function
Bits
Description
TV RGB Mute
x0xxxxxx
x1xxxxxx
TV RGB OUTPUTS ARE ACTIVE
TV RGB outputs are mute (Blank level)
RGB Sync Source
0xxxxxxx RGB sync /DC restore source = RGB
1xxxxxxx RGB sync /DC restore source = Aux_YC or Enc_YC depending on source selection
Register 2: Video Control Register; video function bits
Function
Bits
Description
Function Control Output
Voltage
xxxxxx00 Level 0; normal TV output (Function Voltage ~ 0V)
xxxxxx01 Level 1A; 16:9 aspect ratio (Function Voltage ~ 6V)
xxxxxx10 Level 1B; Peritelevision output mode (Function Voltage ~ 12V)
xxxxxx11 Level 1B; Peritelevision output mode (Function Voltage ~ 12V)
xxxx00xx Aux_Fnc pin = output, TV_Fnc pin = output
Function Pin Control*
xxxx01xx Aux_Fnc pin = output, TV_Fnc pin = input
xxxx10xx Aux_Fnc pin = input,
TV_Fnc pin = output
xxxx11xx Signals will pass through from Aux_Fnc to TV_Fnc or vice versa.
The voltage applied to this pin (when set as an input) sets the state of the
two LSBs of the read register. See the note*
xx00xxxx RGB output amplifier gain = normal
xx01xxxx RGB output amplifiers attenuated by 10%
xx10xxxx RGB output amplifiers attenuated by 20%
xx11xxxx RGB output amplifiers attenuated by 30%
00xxxxxx BLANK = ABLANK
RGB Gain Control
BLANK output selection
01xxxxxx BLANK = EBLANK
10xxxxxx BLANK = 0V
11xxxxxx BLANK = 4V @ IC output pin
* Function pin voltages: (I) in output mode, are defined by the two LSBs of register 2, (II) in input mode, set the
state of the two LSBs of the read register.
Digital read is not meaningful in the pass-through mode( xxxx11xx ).
** Aux_Cin is not available on the 48 QFN package option.
*** Not available in the 48 QFN package option.
Page: 9 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
Register 3: Audio and general purpose control register B
Function
Bits
Description
DO_0 output control*
xxxxxxx0 DO_0 output = 0 (low)
xxxxxxx1 DO_0 output = 1 (high)
DO_1 output control*
Lin/Rin Gain control
xxxxxx0x DO_1 output = 0 (low)
xxxxxx1x DO_1 output = 1 (high)
xxxx00xx Input amplifier gain set at 0 dB
xxxx01xx Input amplifier gain set at 6 dB
xxxx10xx Input amplifier gain set at 9 dB
xxxx11xx Input amplifier gain set at 11.5 dB
xx00xxxx TV audio mode: stereo
xx01xxxx TV audio mode: mono (sum L+R) on both TV_Lout and TV_Rout
xx10xxxx TV audio mode: L channel on both TV_Lout and TV_Rout
xx11xxxx TV audio mode: R channel on both TV_Lout and TV_Rout
00xxxxxx Aux audio mode: stereo
TV Stereo/mono control
Aux Stereo/mono control
01xxxxxx Aux audio mode: mono (sum L+R) on both Aux_Lout and Aux_Rout
10xxxxxx Aux audio mode: L channel on both Aux_Lout and Aux_Rout
11xxxxxx Aux audio mode: R channel on both Aux_Lout and Aux_Rout
* Not available in the 48 QFN package option.
Register 4: Audio control register C
Function
Bits
Description
TV volume control select 1
xxxxxxx0
xxxxxxx1
xxxxxx0x
xxxxxx1x
Volume control active on TV_Lout, TV_Rout; Mod_Mono
TV_Lout, TV_Rout; Mod_Mono bypass the volume control
Volume control active on Lout, Rout
Lout, Rout bypass the volume control
TV volume control select 2
Enable 6dB gain
Line Out Source
Not used
xxxxx0xx 0 dB of additional gain added to volume control
xxxxx1xx
xxxx0xxx
xxxx1xxx
0000xxxx
6 dB additional gain added to volume control
Audio on Lout/Rout will be the same as the TV_Lout/TV_Rout
Audio on Lout/Rout will be from the TV_Lin/TV_Rin inputs
Reserved, set to 0 for normal operation
Page: 10 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
SCART Switching Table
INPUT PINS
OUTPUT PIN
Aux_R: Red input from Aux port
TV_R: Red video output to TV port or SVHS chroma output to TV port
Enc_R: Red input from Enc port
Enc_B: Optional chroma input from Enc port
Enc_C: Chroma input from Enc port
Aux_G: Green input from Aux port
Enc_G: Green input from Enc port
TV_G: Green video output to TV port
TV_B: Blue video output to TV port
Aux_B: Blue input from AUX SCART
Enc_B: Blue input from Enc port
ABLANK: Blanking input from Aux port
EBLANK: Blanking input from Enc port
BLANK: TV blanking output for RGB
(also can have internal 0V or 4V produced at this pin)
Aux_YC: Composite input from Aux port
Enc_YC: Composite input from Enc port
Enc_Y: Luminance input from Enc port
Enc_G: Optional luminance input from Enc port
TV_YCout: Composite video or SVHS Luminance output to TV port
Aux_YC: Composite input from Aux port
Enc_YC: Composite input from Enc port
Enc_B: Optional chroma input from Enc port
Aux_Cin/Aux_YC: sum of chroma and luma
Mod_YC: Follows TV_YCout output. Composite (or luma sum with
chroma) output to RF modulator
Enc_C: Chroma input from Enc port
Aux_Cout: Chroma output to auxiliary port
Enc_R: Optional chroma input from Enc port
Enc_B: Optional chroma input from Enc port
Enc2_C: Encoder 2 chroma input
Enc_YC: Composite input from Enc port
Enc_B: Optional chroma input from Enc port
Enc_G: Optional luminance input from Enc port
Enc_Y: Luminance input from Enc port
TV_YCin: Composite input from TV SCART
Enc2_Y: Encoder 2 luminance input
Aux_YCout: Composite video output to auxiliary port
Aux_Lin: Left audio input from Aux port
Lin: Left audio input from audio DAC
TV_Lin: Left audio input from TV SCART
Lout: Left audio output to RCA jack
Aux_Lin: Left audio input from Aux port
Lin: Left audio input from audio DAC
TV_Lout: Left audio output to TV port
Aux_Lout: Left audio output to auxiliary port
Rout: Right audio output to RCA jack
Lin: Left audio input from audio DAC
TV_Lin: Left input from TV SCART
Aux_Rin: Right audio input from Aux port
Rin: Right audio input from audio DAC
TV_Rin: Right audio input from TV SCART
Aux_Rin: Right audio input from Aux port
Rin: Right audio input from audio DAC
TV_Rout: Right audio output to TV port
Rin: Right audio input from audio DAC
TV_Rin: Right input from TV SCART
Aux_Rout: Right audio output to auxiliary port
Page: 11 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
PIN DESCRIPTIONS (Pins marked N/C should be left unconnected during normal use)
Pin
QFN
Pin
LQFP
Name
Type Description
Analog Pins
Auxiliary Blanking Input: In a typical system, this pin is connected to the RGB
status pin (pin 16) from the auxiliary SCART connector.
Auxiliary Red Input: In a typical system, this pin is connected to the RED input
pin (pin 15) of the auxiliary SCART connector. This input can be selected as the
signal source for the TV_R output pin.
Auxiliary Green Input: In a typical system, this pin is connected to the GREEN
input pin (pin 11) of the auxiliary SCART connector. This input can be selected
as the signal source for the TV_G output pin.
Auxiliary Blue Input: In a typical system, this pin is connected to the BLUE input
pin (pin 7) of the auxiliary SCART connector. This input can be selected as the
signal source for the TV_B output pin.
Auxiliary Function Pin: This is a bi-directional pin. As an input, it digitizes the
analog voltage on the auxiliary SCART function pin (8). As an output, it puts out
one of three voltage levels to the auxiliary SCART function pin.
Auxiliary Chroma Input: In a typical application, this pin is AC coupled to the Red
input line from the Auxiliary SCART connector. When the SVHS mode is
selected from the Auxiliary SCART video source, this pin is internally summed to
the Aux_YC input to generate a composite video signal for the Mod_YC output.
Auxiliary Video Input: In a typical system, this pin is connected to the composite
video input pin (pin 20) of the auxiliary SCART connector. This input can be
selected as the signal source for the TV_YCout.
ABLANK
2
4
4
6
I
I
Aux_R
Aux_G
Aux_B
Aux_Fnc
5
6
7
8
I
I
28
37
I/O
Aux_Cin
----
3
I
Aux_YC
Aux_Lin
1
2
I
I
Auxiliary Left Audio Input: In a typical system, this pin is connected to the L
Audio input pin (pin 6) of the auxiliary SCART connector. This input can be
selected as the signal source for the TV_Lout.
11
13
Auxiliary Right Audio Input: In a typical system, this pin is connected to the R
Audio input pin (pin 2) of the auxiliary SCART connector. This input can be
selected as the signal source for the TV_Rout.
Encoder Blanking Input: In a typical system, this pin is connected to the blanking
signal from the external video encoder device.
Encoder Red Input: In a typical system, this pin is connected to the RED output
pin from the external video encoder device. This input can be selected as the
signal source for the TV_R output pin.
Aux_Rin
EBLANK
Enc_R
12
3
15
5
I
I
I
33
45
Encoder Green Input: In a typical system, this pin is connected to the GREEN
output pin from the external video encoder device. This input can be selected as
the signal source for the TV_G output pin.
Encoder Blue Input: In a typical system, this pin is connected to the BLUE output
pin from the external video encoder device. This input can be selected as the
signal source for the TV_B output pin.
Enc_G
Enc_B
32
31
44
43
I
I
Page: 12 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
PIN DESCRIPTIONS (Continued)
Name
Pin
Pin
Type Description
QFN
LQFP
Encoder Video Input: In a typical system, this pin is connected to the
composite video output pin from the external video encoder device. This input
can be selected as the signal source for the AUX_YCout and/or TV_YCout
pins.
Enc_YC
34
36
46
48
61
47
I
I
I
I
Encoder Luminance Input: In a typical system, this pin is connected to the
composite video output pin from the external video encoder device. In SVHS
mode, this input can be selected as the signal source for the TV_YCout pin
and/or the Aux_YCout pin.
Enc_Y
Enc2_Y
Enc_C
Encoder 2 Luminance Input: In a typical system, this pin is used as an
alternate source for S-video luminance information to a VCR when OSD
information is not desired. This input can be selected as the signal source for
the Aux_YCout pin.
-----
35
Encoder Chroma Input: In a typical system, this pin is connected to the TV_R
output pin from the external video encoder device. In the SVHS mode, this
input can be selected as the signal source for the TV_R pin and/or the
Aux_Cout output pin.
Encoder 2 Chroma Input: In a typical system, this pin is used as an alternate
source for S-video chroma information to a VCR when OSD information is not
desired. This input can be selected as the signal source for the Aux_Cout
output pin.
Enc2_C
Lin
-----
25
63
34
I
I
Left Audio Input: In a typical system, this pin is connected to the left audio
output pin of the external audio DAC. This input can be selected as the signal
source for the TV_Lout and/or Aux_Lout pins.
Right Audio Input: In a typical system, this pin is connected to the right audio
output pin of the external audio DAC. This input can be selected as the signal
source for the TV_Rout and/or Aux_Rout pins.
Rin
24
48
9
33
1
I
I
I
TV Composite Video input: This pin accepts composite video from the TV
SCART. This pin can be selected as the source for the Aux_YCout pin.
TV_YCin
TV_Lin
TV Left Audio input: This pin accepts audio from the TV SCART. This pin can
be selected as the source for the Aux_Lout audio output and the Lout audio
output.
11
TV Right Audio input: This pin accepts audio from the TV SCART. This pin
can be selected as the source for the Aux_Rout audio output and the Rout
audio output.
TV_Rin
10
12
I
Auxiliary Video Output: This pin is the composite video output to the auxiliary
SCART connector (pin 19). In the SVHS mode, this pin is the luma output.
Aux_YCout
Aux_Lout
Aux_Rout
Aux_Mono
46
15
22
18
60
22
29
25
O
O
O
O
Auxiliary Left Audio Output: This pin is the output to the left channel audio
(pin 3) of the auxiliary SCART connector.
Auxiliary Right Audio Output: This pin is the output to the right channel audio
(pin1) of the auxiliary SCART connector.
Auxiliary Mono Output: This pin is equivalent to the sum of the output signals
on Aux_Lout and Aux_Rout.
Blanking output: This output provides the blanking signal to the TV SCART
connector (pin 16). This signal is either the blanking signal from the auxiliary
SCART connector (ABLANK) or the external video encoder (EBLANK).
BLANK
41
55
O
Lout
Rout
17
20
24
27
O
O
Left Audio Output: This pin is the output to the left channel audio RCA jack.
Right Audio Output: This pin is the output to the right channel audio RCA
jack.
Mono Audio Output: This pin is sum of Lout & Rout to the RF modulator
input.
Mod_Mono
19
26
O
Page: 13 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
PIN DESCRIPTIONS (continued)
Name
Pin
Pin
Type Description
QFN
LQFP
Aux Chroma Output: This output provides a chroma signal to the auxiliary
SCART connector to support SVHS operation. This pin is typically AC coupled
to pin 15 of the auxiliary SCART connector. When the S-video mode is
selected, a chroma signal from the video encoder is output to this pin.
Aux_Cout
47
62
O
TV Modulator Video Output: This pin provides composite video for an external
RF modulator. The signal on this pin follows the composite video output to the
TV_YCout pin.
Mod_YC
39
40
53
54
O
O
TV Video Output: This pin is the composite video output to the TV SCART
connector (pin 19). In the SVHS mode, this pin provides luminance
information.
TV_YCout
TV Red Output: This pin provides Red video to the TV SCART connector (pin
15). In SVHS mode, this pin provides the chroma information.
TV_R
42
44
45
16
21
56
58
59
23
28
O
O
O
O
O
TV Green Output: This pin provides Green video to the TV SCART connector
(pin 11).
TV_G
TV Blue Output: This pin provides Blue video to the TV SCART connector (pin
7).
TV_B
TV Left Audio Output: This pin is the output to the left channel audio (pin 3) of
the TV SCART connector.
TV_Lout
TV_Rout
TV Right Audio Output: This pin is the output to the right channel audio (pin1)
of the TV SCART connector.
TV Function Pin: This is a bi-directional pin. As an input, it digitizes the analog
voltage on the TV SCART function pin (8). As an output, it puts out one of
three voltage levels to the TV SCART function pin.
TV_Fnc
27
36
I/O
Digital Pins
Digital Output 0: This pin is a general purpose output that is controlled by
serial port register.
DO_0
----
----
40
41
O
O
Digital Output 1: This pin is a general purpose output that is controlled by
serial port register.
DO_1
SCLK
30
29
39
38
I
Serial Clock Input: This pin accepts a serial port clock input signal.
Serial Data Input/Output that can receive or transmit serial data.
SDATA
I/O
POWER/GROUND PINS
14,37 21, 50,
+5 VDC power supply pins.
VCC
VDD
Vref
-
-
-
,43
57
13,26
20,35
+12 VDC power supply pin for function switching circuits.
Internal voltage reference, bypass pin. Add capacitor 0.1μF(1.0μF for better
PSRR) to ground.
7
9
17, 32,
49, 64
Ground for all blocks.
GND
23
-
Rbias
Tgen
8
10
51
-
-
Bias point of internal current generator. Add resistor 10.0kΩ(+ 1%) to ground.
38
Reference point for internal timing circuit. Add capacitor 470pF to ground.
Note: The exposed pad on the bottom of the 48 QFN package must be grounded.
Page: 14 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
Operation beyond the maximum ratings may damage the device
PARAMETER
RATING
Storage temperature
-55 to 150 °C
Junction operating temperature
5V supply voltage pins
+125 °C
-0.3 V < VCC < 6 V
-0.3 V < VDD < 13 V
-0.3 V to VCC+0.3 V
-0.3 V to VCC+0.3 V
-0.3 V < VDD < 13 V
-0.3 V < VDD < 13 V
±5 kV
12V supply pin
Voltage applied to Digital and Video Inputs
Voltage applied to video pins
Voltage applied to audio pins
Voltage applied to FNC pin (input)
ESD tolerance – SCART pins*
ESD tolerance – other pins
±2.5 kV
* Note: To pass the SCART 15 kV ESD requirement, external protection for the IC is required.
SPECIFICATIONS: Unless otherwise specified: 0° < Ta < 70 °C; power supplies VCC = +5.0 V ±5%, VDD = 12.0 V
±5%.
PARAMETER
CONDITION
MIN
NOM
MAX
UNIT
Operating Characteristics
Power Supply Currents
(Default register setting)
No signal, video outputs not loaded
VCC (+5 VDC)
VDD (+12 VDC)
18
17
mA
mA
Power Supply Currents
(Composite Auxiliary outputs on)
No signal, video outputs not loaded
VCC (+5 VDC)
28
20
mA
mA
VDD (+12 VDC)
PSRR
f = 100 Hz, 0.3 Vpp on VCC/ VDD
40
dB
in
Switch time
Serial Port Timing( Set by I2C controller )
From rising edge of 8th clock
0.8
μs
SCLK Input Frequency
400
kHz
μs
μs
ns
ns
ns
ns
μs
μs
μs
ns
SCLK LOW time (tCL)
1.3
0.6
SCLK HIGH time (tCH)
Rise time (tRT)
SCLK and SDATA
300
300
Fall time (tFT)
SCLK and SDATA
Data set-up time* (tDSU)
Data hold time* (tDH)
Start set-up time (tSSU)
Start hold time (tSH)
Stop set-up time (tPSU)
Glitch rejection
SDATA change to SCLK HIGH
SCLK LOW to SDATA change
100
30
0.6
0.6
0.6
maximum pulse on SCLK and/or
50
SDATA
* These specifications also apply to an acknowledge generated by the device.
Page: 15 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
SPECIFICATIONS (continued)
Digital I/O Characteristics (SCLK, SDATA)
Parameter
CONDITION
MIN
NOM
MAX
VCC+0.3
0.3* VCC
10
UNIT
High level input voltage
0.7* VCC
GND-0.3
-10
V
V
Low level input voltage
High level input current (SCLK)
High level input current (SDATA)
Low level input current (SCLK)
Low level input current (SDATA)
Vin = Vcc - 1.0V
Vin = Vcc - 1.0V
Vin = 1.0V
µA
µA
µA
µA
V
-50
50
-10
10
Vin = 1.0V
-50
50
Low level output voltage (SDATA) IOL = 3 mA
0.4
Fall time (tFT) VIhmin to VILmax
(SDATA)
Acknowledge or read
with CL = 400pF
250
ns
Digital I/O Characteristics (DO_0, DO_1, TV_Fnc, Aux_Fnc)
Digital output sink current
DO_0, DO_1, Register bits read
0
3.0
mA
Digital output fall time
100
ns
V
Rpullup = 10 kΩ, CL = 15 pF
Rpullup = 10 kΩ, CL = 15 pF
Rpullup = 10 kΩ, CL = 15 pF
Digital output voltage high
Digital output voltage low
4.0
0
VCC
1
V
TV_Fnc or Aux_Fnc output level
10kΩ or higher load to ground
Register 2 = xxxxxx00
Register 2 = xxxxxx01
Register 2 = xxxxxx10 or
xxxxxx11
0.0
4.9
10.0
.002
5.6
11.7
1.2
6.5
VDD
V
V
V
Passthrough Mode
Register 2 = xxxx11xx
0.0 V < Vin < 2.0 V
5.1 V < Vin < 7.0 V
11.0 V < Vin < VDD V
0.0
4.5
9.5
2.0
7.0
VDD
V
V
V
TV_Fnc or Aux_Fnc input levels
Read Register = xxxxxx00
Read Register = xxxxxx01
Read Register = xxxxxx10
0.0
4.5
9.5
2.0
7.0
VDD
V
V
V
t
CH
t
CL
tFT
SCLK
t
sh
t
PSU
t
DSU
tDH
tssu
SDATA
MSB
LSB
Stop
Start
tRT
Serial Port Timing (Typical)
Page: 16 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
Video Characteristics - Unless otherwise noted, typical output loading on all video outputs is 150Ω. All video outputs
are capable of withstanding a sustained 75Ω load to ground without damage.
MIN
NOM
PARAMETER
CONDITION
MAX
UNIT
kΩ
Input impedance
Input dynamic range
All video inputs
100
fin = 100 kHz, THD < 0.15%
1.5
2.0
1.0
Vpp
Gain at all video outputs,
Except Mod_YC
1.0 Vpp input, fin = 100 kHz
1.0 Vpp input, fin = 100 kHz
1.9
2.1
V/V
V/V
Gain at Mod_YC
0.95
1.05
RGB Gain control
A0 = reading xx00xxxx gain
1.0 Vpp input, fin = 100 kHz;
Register 2 = xx00xxxx
Register 2 = xx01xxxx
Register 2 = xx10xxxx
Register 2 = xx11xxxx
1.9
2.0
2.1
V/V
V/V
V/V
V/V
A0 –12%
A0 –22%
A0 –33%
A0 –10%
A0 –20%
A0 –30%
A0 –8%
A0 –18%
A0 –27%
Output gain inequality
RGB or SVHS output channel to
channel
-2.5
2.5
%
Output DC level
Blank level clamp voltage
Average level
RGB outputs
CVBS or Luma output
1.2
V
chroma output
1.7
63
V
dB
dB
ns
Signal to noise ratio
Cross talk
1 Vpp, 100kHz input
fin = 4.43 MHz, 1 Vpp
58
-55
Output to output differential delay RGB signals, fin = 100 kHz
-20
0.0
1.0
-50
-2.5
20
0.4
3.0
50
Blanking level
Input or output, logical “0”
Input or output, logical “1”
BLANK to RGB signals
V
V
Blanking delay
ns
Differential phase
TV_YCout, Aux_YCout and
Mod_YC
2.5
Deg.
Differential gain
TV_YCout, Aux_YCout and
Mod_YC
-2.5
2.5
%
Audio Characteristics - Unless otherwise noted, all audio outputs shall drive a load of 10.3 kΩ. All audio outputs will
withstand a sustained 300Ω to ground without damage.
PARAMETER
Input impedance
Output impedance
Gain
CONDITION
MIN
NOM
100
10
MAX
UNIT
kΩ
Ω
fin = 1.0 kHz, 0 dB settings
0.5 Vrms input, Flat within
± 0.3 dB
0.95
20
1.0
1.05
V/V
kHz
Frequency response
Measured -3 dB point
100
90
kHz
dB
Dynamic Range
A Weighting filter
fin = 1.0 kHz, 2.0 Vrms;
Register 4 = xxxxxx11
Page: 17 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
Audio Characteristics – Cont. (THD* spec. at 1 kHz frequency and 0 dB DAC Input gain and Volume Control settings)
PARAMETER
CONDITION
MIN
NOM
MAX
UNIT
Signal to Noise ratio
A Weighting filter
fin = 1.0 kHz, 2.0 Vrms;
Register 4 = xxxxxx11
90
dB
Bypass
Volume Control
0.5 Vrms output
Distortion (THD)*
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
%
%
%
%
%
%
%
%
%
%
Aux_Lin/Aux_Rin to all outputs
2.0 Vrms output
0.5 Vrms output
2.0 Vrms output
0.5 Vrms output
2.0 Vrms output
0.5 Vrms output
2.0 Vrms output
0.5 Vrms output
2.0 Vrms output
Pass through
Volume Control
Bypass
Volume Control
Distortion (THD)*
Lin/Rin to Lout/Rout, TV_Lout/TV_Rout
and Mod_Mono
Pass through
Volume Control
Independent of
Volume Control
Distortion (THD)*
Lin/Rin to Aux_Lout, Aux_Mono and
Aux_Rout
Independent of
Volume Control
0.5 Vrms output
2.0 Vrms output
Distortion (THD)*
0.1
%
TV_Lin/TV_Rin to all outputs
0.1
45
%
DC Offset at Aux Outputs
-55
mV
Aux_Lout, _Rout and _Mono
Bypass Volume Control
DC Offset at TV & Line Outputs
TV_Rout, TV_Lout, Rout,
Lout and Mod_Mono
-55
45
60
mV
mV
Volume Control Active, 0 dB gain
Volume Control Active, 6 dB gain
-100
-140
120
mV
Output phase matching
fin = 1.0 kHz, 0.5 Vrms; any
stereo pair
0.5
Deg.
Stereo separation
any stereo pair
fin = 1.0 kHz, 2.0 Vrms
85
75
dB
dB
Crosstalk
fin = 1.0 kHz, 2.0 Vrms
(Any combination)
DAC Input Gain
Register 3 xxxx00xx
xxxx01xx
0
6
9
dB
dB
dB
dB
xxxx10xx
xxxx11xx
11.5
Reg. 0=x0000000 (0 dB attenuation)
Register 4 = 00000000
Register 4 = 00000100
Output attenuation (volume
control)
0
6
dB
dB
Reg. 0=x0011111 (31 dB attenuation)
Register 4 = 00000000
Register 4 = 00000100
At TV_Lout/TV_Rout, Lout/Rout
And Mod_Mono
-31
-25
dB
dB
Reg. 0=x0111111 (63 dB attenuation)
Register 4 = 00000000
Register 4 = 00000100
-63
-57
dB
dB
Register 0 = x1xxxxxx (MUTE)
Register 4 = 00000000
-75
1.5
dB
%
Attenuation accuracy
Attenuation accuracy
Audio to video path skew
Register 0 = 00000100 to
00011111
-5
5
Register 0 = 00000001 to
00000011
-10
10
%
Video input = 1.0 Vpp @
100kHz
μs
Audio input = 0.5 Vrms @ 1.0kHz
Page: 18 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
Applications Diagram:
75
0.01uF
TV
21
19
GND
75
TV_CVBS_in
GND
20
18
16
14
TV_CVBS_out
17
15
GND
TV_Red
TV_Blank
GND
0.01uF
0.01uF
13
11
GND
470pF
12
10
8
0.01uF
TV_Green
75
75
75
75
75
75
75
75
9
7
5
3
GND
TV_Fnc
TV_Lin
GND
TV_Blue
GND
6
4
2
TV_Lout
TV_Rout
TV_Rin
1
TV_CVBS_in
75
0.01uF
0.01uF
0.01uF
48
Enc_Y
1
2
TV_YCin
Aux_YC
Aux_Cin
ABLANK
EBLANK
Aux_R
75
75
0.01uF
0.01uF
0.01uF
Enc_C
Enc_YC
Enc_R
47
46
45
75
75
0.01uF
0.01uF
75
Aux_CVBS_in
3
4
5
6
7
Digital
Encoder
Inputs
Aux_Blank
Digital Encoder
Blank
75
Enc_G 44
Aux_Red
75
75
0.01uF
0.01uF
43
Enc_B
Aux_Green
75
75
0.01uF
0.01uF
Aux_G
N/C 42
Aux_Blue
8
41
Aux
(VCR)
Aux_B
DO_1
AVPro 5002R
75
1uF
10K
9
40
Vref
DO_0
21
19
17
15
13
11
GND
Aux_CVBS_in
GND
20
10 Rbias
SCLK 39
SCL
SDA
Aux_CVBS_out
0.1uF
18
16
14
Aux_Fnc
10K
GND
Aux_Red
TV_Rin
11
38
SDATA
TV_Lin
Aux_Blank
GND
330
0.1uF
TV_Lin
12
13
14
15
16
Aux_Fnc 37
TV_Fnc 36
TV_Rin
Aux_Lin
N/C
GND
12
10
8
10K
330
Aux_Green
GND
Aux_Lin
9
7
5
3
Aux_Fnc
Aux_Lin
GND
0.1uF
+12V
0.1uF
VDD
TV_Fnc
35
Aux_Blue
GND
6
Digital Audio_L
Aux_Rin
34
Aux_Rin
N/C
Lin
4
Aux_Lout
Aux_Rin
2
0.1uF
Digital Audio_R
Aux_Rout
1
33
Rin
0.1uF
0.01uF
10uF
10uF
10uF
10uF
10uF
10uF
0.01uF
10uF
10uF
0.01uF
Power
Supplies
+5V
+12V
10uF
0.01uF
10uF
0.01uF
Page: 19 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
Applications Information
Function Pin Control
The AVPro® 5002R controls the output voltage of the Aux_FNC and TV_Fnc pins with the same register bits. In some
applications (such as BskyB), independent control of these output voltages is required. An external circuit pictured
below that will allow independent control. The internal register bits should be used to control the Aux_Fnc pin as this
pin is typically bi-directional. The control for the TV_Fnc pin is then controlled by the external circuit. The DO_0 and
DO_1 pins are used to switch two external transistors to create the three different voltage levels. The 150Ω resistor is
used to limit the current through Q2. With a SCART load of 10kΩ, the voltage at the TV_Fnc pin is as follows:
DO_0 = 0, DO_1 = 0; TV_Fnc = 10.9V
DO_0 = 1, DO_1 = 0; TV_Fnc = 5.7V
DO_0 = 0, DO_1 = 1; TV_Fnc = 0.0V
12V
1kΩ
150Ω
TV_Fnc
1kΩ
Q1
DO_0
DO_1
Q2
Note: DO_0 and DO_1 are not available on the 48 QFN package.
Page: 20 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
AUXILIARY Red / Chroma Bi-directional Operation:
For the TV source selection of Auxiliary RGB (Register 1 xxxxx001) and S- video (Register 1 xxxxx101), the output
driver on the Aux_Cout pin acts as part of the load for the RED/Chroma signal input on pin 15 of the SCART connector.
In order to get the correct 75Ω load impedance, the Aux_Cout amplifier needs either a DC bias, an extra resistance to
ground, or a FET pulldown.
1). To select an internal DC bias for the Aux_Cout amplifier, the Aux A/V source should be set for S-video mode
(SVHS Enc 1, Enc 2, Enc 3 or Enc 4) per the following table. This puts 0.9 VDC bias at the input, or about 1.8V at the
Aux_Cout pin, and 0.9V at the auxiliary SCART connector when terminated (driven) in a 75Ω system. Therefore, the
outputs of the external video encoder must be disabled in this mode in order to prevent corruption of the incoming
RED/Chroma video signal.
2). As an alternative, to select a 0V DC bias for the Aux_Cout amplifier, the Aux A/V source should select one of
the Composite modes (Enc1, ENC2 or TV) or Aux mute in the following table. In this mode, the internal amplifier bias
set to 0V, but amplifier is a weak pulldown. The amplifier is biased between ground and +5V, as such, the output
impedance of the Aux_Cout is around 100Ω including the 75Ω series resistor. A shunt resistor of 330 to 470 Ω will
compensate, but will slightly lower the Aux_Cout chroma signal.
3). Another option is to add a FET with ~20Ω series resistor from the Aux_Cout to ground. Select 0VDC bias for
the Aux_Cout amplifier, and bias the FET in the “ON” or conducting state. The Aux A/V source should select one of the
Composite modes (Enc1, ENC2 or TV) or Aux mute. See the Register 1: Audio/Video Control bit table for settings. This
method will compensate for the Aux_Cout pin pulldown, and not significantly reduce the Aux_Cout chroma signal.
5002R
Aux_Cout
Auxiliary
SCART
Pin 15
Mux
Mux
Mux
75 Ω
Aux_R
Option 2
R = (330-470Ω)
or
Aux_Cin
Option 3
FET + R = 20 Ω
Note: Aux_Cin is not available on the 48QFN package
HOT-PLUG OF SCART CONNECTORS
Semiconductor ICs can be sensitive to discharges caused by floating chassis grounds between audio/video equipment.
This is observed when the SCART cables are repeatedly connected and disconnected while the ICs are powered on
inside the IRD. When the SCART cable is unplugged, an AC potential can exist between equipment. When the SCART
cable is plugged back into the IRD, the AC potential discharges through the SCART connector. If the discharge occurs
through the shield of the SCART connector or the ground pins, there is no problem. If the discharge occurs through the
signal pins, semiconductor devices can experience potential issues. These issues will occur if the pulse created by the
discharge has a fast rising edge, typically a few hundred pico-seconds. This is an order of magnitude faster than a
standard ESD pulse so the internal ESD diodes of ICs will not respond fast enough to protect the device. This issue can
be resolved by placing a small shunt capacitor on each SCART I/O pin. The capacitor slows the rising edge of the
discharge pulse and allows the internal ESD diodes to react to the discharge. An exact value should be calculated for
each signal line depending upon the signal type so as to avoid roll-off of the intended signal. (see Equivalent Circuit
section)
Page: 21 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
Equivalent Circuits:
ESD
Protection
+5V
SCART
Connector
Video
Outputs
R=75 Ω
+
-
RL =
75Ω
C = 47pF
Vz
6.8V
Video Output Circuit
ESD
Protection
SCART
Connector
Aux_Cout
+
-
R=75 Ω
6.8V
Vz
C = 47pF
Aux_R
C =
0.01µF
Aux_Cin
C =
0.01µF
Auxiliary SCART pin 15 Circuit
Page: 22 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
ESD
Protection
+5V
SCART
Connector
Video
Inputs
C =
0.01µF
R<75 Ω
RL =
75Ω
C = 47pF
Vz
6.8V
DC
Restore
Video Input Circuit
VCC
17kΩ
Digital Output Circuit
RSW=70Ω
+12V
ESD
Protection
25kΩ
+12V
SCART
Connector
25kΩ
330 Ω
50Ω
RL =
10kΩ
140kΩ
70kΩ
470pF
AUX and TV Function Switching Circuit
Page: 23 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
ESD
Protection
+12V
SCART
Connector
Audio
Inputs
C=0.1 uF
RL =
10kΩ
Audio Input Circuit
ESD
Protection
+12V
SCART
Connector
Audio
Outputs
C=10 uF
RL =
10kΩ
Audio Output Circuit
Page: 24 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
PACKAGE PIN DESIGNATION
(Top View)
Aux_YC
1
Enc_Y
36
2
35 Enc_C
ABLANK
EBLANK
Aux_R
Aux_G
Aux_B
Vref
34 Enc_YC
3
4
Enc_R
Enc_G
Enc_B
SCLK
SDATA
Aux_Fnc
TV_Fnc
VDD
33
32
31
30
29
28
27
26
25
5
6
AVPro 5002R
7
Rbias
8
TV_Lin
9
10
11
TV_Rin
Aux_Lin
Aux_Rin 12
Lin
AVPRO® 5002R-CM (JEDEC 48 QFN)
Page: 25 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
MECHANICAL DRAWING (48 QFN)
0.85 NOM./ 0.9MAX.
6
0.00 / 0.005
0.20 REF.
5.75
0.65 NOM./ 0.7MAX.
3
2.875
1
2
3
12º MAX
SEATING
PLANE
SIDE VIEW
TOP VIEW
3.95 / 4.25
1.975 / 2.125
0.4
0.24 / 0.6
1
2
3
0.45
0.15 / 0.25
0.35
Min.
0.35
Min.
BOTTOM VIEW
Page: 26 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
RECOMMENDED PCB LAND PATTERN DIMENSIONS
48 Pin - QFN
x
y
e
G
h
h
d
A
h
h
x
y
e
d
A
G
Recommended PCB Land Pattern Dimensions
SYMBOL
DESCRIPTION
MIN
TYP
MAX
0.28 mm
e
x
y
d
A
G
h
Lead pitch
0.4 mm
0.25 mm
0.6 mm
4.1 mm
4.65 mm
5.1 mm
0.3 mm
Via diameter, see Note 1
Note 1: Provide thermal pad with solid via connection to the ground plane. Vias should be incorporated with a
1.2mm pitch.
Page: 27 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
PACKAGE PIN DESIGNATION
(Top View)
TV_YCin
Aux_YC
Aux_Cin
ABLANK
EBLANK
Aux_R
Enc_Y
Enc_C
Enc_YC
Enc_R
Enc_G
Enc_B
N/C
1
Aux_G
Aux_B
41
DO_1
DO_0
SCLK
SDATA
Aux_Fnc
TV_Fnc
VDD
AVPro 5002R
Vref
Rbias
9
TV_Lin
TV_Rin
Aux_Lin
N/C
Aux_Rin
N/C
Lin
33
Rin
AVPro® 5002R-CGT (JEDEC 64 PIN LQFP)
Page: 28 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
MECHANICAL DRAWING
11.7
12.3
11.7
12.3
PIN No. 1 Indicator
9.8
10.2
0.00
0.20
1.40
1.60
0.14
0.28
0.50 Typ.
0.60 Typ.
64-Lead Low Profile Plastic Quad Flatpack Package (JEDEC LQFP)
Note: Controlling dimensions are in mm.
ORDERING INFORMATION
PART DESCRIPTION
ORDER NO.
PACKAGE MARK
AVPro 5002R
AVPro® 5002R Dual SCART A/V Switch (64 LQFP)
AVPro 5002R-CGT
5002R-CGT
AVPro® 5002R Dual SCART A/V Switch (64 LQFP)
Tape / Reel
AVPro 5002R
5002R-CGT
AVPro 5002R-CGTR
AVPro 5002R-CGT/F
AVPro® 5002R Dual SCART A/V Switch (64 LQFP)
Lead Free
AVPro 5002R
5002R-CGT
AVPro® 5002R Dual SCART A/V Switch (64 LQFP)
Lead Free, Tape / Reel
AVPro 5002R
5002R-CGT
AVPro 5002R-CGTR/F
AVPro 5002R-CM
AVPro® 5002R Dual SCART A/V Switch (48 QFN)
AVPro5002R
AVPro5002R
AVPro® 5002R Dual SCART A/V Switch (48 QFN)
Tape / Reel
AVPro 5002R-CMR
AVPro® 5002R Dual SCART A/V Switch (48 QFN)
Lead Free
AVPro 5002R-CM/F
AVPro 5002R-CMR/F
AVPro5002R
AVPro5002R
AVPro® 5002R Dual SCART A/V Switch (48 QFN)
Lead Free, Tape / Reel
Page: 29 of 30
© 2008 TERIDIAN Semiconductor Corporation
Rev 2.1
AVPro® 5002R
Dual SCART A/V Switch
DATA SHEET
This product is sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to
warranty, patent infringement and limitation of liability. TERIDIAN Semiconductor Corporation (TSC) reserves the right to make changes in
specifications at any time without notice. Accordingly, the reader is cautioned to verify that a data sheet is current before placing orders.
TSC assumes no liability for applications assistance.
Purchase of I2C components of TERIDIAN Corporation or one of its sublicensed Associated Companies conveys a license under the Philips
I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined
by Philips.
TERIDIAN Semiconductor Corp., 6440 Oak Canyon Rd., Irvine, CA 92618
TEL (714) 508-8800, FAX (714) 508-8877, http://www.teridian.com
09/09/08 – rev 2.1
Rev 2.1
© 2008 TERIDIAN Semiconductor Corporation
Page: 30 of 30
© 2008 TERIDIAN Semiconductor Corporation
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