U5020M [TEMIC]
Digital Window Watchdog Timer; 数字窗口看门狗定时器
| 型号： | U5020M |
| 厂家： | 
TEMIC SEMICONDUCTORS |
| 描述： | Digital Window Watchdog Timer |
| 文件： | 总8页 (文件大小：110K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
U5020M
Digital Window Watchdog Timer
Description
The digital window watchdog timer, U5020M, is a CMOS timer reset the microcontroller. The IC is tailored for
integrated circuit. In application where safety is critical, microcontrollers which can work in both full-power and
it is especially important to monitor the microcontroller. sleep mode. With an additional voltage monitoring
Normal microcontroller operation is indicated by a cycli- (power-on reset and supply voltage drop reset) U5020M
cally transmitted trigger signal, which is received by a offers a complete monitoring solution for microsystems
window watchdog timer within a defined time window. A in automotive and industrial applications.
missing or a wrong trigger signal makes the watchdog
Features
Low current consumption: IDD < 100 A
Trigger input
RC–oscillator
Six wake-up inputs
Reset output
Internal reset during power-up and supply voltage
drops (POR)
Enable output
“Short” trigger window for active mode
“long” trigger window for sleep mode
Cyclical wake-up of microcontroller in sleep mode
Ordering Information
Extended Type Number
U5020M–FP
Package
SO16
Remarks
Block Diagram
C
10 nF
13
95 10387
VDD
R1
VDD
15
OSC
RC
Oscillator
C1
OSC
Reset
10
16
Input ts
State machine
C
External
switching
circuitry
OSC
9
Trigger 11
Input signal
conditioning
Enable
Power–on
reset
POR
POR
Test logic
Mode
12
3–8
2
1
14
Wake up
GND
Test
Test
Figure 1. Block diagram with external circuit
TELEFUNKEN Semiconductors
1 (8)
Rev. A3, 27-Feb-97
Preliminary Information
U5020M
Pin Description
Pin
1
2
Symbol
TM
TM
Function
Test must not be connected
Test must be connected to GND
3 to 8 Wake-up Wake-up inputs (pull-down
resistor)
There are six digitally debounced
wake-up inputs. During the long
trigger mode each signal slope at
the inputs initiates a reset pulse at
Pin 10.
Enable output (push-pull)
It is used for the control of periph-
eral components. It is activated
after the processor triggers three
times correctly.
Reset output (open drain)
Resets the processor in the case of
a trigger error or if a wake-up
pulse occurs during the long
watchdog period.
Trigger input (pull-up resistor)
It is connected to the microproces-
sor’s trigger signal.
TM
t
s
1
2
3
4
5
6
7
8
16
TM
Wake-up
Wake-up
Wake-up
15 Osc
9
Ena
Reset
Trig
GND
14
13
12
11
10
9
V
DD
10
Mode
Wake-up
Wake-up
Wake-up
Trig
Reset
Ena
11
12
Mode Mode input (pull-up resistor)
The processor’s mode signal initi-
ates the switchover between the
long and the short watchdog time.
95 10635
13
14
15
16
V
GND
Osc
Supply voltage
Ground, reference voltage
RC oscillator
DD
t
Time switch input
s
Programming pin to select differ-
ent time durations for the long
watchdog time.
Figure 2. Pin connections
Functional Description
1
t
Supply, Pin 13
f
The U5020M requires a stabilized supply voltage
= 5 V 5% to comply with its electrical
characteristic.
where t
1.35
1.57 R1 (C1
0.01)
s
V
DD
R1 in k , C1 in nF and t in
An external buffer capacitor of C = 10 nF may be
connected between Pin 13 and GND.
The clock frequency determines all time periods of the
logic part as shown in the last section of the data sheet
(timing). With an appropriate selection of components,
the clock frequency, f, is nearly independent of the supply
voltage as shown in figure 3. Frequency tolerance
RC-Oscillator, Pin 15
The clock frequency, f, can be adjusted with the
components R and C according to the formula:
f
= 10% with R
1%, C = 5%.
1
1
max
1
1
2 (8)
TELEFUNKEN Semiconductors
Rev. A3, 27-Feb-97
Preliminary Information
U5020M
1000.00
100.00
10.00
1.00
t ( s)
4.5 V
5.0 V
5.5 V
C = 500 pF
1
1
10
100
1000
95 10636
R (k
1
)
Figure 3. Period t vs. R1, @ C1 = 500 pF
Pin 13
Pin 10
V
DD
to
t6
Reset Out
Mode
t1
Pin 12
95 10637
Figure 4. Power-up reset and mode switchover
and the time, t , starts again. Micro and watchdog are
Supply Voltage Monitoring, Pin 10
1
synchronized with the switchover mode time, t , each
1
The integrated power-on reset (POR) circuitry sets the
internal logic to a defined basic status and generates a
reset pulse at the reset output, Pin 10, during ramp-up of
the supply voltage and in the case of voltage drops of the
supply. A hysteresis in the POR threshold prevents the
circuit from oscillating. During ramp–up of the supply
time a reset pulse is generated.
Microcontroller in Active Mode
Monitoring with the “Short” Trigger
Window
voltage the reset output stays active for time, t , in order
to bring the microcontroller in its defined reset status (see
figure 4). Pin 10 has an open-drain output.
o
After the switch-over mode the watchdog works in the
short watchdog mode and expects a trigger pulse from the
microcontroller within the defined time window, t ,
3
(enable time). The watchdog generates a reset pulse
which resets the microcontroller if
Switch-over Mode Time, Pin 12
The switch-over mode time enables the synchronous
operation of micro and watchdog. After the power-up
reset time the watchdog has to be switched to its
monitoring mode by the micro with a “low” signal
transmitted to the mode pin (Pin 12) within the time out
the trigger pulse duration is too long,
the trigger pulse is within the disable time, t
there is no trigger pulse
2
period, t ,. If the low signal does not occur within time, Figure 5 shows the pulse diagram with a missing trigger
1
t , (see figure 4) the watchdog generates a reset pulse, t , pulse.
1
6
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Rev. A3, 27-Feb-97
Preliminary Information
U5020M
Pin 13
Pin 10
Pin 12
V
DD
to
t1
Reset Out
Mode
t2
t3
Pin 11
Trigger
95 10638
Figure 5. Pulse diagram with no trigger pulse during the short watchdog time
Figure 6 shows a correct trigger sequence. The positive micro during the sleep mode. Like in the short watchdog
edge of the trigger signal starts a new monitoring cycle mode there is a disable time, t , and an enable time, t , in
4
5
with the disable time, t . To ensure a correct operation of which a trigger signal is accepted. The watchdog can be
2
the microcontroller the watchdog needs to be triggered switched from the short trigger window to the long trigger
three times correctly before it sets its enable output. This window with a “high” potential at the mode pin (Pin 12).
feature is used to activate or deactivate safety critical In contrast to the short watchdog mode the time periods
components, which have to be switched to a certain are now much longer and the enable output remains
condition (emergency status) in the case of a micro- inactive that other components can be switched off to
controller malfunction. As soon as there is an incorrect effect a further decrease in current consumption. As soon
trigger sequence the enable signal is reset and it takes as a wake-up signal at one of the 6 wake up inputs (Pins
again a three correct trigger sequence before enable is re- 3 to 8) is detected, the long watchdog mode ends, a reset
set.
pulse wakes-up the sleeping microcontroller and the
normal monitoring cycle starts with the mode switch-over
time.
Microcontroller in Sleep Mode
Monitoring with the “Long” Trigger
Window
With the help of a low or high potential at Pin 16 (time
switch) the long watchdog time can be selected in two
The long watchdog mode allows cyclical wake up of the values.
Pin 13
Pin 10
V
DD
t0
t1
Reset Out
Mode
t3
t2
t2
Pin 12
Pin 11
Trigger
ttrig
Pin 9
Enable
95 10639
Figure 6. Pulse diagram of a correct trigger sequence during the short watchdog time
4 (8)
TELEFUNKEN Semiconductors
Rev. A3, 27-Feb-97
Preliminary Information
U5020M
Figure 7 shows the switch-over from the short to the long The watchdog can be switched back from the long to the
watchdog mode. The wake up signal during the enable short watchdog mode with a low potential at the mode pin
time, t , activates a reset pulse, t .
(Pin 12).
5
6
t6
t1
Pin 10
Reset out
Wake-up
Mode
Pins 3 to 8
Pin 12
t4
t5
t2
Pin 11
Trigger
Enable
9
Pin
95 10640
Figure 7. Pulse diagram of the long watchdog time
Application Hint
In order to prevent the IC from an undesired reset output signal which may be caused by transcients on the supply under
certain conditions a pc board connection from Pin 2 to GND is strongly recommended.
Absolute Maximum Ratings
Parameters
Symbol
VDD
Value
6.5
Unit
V
Supply voltage
Output current
IOUT
mA
2
–0.5 V to VDD + 0.5 V
–40 to +85
Input voltage
Ambient temperature range
Storage temperature range
VIN
Tamb
Tstg
V
°C
°C
–55 to +150
Thermal Resistance
Parameters
SO16
Symbol
RthJA
Value
160
Unit
K/W
Junction ambient
TELEFUNKEN Semiconductors
5 (8)
Rev. A3, 27-Feb-97
Preliminary Information
U5020M
Electrical Characteristics
V
DD
= 5 V; T
= 25 °C; reference point is ground (Pin14); figure 4, unless otherwise specified
amb
Parameters
Supply voltage
Test Conditions / Pins
Pin 13
Symbol
VDD
Min.
4.5
Typ.
Max.
5.5
Unit
V
Current consumption
R1 = 66 k
Pin 13
IDD
100
A
Power-on reset
Power-on reset
Power-on reset
Inputs
Logic functions
Threshold
Hysteresis
Pin 13
Pin 13
Pin 13
VDD
VPOR
Vhys
1
V
V
mV
3.8
100
Pins 3 to 8, 11, 12 and 16
Upper threshold (“1”)
Lower threshold (“0”)
Input voltage range
Input current
VIH
VIL
VIN
I IN
4.0
V
V
V
A
1.0
VDD + 0.2
20
–0.4
–20
Depending on pin
Output Pin 9
Max. output current
IOUT
VOH
VOL
2
4.5
mA
V
V
Upper output voltage (“1”) IOUT = 1mA
Lower output voltage (“0”) IOUT = –1mA
Output Pin 10
Max. output current
Lower output voltage (“0”) IOUT = –1mA
Timing
0.5
0.5
IOUT
VOL
2
mA
V
Debounce period
Debounce period
Max. trigger pulse period
Power-up reset time
Time out period
Short disable time
Short enable time
Long disable time
Trig, Mode, Pins 11 and 12
Wake-up 1–6, Pins 3 to 8
3
96
4
128
cyc
cyc
cyc
cyc
cyc
cyc
cyc
cyc
45
201
1112
130
124
71970
t
o
t
1
t
2
t
3
t
4
Input switch = low (0)
Pin 16
Long enable time
Long disable time
Long enable time
Reset out time
Input switch = low (0)
Pin 16
Input switch = high (1)
Pin 16
Input switch = high (1)
Pin 16
t
5
t
4
t
5
t
6
30002
1200
400
cyc
cyc
cyc
cyc
40
6 (8)
TELEFUNKEN Semiconductors
Rev. A3, 27-Feb-97
Preliminary Information
U5020M
Package Information
Package SO16
Dimensions in mm
5.2
4.8
10.0
9.85
3.7
1.4
0.2
0.25
0.10
0.4
3.8
1.27
6.15
5.85
8.89
16
9
technical drawings
according to DIN
specifications
13036
1
8
TELEFUNKEN Semiconductors
7 (8)
Rev. A3, 27-Feb-97
Preliminary Information
U5020M
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to
1. Meet all present and future national and international statutory requirements.
2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems
with respect to their impact on the health and safety of our employees and the public, as well as their impact on
the environment.
It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as
ozone depleting substances (ODSs).
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and
forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban
on these substances.
TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of
continuous improvements to eliminate the use of ODSs listed in the following documents.
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively
2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental
Protection Agency (EPA) in the USA
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.
TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain
such substances.
We reserve the right to make changes to improve technical design and may do so without further notice.
Parameters can vary in different applications. All operating parameters must be validated for each customer
application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized
application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of,
directly or indirectly, any claim of personal damage, injury or death associated with such unintended or
unauthorized use.
TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423
8 (8)
TELEFUNKEN Semiconductors
Rev. A3, 27-Feb-97
Preliminary Information
相关型号：
U5020M-MFPG3Y
Power Supply Management Circuit, Fixed, 1 Channel, CMOS, PDSO16, LEAD FREE, SO-16
ATMEL
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