U2893B-FS [TEMIC]

Phase Locked Loop, PDSO28, SSO-28;
U2893B-FS
型号: U2893B-FS
厂家: TEMIC SEMICONDUCTORS    TEMIC SEMICONDUCTORS
描述:

Phase Locked Loop, PDSO28, SSO-28

过程控制系统 分布式控制系统 PCS GSM DCS
文件: 总14页 (文件大小:295K)
中文:  中文翻译
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U2893B  
Modulation PLL for GSM, DCS and PCS Systems  
Description  
The U2893B is a monolithic integrated circuit. It is tecture where the VCO is operated at the TX output  
realized using TEMIC’s advanced silicon bipolar UHF5S frequency.  
technology. The device integrates a mixer, an I/Q modu-  
U2893B exhibits low power consumption, and the power-  
lator, a phase-frequency detector (PFD) with two  
down function extends battery life.  
synchronous-programmable dividers, and a charge pump.  
The U2893B is designed for cellular phones such as GSM, The IC is available in a shrinked small-outline 28–pin  
DCS1800, and PCS1900, applying a transmitter-archi- package (SSO28).  
Features  
Benefits  
High-level RF integration  
Supply voltage down to 2.7 V  
TX architecture saves filter costs  
Low external part count  
Current consumption 40 mA  
Power-down function  
Small SSO28 package  
Low-current standby mode  
High-speed PFD and charge pump  
Integrated dividers  
One device for various applications  
Block Diagram  
MDLO  
PUMIX  
I
MIXO  
NI  
Q
NQ  
PU  
MIXLO  
RF  
Voltage  
reference  
90  
grd  
MDO  
NRF  
Mixer  
+
NMDO  
I/Q modulator  
VSP  
CPO  
MUX  
N : 1  
divider  
ND  
NND  
PFD  
RD  
R : 1  
divider  
NRD  
VS1  
VS2  
Mode  
control  
MC  
VS3  
12494  
CPC  
GND  
GNDP  
Figure 1. Block diagram  
TELEFUNKEN Semiconductors  
1 (14)  
Rev. A1, 29-Jan-97  
Preliminary Information  
U2893B  
Pin Description  
Pin  
1
2
3
4
5
6
7
8
Symbol  
I
Function  
In-phase baseband input  
Complementary to I  
I/Q-modulator LO input  
Negative supply  
I/Q-modulator output  
Complementary to MDO  
Positive supply (I/Q MOD)  
Pos. supply charge-pump  
Charge-pump output  
Neg. supply charge pump  
Charge-pump current control  
(input)  
Power-up, mixer only  
R-divider input  
Complementary to RD  
Mode control  
N-divider input  
Complementary to ND  
Negative supply  
Power-up, whole chip except  
mixer  
Mixer LO input  
Positive supply (MISC.)  
Mixer RF-input  
Complementary to RF  
Negative supply  
Q
1
2
3
4
5
6
7
8
9
I
NI  
28  
NI  
NQ  
27  
26  
MDLO  
1)  
GND  
MDLO  
GND  
VS3  
MDO  
NMDO  
3)  
25  
24  
MIXO  
VS1  
VSP  
CPO  
GNDP  
CPC  
MDO  
GND  
NRF  
9
10  
11  
2)  
NMDO  
23  
22  
21  
12  
13  
14  
15  
16  
17  
18  
19  
PUMIX  
RD  
NRD  
MC  
VS1  
VSP  
RF  
VS2  
ND  
NND  
20  
19  
CPO  
MIXLO  
PU  
1)  
GND  
GNDP  
CPC  
10  
11  
12  
PU  
18  
17  
16  
15  
GND  
NND  
ND  
20  
21  
22  
23  
24  
25  
26  
27  
28  
MIXLO  
3)  
VS2  
PUMIX  
RF  
NRF  
13  
14  
RD  
1)  
GND  
MIXO  
Mixer output  
NRD  
MC  
3)  
VS3  
Positive supply (mixer)  
Complementary to Q  
Quad.-phase baseband input  
12495  
NQ  
Q
Figure 2. Pinning  
1)  
2)  
3)  
All GND pins must be connected to GND  
potential. No DC voltage between GND pins!  
Max. voltage between GNDP and GND pins  
200 mV  
The maximum permissible voltage difference  
between pins VS1, VS2 and VS3 is 200 mV.  
2 (14)  
TELEFUNKEN Semiconductors  
Rev. A1, 29-Jan-76  
Preliminary Information  
U2893B  
Absolute Maximum Ratings  
Parameters  
Supply voltage VS1, VS2, VS3  
Supply voltage charge pump VSP  
Voltage at any input  
Symbol  
Value  
V
5.5  
V +0.5 5.5  
VS  
Unit  
V
V
VS#  
VSP  
V
VSP  
V
V
V
Vi#  
–0.5  
Current at any input / output pin  
except CPC  
| I | | I  
|
2
mA  
I#  
O#  
CPC output currents  
Ambient temperature  
Storage temperature  
| I  
T
T
|
5
mA  
°C  
°C  
CPC  
–20 to +85  
–40 to +125  
amb  
stg  
Operating Range  
Parameters  
Supply voltage  
Ambient temperature  
Symbol  
Value  
2.7 to 5.5  
–20 to +85  
Unit  
V
°C  
V
, V  
VS#  
VSP  
T
amb  
Thermal Resistance  
Parameters  
Junction ambient SSO28  
Symbol  
R
thJA  
Value  
130  
Unit  
K/W  
Electrical Characteristics: General Data  
T
amb  
= 25°C, V = 2.7 to 5.5 V  
S
Parameters  
DC supply  
Supply voltages VS#  
Supply voltage VSP  
Test Conditions / Pin  
= V = V  
Symbol  
Min.  
2.7  
Typ.  
Max.  
Unit  
V
VS1  
V
V
5.5  
5.5  
V
V
VS2  
VS3  
VS#  
V
VS#  
VSP  
– 0.3  
Supply current I  
Supply current I  
Supply current I  
Supply current I  
Active (V = VS)  
I
I
I
I
I
I
I
16  
21  
11  
mA  
A
mA  
A
mA  
A
mA  
VS1  
VS2  
VS3  
VSP  
PU  
VS1A  
VS1Y  
VS2A  
VS2Y  
VS3A  
VS3Y  
VSPA  
Standby (V = 0)  
20  
20  
PU  
Active (V = VS)  
PU  
Standby (V = 0)  
PU  
Active (V  
= VS)  
PUMIX  
Standby (V  
Active  
= 0)  
30  
20  
PUMIX  
1)  
2)  
(V = VS, CPO open)  
PU  
Standby (V = 0)  
I
20  
A
PU  
VSPY  
N & R divider inputs ND, NND & RD, NRD  
N:1 divider frequency  
R:1 divider frequency  
Input impedance  
50- source  
50- source  
Active & standby  
50- source  
F
F
100  
100  
1 k  
30  
650  
400  
2 pF  
200  
MHz  
MHz  
ND  
RD  
Z
, Z  
, V  
RD ND  
Input sensitivity  
V
mV  
RDeff  
NDeff  
1)  
100-MHz PFD operation, pump current set to 4 mA, zero phase difference (steady state)  
See chapter “Supply Current of the Charge Pump i(VSP) vs. Time”, page 6.  
2)  
TELEFUNKEN Semiconductors  
3 (14)  
Rev. A1, 29-Jan-97  
Preliminary Information  
U2893B  
Electrical Characteristics: General Data (continued)  
T
amb  
= 25°C, V = 2.7 to 5.5 V  
S
Parameters  
Phase-frequency detector (PFD)  
PFD operation  
Test Conditions / Pin  
Symbol  
FM  
Min.  
Typ.  
Max.  
Unit  
F
F
F
F
= 650 MHz, n = 5  
= 300 MHz, r = 2  
150  
200  
MHz  
MHz  
ND  
RD  
PFD  
Frequency comparison  
only  
= 650 MHz, n = 5  
= 300 MHz, r = 2  
FM  
FD  
ND  
RD  
I/Q modulator baseband inputs I, NI & Q, NQ  
DC voltage  
Referred to GND  
V V  
V
V
1.35  
DC  
VS1/2 VS1/2  
+ 0.1  
V
I, NI, Q, NQ  
MD_IQ  
AC voltage  
Frequency range  
Referred to GND  
FR  
1
MHz  
mVpp  
IO  
3)  
AC AC  
200  
I,  
NI,  
AC AC  
Q,  
NQ  
Differential (preferres)  
AC AC  
400  
mVpp  
DI,  
DQ  
I/Q modulator LO input MDLO  
MDLO  
Input impedance  
Input level  
Frequency range  
Active & standby  
50- source  
F
Z
P
50  
350  
250  
MHz  
W
dBm  
MDLO  
MDLO  
MDLO  
–12  
–5  
I/Q modulator outputs MDO, NMDO  
DC current  
Voltage compliance  
MDO output level  
(differential)  
Carrier suppression  
V
V
, V  
, V  
= VS  
= VC  
I
, I  
MDO NMDO  
2.4  
mA  
mV  
MDO  
NMDO  
VC  
, VC  
MDO  
NMDO  
4)  
MDO  
NMDO  
MDOeff  
500 to VS  
P
120  
150  
4)  
CS  
SS  
SP  
–30  
–35  
–45  
–115  
50  
–35  
–40  
–50  
dBc  
dBc  
dBc  
dBc/Hz  
MHz  
MDO  
MDO  
MDO  
MDO  
4)  
Sideband suppression  
IF spurious  
4)  
f_LO +/– 3 f_mod  
@ 400 kHz off carrier  
4)  
Noise  
N
Frequency range  
Mixer (900 MHz)  
RF input level  
LO-spurious at  
RF/NRF port  
MIXLO input level  
MIXO (100- load)  
... Output level  
FR  
350  
MDO  
900 MHz  
@ P9  
@ P9 = –15 dBm  
0.05 to 2 GHz  
Frequency range  
@ P9  
@ P9  
P9  
tbd  
–15  
dBm  
dBm  
RF  
= –10 dBm  
SP9  
–40  
350  
MIXLO  
RF  
RF  
P9  
tbd  
50  
–10  
70  
dBm  
MHz  
mV  
MIXLO  
FR  
MIXO  
5)  
= –15 dBm  
= –15 dBm  
P9  
MIXOeff  
MIXLO  
MIXLO  
... Carrier suppression  
CS9  
–20  
dBc  
MIXO  
3)  
Single-ended operation (complementary baseband input is AC-grounded) leads to reduced linearity degrading  
suppression of odd harmonics  
4)  
5)  
With typical drive levels at MDLO- & I/Q-inputs  
–1 dB compression point (CP-1)  
4 (14)  
TELEFUNKEN Semiconductors  
Rev. A1, 29-Jan-76  
Preliminary Information  
U2893B  
Electrical Characteristics: General Data (continued)  
T
amb  
= 25°C, V = 2.7 to 5.5 V  
S
Parameters  
Mixer (1900 MHz)  
RF input level  
LO-spurious at  
RF/NRF ports  
Test Conditions / Pin  
Symbol  
Min.  
Typ.  
–17  
Max.  
–40  
Unit  
0.5 to 2 GHz  
P19  
dBm  
dBm  
RF  
@ P19  
= –10 dBm  
SP19  
RF  
MIXLO  
@ P19 = –15 dBm  
RF  
MIXLO input level  
MIXO (100 load)  
... Output level  
... Carrier suppression  
Charge pump output CPO  
Pump current pulse  
0.05 to 2 GHz  
P19  
–8  
55  
dBm  
MIXLO  
5)  
@ P19  
@ P19  
= –17 dBm  
= –17 dBm  
P19  
CS19  
mVeff  
dBc  
MIXLO  
MIXO  
–20  
MIXLO  
MIXO  
CPC open  
2.23 kCPC to GND  
760 CPC to GND  
| I  
CPO  
|
0.8  
1.6  
3.6  
1
2
4
1.2  
2.4  
4.4  
15  
mA  
mA  
mA  
%/100 k  
%
| I  
| I  
|
|
CPO 2  
CPO_4  
TK pump current  
Mismatch source / sink  
current  
Tk_| I  
M
ICPO  
|
CPC  
(I  
– I  
)/I  
10  
CPOSI  
CPOSO CPOSI  
I
I
= I  
CPOSO  
sourc  
= I  
CPOSI  
sink  
Sensivity to VSP  
S
ICPO  
0.1  
ICPO  
ICPO  
VSP  
VSP  
|
|
|
|
Charge pump control input CPC  
Compensation capacitor  
C
500  
2
pF  
mA  
CPC  
6)  
Short circuit current  
Mode control  
Sink current  
Power-up input PU (power-up for all functions, except mixer)  
Settling time  
CPC grounded  
= VS  
| I  
CPCK  
|
2.7  
20  
5
3.7  
10  
V
MC  
I
A
s
MC  
Output power within  
10% of steady state  
values  
S
PU  
High level  
Low level  
High-level current  
Low-level current  
Active  
Standby  
Active, V  
Standby, V  
V
2.5  
0
0.1  
–10  
V
V
mA  
mA  
PUH  
V
0.4  
0.6  
0
PUL  
PUH  
= 2.7 V  
I
PUH  
= 0.4 V  
I
PUL  
PUL  
Power-up input PUMIX (power-up for mixer only)  
Settling time  
Output power within  
10% of steady state  
values  
5
10  
s
High level  
Low level  
High-level current  
Low-level current  
Active  
Standby  
Active, V  
Standby,  
V
2.5  
0
0.1  
–10  
V
V
mA  
mA  
PUMIXH  
V
0.4  
0.6  
0
PUMIXL  
PUMIXH  
= 2.7 V  
I
PUMIXH  
I
PUMIXL  
V
= 0.4 V  
PUMIXL  
6)  
See figures 6 and 14.  
TELEFUNKEN Semiconductors  
5 (14)  
Rev. A1, 29-Jan-97  
Preliminary Information  
U2893B  
Supply Current of the Charge Pump  
i(VSP) vs. Time  
Initial Charge Pump Current after  
Power-Up  
Due to the pulsed operation of the charge pump, the cur- Due to stability reasons, the reference current generator  
rent into the charge-pump supply pin VSP is not constant. for the charge pump needs an external capacitor (>500 pF  
Depending on I (see figure 6) and the phase difference at from CPC to GND). After power-up, only the on-chip  
the phase detector inputs, the current i(VSP) over time va- generated current I = I  
is available for charging the  
CPCK  
ries. Basically, the total current is the sum of the quiescent external capacitor. Due to the charge pump’s architecture,  
current, the charge-/discharge current, and – after each the charge pump current will be 2 I = 2  
until  
I
CPCK  
phase comparison cycle – a current spike (see figure 3).  
the voltage on CPC has reached the reference voltage  
(1.1 V). The following figures illustrate this behavior.  
The behavior of I(CPO) after power-up can be very  
advantageous for a fast settling of the loop. By using  
larger capacitors (>1 nF), an even longer period with  
maximum charge pump current is possible.  
up  
down  
V(CPC)  
I
R
CPC  
CPCK  
5I  
i(VSP)  
3I  
I
t
Vref  
2I  
i(CPO)  
t
t
t
t
t
–2I  
1
0
2
Figure 3. Supply current of the charge pump = f(t)  
Internal current, I, vs. current out of pin CPC  
I(CPC)  
I
CPCK  
2
I vs. I(CPC)  
CPC open  
ICPC  
0
I
0.5 mA  
1.0 mA  
2.0 mA  
>2.0 mA  
2.23 kW to GND  
743 W to GND  
–0.5 mA  
–1.5 mA  
I
CPC shorted to GND  
I
CPCK  
t
t
1
Time t can be calculated as t  
(1.1 V  
C )/I  
CPC CPCK  
1
1
e.g., C  
= 1 nF, I  
= 3.5 A  
t
(R  
0.3 s.  
/2230  
CPC  
max  
1
Time t can be calculated as t  
)
C
CPC  
2
2
CPC  
e.g., C  
= 1 nF, R  
= 2230  
t
2
1.1 s  
CPC  
CPC  
Figure 4.  
6 (14)  
TELEFUNKEN Semiconductors  
Rev. A1, 29-Jan-76  
Preliminary Information  
U2893B  
Mode Selection  
The device can be programmed to different modes via an external resistor (including short, open) connected between  
Pin MC and VS2. The mode selection controls the N-, R-divider ratios, and the polarity of the charge pump current.  
Mode Selection  
N-Divider  
R-Divider  
CPO Current Polarity  
Application  
1)  
1)  
Mode  
Resistance between Pin MC  
and Pin VS2  
f < f  
f < f  
N R  
N
R
1
2
3
4
5
0 (<50  
)
3:1  
2:1  
2:1  
3:1  
3:1  
5:1  
5:1  
6:1  
6:1  
6:1  
Sink  
Source  
Sink  
GSM  
PCS  
2.7 k (±5%)  
10 k (±5%)  
36 k (±5%)  
(>1 M )  
Source  
Source  
Source  
Sink  
Sink  
DCS  
GSM  
GSM  
Sink  
Source  
1)  
Frequencies referred to PFD input!  
Equivalent Circuits at the IC’s Pins  
VS1  
Vbias_MDLO  
MDO  
NMDO  
2230  
2230  
250  
I, Q  
MDLO  
NI, NQ  
Vref_MDLO  
Vref_output  
Vref_input  
30p  
GND  
Baseband input  
LO input  
Output  
Figure 5. I/Q modulator  
VS3  
Vbias_RF  
1k  
1k  
Vbias_LO  
RF  
890  
890  
1.6k  
1.6k  
40p  
MIXLO  
NRF  
6.3  
MIXO  
GND  
Vref_RF  
Vref_LO  
RF input  
LO input  
Output  
Figure 6. Mixer  
TELEFUNKEN Semiconductors  
7 (14)  
Rev. A1, 29-Jan-97  
Preliminary Information  
U2893B  
VS2  
4
VSP  
4
ICPCK /4  
4
I
m  
CPC  
2I  
up  
down  
CPO  
ref  
ref  
1.1 V  
2I  
2230  
2
2
GNDP  
GND  
= Transistor with an emitter area-factor of n  
n
Figure 7. Charge pump  
VS2  
20k  
PU, PUMIX  
ND/RD  
2k  
2k  
GND  
NND/NRD  
Figure 9. Power-up  
Vref_div  
GND  
Figure 8. Dividers  
VS2  
C (U)  
@
2.5 pF  
2 V  
N-divider  
R-divider  
MUX  
Figure 11. ESD-protection diodes  
MC  
60  
A
GND  
Figure 10. Mode control  
8 (14)  
TELEFUNKEN Semiconductors  
Rev. A1, 29-Jan-76  
Preliminary Information  
U2893B  
Application Hints  
For some of the baseband ICs it may be necessary to  
reduce the I/Q voltage swing so that it can be handled by  
the U2893B. In those cases, the following circuitry can be  
used.  
U2893B  
CPC  
GND  
R1 = 2230 R  
R2 = 1160 R (incl. rds_on of FET)  
R1 R2  
R1  
I
I
1 nF  
4 mA  
R2  
R2  
R1  
R1  
R1  
NI  
Q
NI  
Q
Baseband IC  
U2893B  
2 mA  
12497  
Figure 14. Programming the charge pump current  
NQ  
NQ  
12496  
Figure 12. Interfacing the U2893B to I/Q baseband circuits  
Application examples for programming different modes.  
U2893B  
VS2  
U2893B  
VS2  
MC  
MC  
RMODE 1  
RMODE 2  
a) single mode  
b) any mode & mode 5  
U2893B  
VS2  
U2893B  
VS2  
MC  
MC  
RMODE  
36k or  
10k  
c) any mode  
d) mode 5 & mode 3 or mode 4  
Figure 13. Mode control  
TELEFUNKEN Semiconductors  
9 (14)  
Rev. A1, 29-Jan-97  
Preliminary Information  
U2893B  
Test Circuit  
<450 mV  
pp  
<450 mV  
pp  
VAC  
VDC  
VAC  
VDC  
Baseband inputs  
1.35 V –  
VS1/2 + 0.1 V  
1.35 V –  
VS1/2 + 0.1 V  
1
2
3
4
5
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
I
Q
NQ  
NI  
50  
Modulator  
LO input  
VS3  
MDLO  
GND  
MDO  
NMDO  
VS1  
VS  
Mixer  
output  
MIXO  
GND  
NRF  
RF  
Modulator  
outputs  
6
7
50  
50  
50  
Mixer  
input  
VS  
VSP  
VDO  
8
9
10  
VSP  
VS2  
VS  
50  
Mixer  
LO input  
CPO  
MIXLO  
PU  
PFD  
Pulse output  
GNDP  
CPC  
1 n  
11  
12  
13  
GND  
NND  
ND  
PUMIX  
RD  
PFD input  
PFD input  
14  
50  
50  
NRD  
MC  
Mode control  
VS2  
Power-up  
Bias voltage for  
charge pump output:  
VS  
R1  
R2  
R3  
13315  
0.5 V < VDO < VSP – 0.5 V  
Figure 15. Test circuit  
10 (14)  
TELEFUNKEN Semiconductors  
Rev. A1, 29-Jan-76  
Preliminary Information  
U2893B  
Application Circuit (900 MHz)  
Baseband processor  
27n  
12p  
LO (–10 dBm)  
1192 MHz  
12p  
2.7 to 3.5 V  
MIXO  
Mixer  
MIXLO  
RF  
PUMIX PU  
NI  
NQ  
Q
MDLO  
I
Dr  
Dr  
Voltage  
reference  
90  
grd  
50  
390  
4.7p  
MDO  
NRF  
To PA  
6 dB  
attn.  
NMDO  
+
I/Q modulator  
47nH  
VCO MQE 550  
VSP  
CPO  
ND  
2.7  
to 3.5 V  
MUX  
N : 1  
divider  
NND  
10  
1k  
PFD  
RD  
3.3n  
390  
R : 1  
divider  
f_Ref  
= 55 mV  
68p  
50  
v
rms  
VS1  
VS2  
NRD  
2.7 to 3.5 V  
U2893B  
Mode  
control  
MC  
VS3  
13316  
GNDP  
GND  
CPC  
Figure 16. Power-up, charge pump control, and mode control must be connected according to the application used  
TELEFUNKEN Semiconductors  
11 (14)  
Rev. A1, 29-Jan-97  
Preliminary Information  
U2893B  
Measurements  
Modulation-Loop Settling Time  
Modulation Spectrum & Phase Error  
The figure of the TX spectrum and the phase error dis-  
tribution, respectively, shows the suitability of the  
modulation-loop concept for GSM.  
As valid for all PLL loops the settling time depends on  
several factors. The following figure is an extraction from  
measurements performed in an arrangement like the ap-  
plication circuit. It shows that a loop settling time of a few Vertical: VRef. level = 28.6 dBm, 10 dBm/Div  
s can be achieved.  
Horizontal: Center = 900 MHz, VBW, RBW = 30 kHz,  
400 kHz/Div  
CPC: 1 kto GND  
CPC ‘open’  
Vertical: VCO tuning voltage 1 V/Div  
Horizontal: Time 1 s/Div  
Figure 17.  
Figure 18.  
Figure 19.  
12 (14)  
TELEFUNKEN Semiconductors  
Rev. A1, 29-Jan-76  
Preliminary Information  
U2893B  
Package Information  
5.7  
5.3  
Package SSO28  
Dimensions in mm  
9.10  
9.01  
4.5  
4.3  
1.30  
0.15  
0.15  
0.05  
0.25  
0.65  
6.6  
6.3  
8.45  
28  
15  
technical drawings  
according to DIN  
specifications  
13018  
1
14  
TELEFUNKEN Semiconductors  
13 (14)  
Rev. A1, 29-Jan-97  
Preliminary Information  
U2893B  
Ozone Depleting Substances Policy Statement  
It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to  
1. Meet all present and future national and international statutory requirements.  
2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems  
with respect to their impact on the health and safety of our employees and the public, as well as their impact on  
the environment.  
It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as  
ozone depleting substances (ODSs).  
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and  
forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban  
on these substances.  
TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of  
continuous improvements to eliminate the use of ODSs listed in the following documents.  
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively  
2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental  
Protection Agency (EPA) in the USA  
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.  
TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain  
such substances.  
We reserve the right to make changes to improve technical design and may do so without further notice.  
Parameters can vary in different applications. All operating parameters must be validated for each customer  
application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized  
application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of,  
directly or indirectly, any claim of personal damage, injury or death associated with such unintended or  
unauthorized use.  
TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany  
Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423  
14 (14)  
TELEFUNKEN Semiconductors  
Rev. A1, 29-Jan-76  
Preliminary Information  

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