U2754B-BFS [TEMIC]
Phase Locked Loop, PDSO20, SSO-20;
| 型号： | U2754B-BFS |
| 厂家： | 
TEMIC SEMICONDUCTORS |
| 描述： | Phase Locked Loop, PDSO20, SSO-20 光电二极管 |
| 文件： | 总6页 (文件大小：156K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
U2754B-B
Frequency Synthesizer for DAB L-Band Down-Converter
Description
The U2754B-BFS is a monolithic integrated frequency-
synthesizer-circuit fabricated with TEMIC’s advanced
UHF5S technology. It controls a VCO to synthesize a
frequency in the range of 100 MHz to 1500 MHz by a
Electrostatic sensitive device.
phase-locked loop. Four different reference divide factors
Observe precautions for handling.
can be selected. The lock status of the phase detector is
indicated at a special output pin.
Features
RF divide factor: 2464
Deactivation of tuning output programmable
Lock-status indication (open collector)
SSO20 package
Four reference divide factors selectable: 32, 35, 36, 38
Tristate phase detector with programmable
charge pump
Block Diagram
TERD TEMD
8
14
Test interface
6
7
REF
9
3
4
Lock
detector
Reference counter
32/35/36/38
PLCK
PD
NREF
16
15
Programmable
charge pump
(50µA / 200 µA)
RF
Tristate
phase
detector
RF divider
2464
VD
NRF
Control interface
17
19
20
1
2
11
C1
10
C2
12
S1
13
S2
15056
GND1 GND2 GND3
VS1 VS2
Figure 1. Block diagram
Rev. A1, 21-Jul-98
1 (6)
Preliminary Information
U2754B-B
Ordering Information
Extended Type Number
Package
SSO20
Remarks
U2754B-BFS
Pin Description
Pin
1
Symbol
VS1
VS2
PD
Function
GND3
VS1
1
2
20
19
18
17
16
15
14
Supply voltage
2
Supply voltage
GND2
VS2
PD
3
Tristate charge pump output
Active filter output
Not connected
4
VD
n.c.
3
5
n.c.
6
REF
Reference input
VD
GND1
RF
4
7
NREF Reference input (inverted)
8
TERD Test output of reference divider
n.c.
5
9
PLCK Lock indicating output
(open collector)
C2
C1
S1
S2
REF
NREF
TERD
PLCK
C2
NRF
TEMD
S2
6
10
11
12
13
14
15
16
17
18
19
20
Control input
Control input
Control input
Control input
7
8
13
12
TEMD Test output of RF divider
NRF
RF
RF input (inverted)
RF input
S1
9
GND1 Ground
C1
10
11
n.c.
Not connected
14882
GND2 Ground
GND3 Ground
Figure 2. Pinning
Functional Description
The U2754B-B is a low-power frequency synthesizer The purpose of this device is to lock the frequency, f
,
VCO
designed for applications in a DAB receiver. Its RF of an external voltage VCO on the frequency, f , of the
ref
operation ranges from 100 MHz up to 1500 MHz. The reference signal applied to the input Pins REF and NREF
device includes input buffers for reference and RF by a phase-locked loop according to the following
dividers, a reference divider, an RF divider, a tristate relation:
phase detector, a programmable charge pump, a high-
f
= SF × f / SF ,
ref
VCO
ref
gain amplifier to construct an active loop filter, a control
interface and a test interface. The control interface has to where:
be accessed by four control Pins C1, C2, S1 and S2. The
test interface provides test signals which represent output
signals of the reference and the RF divider. A block
diagram of this device is shown in figure 1.
SF = 2464,
SF = 35
if S1 = LOW, S2 = LOW,
if S1 = HIGH, S2 = LOW,
if S1 = LOW, S2 = HIGH,
if S1 = HIGH, S2 = HIGH.
ref
SF = 36
ref
SF = 38
ref
SF = 32
ref
2 (6)
Rev. A1, 21-Jul-98
Preliminary Information
U2754B-B
Reference Divider
Phase Comparator and Charge Pump
The tri-state phase detector causes the charge pump to
source or to sink current at the output Pin PD depending
on the phase relation of its input signals which are
provided by the reference and the RF divider respectively.
By means of the control Pins C1 and C2 two different
values of this current can be selected and, furthermore,
the charge-pump current can be switched off.
Four different scaling factors of the reference divider can
be selected by means of the input Pins S1 and S2:
32, 35, 36 and 38. Starting from a reference oscillator
frequency of 16.384 MHz/ 17.92 MHz/ 18.432 MHz/
19.456 MHz, these scaling factors cause an output
frequency of the reference divider of 512 kHz. If logical
HIGH is applied to the input control Pins C1 and C2 a test
signal which monitors the output frequency of the A high-gain amplifier (output pin: VD) which is
reference divider appears at the output Pin TERD.
implemented in order to construct a loop filter, as shown
in the application circuit in figure 3, can be switched off
by means of the control bits C1 and C2.
RF Divider
An internal lock detector checks if the phase difference of
the input signals of the phase detector is smaller than
approximately 250 ns in seven subsequent comparisons.
If phase lock is detected the open collector output Pin
PLCK is set HIGH (logical value!). It should be noted that
the output current of this pin must be limited by external
circuitry as it is not limited internally. If C1 = LOW and
C2 = HIGH the lock detector function is deactivated and
the logical value of the PLCK output is undefined.
The RF divider is operated at the fixed division ratio
2464. Assuming the settings described in the section
“Reference Divider”, the VCO frequency is
1261.568 MHz in closed-loop state and the output
frequency of the RF divider is 512 kHz. A test signal
which monitors the output frequency of the RF divider
appears at the output Pin TEMD if logical HIGH is
applied to the input control Pins C1 and C2.
Unused Pins
It is recommended to connect the unused Pins 5 and 18 to
ground.
Absolute Maximum Ratings
Parameters
Symbol
, V
Value
Unit
V
Supply voltage
Pins 1 and 2
Pins 15 and 16
V
–0.3 to +5.5
VS1
VS2
RF input voltage (AC)
Reference input voltage (AC)
Control input voltage
V , V
RF NRF
1
1
V
pp
V
pp
Pins 6 and 7
REF, NREF
, V
Pins 10, 11, 12 and 13
V
C1
,
–0.3 to V
V
C2
S
V , V
S1
S2
PLCK output current, open collector
PLCK output voltage, open collector
Junction temperature
Pin 9
Pin 9
I
0.5
mA
V
PLCK
V
–0.3 to +5.5
125
PLCK
T
°C
°C
j
Storage temperature
T
stg
–40 to +125
Operating Range
Parameters
Symbol
, V
Value
Unit
V
Supply voltage
V
4.5 to 5.5
–40 to +85
VS1
VS2
Ambient temperature range
T
amb
°C
Thermal Resistance
Parameters
Symbol
Value
140
Unit
K/W
Junction ambient
R
thJA
Rev. A1, 21-Jul-98
3 (6)
Preliminary Information
U2754B-B
Electrical Characteristics
Test conditions (unless otherwise specified): V = 5 V, T
= 27°C
S
amb
Parameters
Supply current
Test Conditions / Pins
C1 = C2, 0 = LOW,
Symbol
Min.
7.2
Typ.
9.0
Max.
10.8
Unit
mA
I
S
PLCK = LOW, Pins 1 and 2
RF divide factor
SF
SF
2464
Reference divide factor
S1 = LOW, S2 = LOW
S1 = HIGH, S2 = LOW
S1 = LOW, S2 = HIGH
S1 = HIGH, S2 = HIGH
35
36
38
32
ref
RF input
Pins 15 and 16
Input frequency range
Input sensitivity
Max. input signal
Input impedance
VSWR
f
100
1261.568
1500
50
MHz
rf
V
mV
mV
rfs
rms
rms
V
200
rfmax
Differential
Z
200
2
rf
VSWR
rf
REF input Pins 6 and 7
Input frequency range
f
5
30
MHz
MHz
MHz
MHz
MHz
ref
S1 = LOW, S2 = LOW
S1 = HIGH, S2 = LOW
S1 = LOW, S2 = HIGH
S1 = HIGH, S2 = HIGH
17.92
18.432
19.456
16.384
Input sensitivity
V
10
50
mV
mV
refs
rms
rms
Maximum input signal
Input impedance
V
refmax
300
Single ended
Z
2.7 || 2.5
|| pF
ref
Phase detector
Pin 3
Charge-pump current
C1 = HIGH, C2 = LOW
C1 = LOW, C2 = LOW
C1 = LOW, C2 = HIGH
C1 = HIGH, C2 = HIGH
I
I
± 160
± 40
± 203
± 50
± 240
± 60
± 100
0.3
A
A
PD2
PD1
I
nA
V
PD,tri
Output voltage
V
PD
Internal reference
frequency
f
512
kHz
PD
Lock indication
Leakage current
Saturation voltage
Control inputs
Input voltage
Pin 9
V
= 5.5 V
I
10
A
V
PLCK
PLCK,L
I
= 0.5 mA
V
0.5
PLCK
PLCK,sat
Pins 10, 11, 12, 13
HIGH
V
H
3
5.5
1.5
V
V
LOW
V
L
Test outputs Pins 8 and 14
Frequency
C1 = HIGH, C2 = HIGH
f
512
400
kHz
test
Voltage swing
R
load
≥ 1 M , C ≤ 15 pF,
V
mV
pp
load
test
C1 = HIGH, C2 = HIGH
4 (6)
Rev. A1, 21-Jul-98
Preliminary Information
U2754B-B
Application Circuit
Example: reference divide factor = 35, charge-pump current = 200 A.
U2755B–B
1n
1n
+5V
Tuning
voltage
20
19
18
17
16
15
14
13
12
11
U2754B–B
+5V
1
2
3
4
5
6
7
8
9
10
1n
1n
22k
1k
Lock
indication
+5V
1k
100k
68p
22k
3.3n
3.3n
Ref.
oscillator
+5V
680p
BC846B
15057
Figure 3. Application circuit
Package Information
Package SSO20
Dimensions in mm
5.7
5.3
6.75
6.50
4.5
4.3
1.30
0.15
0.15
0.05
0.25
0.65
6.6
6.3
5.85
20
11
technical drawings
according to DIN
specifications
13007
1
10
Rev. A1, 21-Jul-98
5 (6)
Preliminary Information
U2754B-B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC Semiconductor GmbH to
1. Meet all present and future national and international statutory requirements.
2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems
with respect to their impact on the health and safety of our employees and the public, as well as their impact on
the environment.
It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as
ozone depleting substances (ODSs).
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and
forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban
on these substances.
TEMIC Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of
ODSs listed in the following documents.
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively
2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental
Protection Agency (EPA) in the USA
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.
TEMIC Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting
substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice.
Parameters can vary in different applications. All operating parameters must be validated for each customer
application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized
application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of,
directly or indirectly, any claim of personal damage, injury or death associated with such unintended or
unauthorized use.
TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423
6 (6)
Rev. A1, 21-Jul-98
Preliminary Information
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